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Move NIC driver (cxgb) into its own directory. Add toecore to support

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registering different TOMs.
This commit is contained in:
Kip Macy 2007-12-15 22:03:19 +00:00
parent 3e96c7e790
commit 22a80c41fa
3 changed files with 61 additions and 43 deletions
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48
sys/modules/cxgb/Makefile
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@ -1,45 +1,7 @@
# $FreeBSD$
SUBDIR= cxgb
SUBDIR+= toecore
#SUBDIR+= tom
#SUBDIR+= iw_cxgb
CXGB = ${.CURDIR}/../../dev/cxgb
.PATH: ${CXGB} ${CXGB}/common ${CXGB}/sys
KMOD= if_cxgb
SRCS= cxgb_mc5.c cxgb_vsc8211.c cxgb_ael1002.c cxgb_mv88e1xxx.c
SRCS+= cxgb_xgmac.c cxgb_vsc7323.c cxgb_t3_hw.c cxgb_main.c
SRCS+= cxgb_sge.c cxgb_lro.c cxgb_offload.c cxgb_l2t.c
SRCS+= device_if.h bus_if.h pci_if.h opt_zero.h
SRCS+= uipc_mvec.c
CFLAGS+= -DCONFIG_CHELSIO_T3_CORE -g -DCONFIG_DEFINED -DDEFAULT_JUMBO -I${CXGB}
#CFLAGS+= -DDEBUG -DDEBUG_PRINT
#CFLAGS+= -DINVARIANT_SUPPORT -DINVARIANTS -DWITNESS
.if ${MACHINE_ARCH} != "ia64"
# ld is broken on ia64
t3fw-4.7.0.bin: ${CXGB}/t3fw-4.7.0.bin.gz.uu
uudecode -p < ${CXGB}/t3fw-4.7.0.bin.gz.uu \
| gzip -dc > ${.TARGET}
FIRMWS= t3fw-4.7.0.bin:t3fw470
CLEANFILES+= t3fw-4.7.0.bin
t3b_protocol_sram-1.1.0.bin: ${CXGB}/t3b_protocol_sram-1.1.0.bin.gz.uu
uudecode -p < ${CXGB}/t3b_protocol_sram-1.1.0.bin.gz.uu \
| gzip -dc > ${.TARGET}
FIRMWS+= t3b_protocol_sram-1.1.0.bin:t3bps110
CLEANFILES+= t3b_protocol_sram-1.1.0.bin
t3b_tp_eeprom-1.1.0.bin: ${CXGB}/t3b_tp_eeprom-1.1.0.bin.gz.uu
uudecode -p < ${CXGB}/t3b_tp_eeprom-1.1.0.bin.gz.uu \
| gzip -dc > ${.TARGET}
FIRMWS+= t3b_tp_eeprom-1.1.0.bin:t3btpe110
CLEANFILES+= t3b_tp_eeprom-1.1.0.bin
.endif
.include <bsd.kmod.mk>
.include <bsd.subdir.mk>

48
sys/modules/cxgb/cxgb/Makefile Normal file
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@ -0,0 +1,48 @@
# $FreeBSD$
CXGB = ${.CURDIR}/../../../dev/cxgb
.PATH: ${CXGB} ${CXGB}/common ${CXGB}/sys
KMOD= if_cxgb
SRCS= cxgb_mc5.c cxgb_vsc8211.c cxgb_ael1002.c cxgb_mv88e1xxx.c
SRCS+= cxgb_xgmac.c cxgb_vsc7323.c cxgb_t3_hw.c cxgb_main.c
SRCS+= cxgb_sge.c cxgb_lro.c cxgb_offload.c cxgb_l2t.c
SRCS+= device_if.h bus_if.h pci_if.h opt_zero.h opt_sched.h
SRCS+= uipc_mvec.c
#SRCS+= cxgb_multiq.c cxgb_support.c
CFLAGS+= -DCONFIG_CHELSIO_T3_CORE -g -DCONFIG_DEFINED -DDEFAULT_JUMBO -I${CXGB} -DSMP
#CFLAGS+= -DIFNET_MULTIQUEUE
#CFLAGS+= -DINVARIANT_SUPPORT -DINVARIANTS
#CFLAGS+= -DWITNESS
#CFLAGS+= -DDEBUG -DDEBUG_PRINT
.if ${MACHINE_ARCH} != "ia64"
# ld is broken on ia64
t3fw-4.7.0.bin: ${CXGB}/t3fw-4.7.0.bin.gz.uu
uudecode -p < ${CXGB}/t3fw-4.7.0.bin.gz.uu \
| gzip -dc > ${.TARGET}
FIRMWS= t3fw-4.7.0.bin:t3fw470
CLEANFILES+= t3fw-4.7.0.bin
t3b_protocol_sram-1.1.0.bin: ${CXGB}/t3b_protocol_sram-1.1.0.bin.gz.uu
uudecode -p < ${CXGB}/t3b_protocol_sram-1.1.0.bin.gz.uu \
| gzip -dc > ${.TARGET}
FIRMWS+= t3b_protocol_sram-1.1.0.bin:t3bps110
CLEANFILES+= t3b_protocol_sram-1.1.0.bin
t3b_tp_eeprom-1.1.0.bin: ${CXGB}/t3b_tp_eeprom-1.1.0.bin.gz.uu
uudecode -p < ${CXGB}/t3b_tp_eeprom-1.1.0.bin.gz.uu \
| gzip -dc > ${.TARGET}
FIRMWS+= t3b_tp_eeprom-1.1.0.bin:t3btpe110
CLEANFILES+= t3b_tp_eeprom-1.1.0.bin
.endif
.include <bsd.kmod.mk>

8
sys/modules/cxgb/toecore/Makefile Normal file
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@ -0,0 +1,8 @@
# $FreeBSD$
TOECORE = ${.CURDIR}/../../../dev/cxgb/ulp/toecore
.PATH: ${TOECORE}
KMOD= toecore
SRCS= toedev.c
SRCS+= device_if.h bus_if.h pci_if.h opt_sched.h
.include <bsd.kmod.mk>