Add support for the Marvell 6101/6145 PATA chips used on many new Intel boards.
HW donated by: Sentex
This commit is contained in:
Søren Schmidt
parent
3c3619cdad
commit
22fe2182e7
@ -105,14 +105,17 @@ static int ata_jmicron_allocate(device_t dev);
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static void ata_jmicron_reset(device_t dev);
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static void ata_jmicron_dmainit(device_t dev);
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static void ata_jmicron_setmode(device_t dev, int mode);
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static int ata_marvell_chipinit(device_t dev);
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static int ata_marvell_allocate(device_t dev);
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static int ata_marvell_status(device_t dev);
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static int ata_marvell_begin_transaction(struct ata_request *request);
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static int ata_marvell_end_transaction(struct ata_request *request);
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static void ata_marvell_reset(device_t dev);
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static void ata_marvell_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error);
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static void ata_marvell_dmainit(device_t dev);
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static int ata_marvell_pata_chipinit(device_t dev);
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static int ata_marvell_pata_allocate(device_t dev);
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static void ata_marvell_pata_setmode(device_t dev, int mode);
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static int ata_marvell_edma_chipinit(device_t dev);
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static int ata_marvell_edma_allocate(device_t dev);
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static int ata_marvell_edma_status(device_t dev);
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static int ata_marvell_edma_begin_transaction(struct ata_request *request);
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static int ata_marvell_edma_end_transaction(struct ata_request *request);
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static void ata_marvell_edma_reset(device_t dev);
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static void ata_marvell_edma_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error);
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static void ata_marvell_edma_dmainit(device_t dev);
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static int ata_national_chipinit(device_t dev);
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static void ata_national_setmode(device_t dev, int mode);
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static int ata_nvidia_chipinit(device_t dev);
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@ -2310,12 +2313,14 @@ ata_marvell_ident(device_t dev)
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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struct ata_chip_id *idx;
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static struct ata_chip_id ids[] =
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{{ ATA_M88SX5040, 0, 4, MV5XXX, ATA_SA150, "88SX5040" },
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{ ATA_M88SX5041, 0, 4, MV5XXX, ATA_SA150, "88SX5041" },
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{ ATA_M88SX5080, 0, 8, MV5XXX, ATA_SA150, "88SX5080" },
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{ ATA_M88SX5081, 0, 8, MV5XXX, ATA_SA150, "88SX5081" },
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{ ATA_M88SX6041, 0, 4, MV6XXX, ATA_SA300, "88SX6041" },
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{ ATA_M88SX6081, 0, 8, MV6XXX, ATA_SA300, "88SX6081" },
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{{ ATA_M88SX5040, 0, 4, MV50XX, ATA_SA150, "88SX5040" },
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{ ATA_M88SX5041, 0, 4, MV50XX, ATA_SA150, "88SX5041" },
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{ ATA_M88SX5080, 0, 8, MV50XX, ATA_SA150, "88SX5080" },
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{ ATA_M88SX5081, 0, 8, MV50XX, ATA_SA150, "88SX5081" },
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{ ATA_M88SX6041, 0, 4, MV60XX, ATA_SA300, "88SX6041" },
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{ ATA_M88SX6081, 0, 8, MV60XX, ATA_SA300, "88SX6081" },
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{ ATA_M88SX6101, 0, 1, MV61XX, ATA_UDMA6, "88SX6101" },
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{ ATA_M88SX6145, 0, 2, MV61XX, ATA_UDMA6, "88SX6145" },
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{ 0, 0, 0, 0, 0, 0}};
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char buffer[64];
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@ -2326,12 +2331,62 @@ ata_marvell_ident(device_t dev)
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idx->text, ata_mode2str(idx->max_dma));
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device_set_desc_copy(dev, buffer);
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ctlr->chip = idx;
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ctlr->chipinit = ata_marvell_chipinit;
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switch (ctlr->chip->cfg2) {
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case MV50XX:
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case MV60XX:
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ctlr->chipinit = ata_marvell_edma_chipinit;
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break;
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case MV61XX:
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ctlr->chipinit = ata_marvell_pata_chipinit;
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break;
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}
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return 0;
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}
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static int
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ata_marvell_chipinit(device_t dev)
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ata_marvell_pata_chipinit(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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if (ata_setup_interrupt(dev))
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return ENXIO;
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ctlr->allocate = ata_marvell_pata_allocate;
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ctlr->setmode = ata_marvell_pata_setmode;
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ctlr->channels = ctlr->chip->cfg1;
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return 0;
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}
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static int
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ata_marvell_pata_allocate(device_t dev)
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{
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struct ata_channel *ch = device_get_softc(dev);
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/* setup the usual register normal pci style */
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if (ata_pci_allocate(dev))
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return ENXIO;
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/* dont use 32 bit PIO transfers */
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ch->flags |= ATA_USE_16BIT;
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return 0;
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}
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static void
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ata_marvell_pata_setmode(device_t dev, int mode)
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{
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device_t gparent = GRANDPARENT(dev);
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struct ata_pci_controller *ctlr = device_get_softc(gparent);
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struct ata_device *atadev = device_get_softc(dev);
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mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma);
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mode = ata_check_80pin(dev, mode);
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if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode))
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atadev->mode = mode;
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}
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static int
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ata_marvell_edma_chipinit(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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@ -2350,9 +2405,9 @@ ata_marvell_chipinit(device_t dev)
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/* mask all PCI interrupts */
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ATA_OUTL(ctlr->r_res1, 0x01d5c, 0x00000000);
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ctlr->allocate = ata_marvell_allocate;
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ctlr->reset = ata_marvell_reset;
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ctlr->dmainit = ata_marvell_dmainit;
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ctlr->allocate = ata_marvell_edma_allocate;
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ctlr->reset = ata_marvell_edma_reset;
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ctlr->dmainit = ata_marvell_edma_dmainit;
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ctlr->setmode = ata_sata_setmode;
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ctlr->channels = ctlr->chip->cfg1;
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@ -2378,7 +2433,7 @@ ata_marvell_chipinit(device_t dev)
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}
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static int
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ata_marvell_allocate(device_t dev)
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ata_marvell_edma_allocate(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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@ -2400,7 +2455,7 @@ ata_marvell_allocate(device_t dev)
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/* set SATA resources */
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switch (ctlr->chip->cfg2) {
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case MV5XXX:
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case MV50XX:
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ch->r_io[ATA_SSTATUS].res = ctlr->r_res1;
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ch->r_io[ATA_SSTATUS].offset = 0x00100 + ATA_MV_HOST_BASE(ch);
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ch->r_io[ATA_SERROR].res = ctlr->r_res1;
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@ -2408,7 +2463,7 @@ ata_marvell_allocate(device_t dev)
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ch->r_io[ATA_SCONTROL].res = ctlr->r_res1;
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ch->r_io[ATA_SCONTROL].offset = 0x00108 + ATA_MV_HOST_BASE(ch);
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break;
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case MV6XXX:
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case MV60XX:
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ch->r_io[ATA_SSTATUS].res = ctlr->r_res1;
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ch->r_io[ATA_SSTATUS].offset = 0x02300 + ATA_MV_EDMA_BASE(ch);
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ch->r_io[ATA_SERROR].res = ctlr->r_res1;
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@ -2423,9 +2478,9 @@ ata_marvell_allocate(device_t dev)
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ch->flags |= ATA_NO_SLAVE;
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ch->flags |= ATA_USE_16BIT; /* XXX SOS needed ? */
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ata_generic_hw(dev);
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ch->hw.begin_transaction = ata_marvell_begin_transaction;
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ch->hw.end_transaction = ata_marvell_end_transaction;
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ch->hw.status = ata_marvell_status;
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ch->hw.begin_transaction = ata_marvell_edma_begin_transaction;
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ch->hw.end_transaction = ata_marvell_edma_end_transaction;
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ch->hw.status = ata_marvell_edma_status;
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/* disable the EDMA machinery */
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ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002);
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@ -2468,7 +2523,7 @@ ata_marvell_allocate(device_t dev)
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}
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static int
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ata_marvell_status(device_t dev)
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ata_marvell_edma_status(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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@ -2522,7 +2577,7 @@ ata_marvell_status(device_t dev)
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/* must be called with ATA channel locked and state_mtx held */
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static int
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ata_marvell_begin_transaction(struct ata_request *request)
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ata_marvell_edma_begin_transaction(struct ata_request *request)
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{
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struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev));
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struct ata_channel *ch = device_get_softc(device_get_parent(request->dev));
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@ -2614,7 +2669,7 @@ ata_marvell_begin_transaction(struct ata_request *request)
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/* must be called with ATA channel locked and state_mtx held */
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static int
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ata_marvell_end_transaction(struct ata_request *request)
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ata_marvell_edma_end_transaction(struct ata_request *request)
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{
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struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev));
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struct ata_channel *ch = device_get_softc(device_get_parent(request->dev));
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@ -2668,7 +2723,7 @@ ata_marvell_end_transaction(struct ata_request *request)
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}
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static void
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ata_marvell_reset(device_t dev)
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ata_marvell_edma_reset(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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@ -2695,7 +2750,8 @@ ata_marvell_reset(device_t dev)
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}
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static void
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ata_marvell_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
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ata_marvell_edma_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs,
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int error)
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{
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struct ata_dmasetprd_args *args = xsc;
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struct ata_marvell_dma_prdentry *prd = args->dmatab;
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@ -2713,14 +2769,14 @@ ata_marvell_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
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}
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static void
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ata_marvell_dmainit(device_t dev)
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ata_marvell_edma_dmainit(device_t dev)
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{
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struct ata_channel *ch = device_get_softc(dev);
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ata_dmainit(dev);
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if (ch->dma) {
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/* note start and stop are not used here */
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ch->dma->setprd = ata_marvell_dmasetprd;
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ch->dma->setprd = ata_marvell_edma_dmasetprd;
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}
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}
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@ -188,6 +188,8 @@ struct ata_connect_task {
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#define ATA_M88SX5081 0x508111ab
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#define ATA_M88SX6041 0x604111ab
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#define ATA_M88SX6081 0x608111ab
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#define ATA_M88SX6101 0x610111ab
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#define ATA_M88SX6145 0x614511ab
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#define ATA_MICRON_ID 0x1042
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#define ATA_MICRON_RZ1000 0x10001042
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@ -365,8 +367,9 @@ struct ata_connect_task {
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#define HPT374 3
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#define HPTOLD 0x01
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#define MV5XXX 5
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#define MV6XXX 6
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#define MV50XX 50
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#define MV60XX 60
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#define MV61XX 61
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#define PROLD 0
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#define PRNEW 1
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