diff --git a/sys/boot/i386/efi/ldscript.amd64 b/sys/boot/i386/efi/ldscript.amd64 index 9c5a29b56dc3..f99e730275de 100644 --- a/sys/boot/i386/efi/ldscript.amd64 +++ b/sys/boot/i386/efi/ldscript.amd64 @@ -1,5 +1,5 @@ /* $FreeBSD$ */ -OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64") +OUTPUT_FORMAT("elf64-x86-64-freebsd", "elf64-x86-64-freebsd", "elf64-x86-64-freebsd") OUTPUT_ARCH(i386:x86-64) ENTRY(_start) SECTIONS diff --git a/sys/boot/ia64/efi/ldscript.ia64 b/sys/boot/ia64/efi/ldscript.ia64 index 0f79b670e027..0d7901fe75a5 100644 --- a/sys/boot/ia64/efi/ldscript.ia64 +++ b/sys/boot/ia64/efi/ldscript.ia64 @@ -1,5 +1,5 @@ /* $FreeBSD$ */ -OUTPUT_FORMAT("elf64-ia64-little", "elf64-ia64-little", "elf64-ia64-little") +OUTPUT_FORMAT("elf64-ia64-freebsd", "elf64-ia64-freebsd", "elf64-ia64-freebsd") OUTPUT_ARCH(ia64) ENTRY(_start_plabel) SECTIONS @@ -16,17 +16,15 @@ SECTIONS *(.plt) } =0x00300000010070000002000001000400 . = ALIGN(4096); + __start_set_Xcommand_set = .; + set_Xcommand_set : { *(set_Xcommand_set) } + __stop_set_Xcommand_set = .; .data : { *(.rodata .rodata.* .gnu.linkonce.r.*) *(.rodata1) *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) *(.opd) - *(.IA_64.unwind_info* .gnu.linkonce.ia64unwi.*) - *(.IA_64.unwind* .gnu.linkonce.ia64unw.*) - __start_set_Xcommand_set = .; - *(set_Xcommand_set) - __stop_set_Xcommand_set = .; *(.data .data.* .gnu.linkonce.d.*) *(.data1) *(.plabel) @@ -34,6 +32,8 @@ SECTIONS *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) } + .IA_64.unwind_info : { *(.IA_64.unwind_info* .gnu.linkonce.ia64unwi.*) } + .IA_64.unwind : { *(.IA_64.unwind* .gnu.linkonce.ia64unw.*) } . = ALIGN(4096); __gp = .; .sdata : { diff --git a/sys/boot/ia64/ski/ldscript.ia64 b/sys/boot/ia64/ski/ldscript.ia64 index e4e1dad0bd91..e7a303f574b2 100644 --- a/sys/boot/ia64/ski/ldscript.ia64 +++ b/sys/boot/ia64/ski/ldscript.ia64 @@ -1,5 +1,5 @@ /* $FreeBSD$ */ -OUTPUT_FORMAT("elf64-ia64-little", "elf64-ia64-little", "elf64-ia64-little") +OUTPUT_FORMAT("elf64-ia64-freebsd", "elf64-ia64-freebsd", "elf64-ia64-freebsd") OUTPUT_ARCH(ia64) ENTRY(_start) SECTIONS @@ -12,17 +12,15 @@ SECTIONS *(.gnu.warning) *(.plt) } =0x00300000010070000002000001000400 + __start_set_Xcommand_set = .; + set_Xcommand_set : { *(set_Xcommand_set) } + __stop_set_Xcommand_set = .; .data : { *(.rodata .rodata.* .gnu.linkonce.r.*) *(.rodata1) *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) *(.opd) - *(.IA_64.unwind_info* .gnu.linkonce.ia64unwi.*) - *(.IA_64.unwind* .gnu.linkonce.ia64unw.*) - __start_set_Xcommand_set = .; - *(set_Xcommand_set) - __stop_set_Xcommand_set = .; *(.data .data.* .gnu.linkonce.d.*) *(.data1) *(.plabel) @@ -30,6 +28,8 @@ SECTIONS *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) } + .IA_64.unwind_info : { *(.IA_64.unwind_info* .gnu.linkonce.ia64unwi.*) } + .IA_64.unwind : { *(.IA_64.unwind* .gnu.linkonce.ia64unw.*) } __gp = .; .sdata : { *(.got.plt .got) diff --git a/sys/boot/pc98/boot2/boot2.c b/sys/boot/pc98/boot2/boot2.c index 59bbec7e9111..d345cfc69f3a 100644 --- a/sys/boot/pc98/boot2/boot2.c +++ b/sys/boot/pc98/boot2/boot2.c @@ -484,23 +484,6 @@ load(void) p += roundup2(hdr.ex.a_text, PAGE_SIZE); if (xfsread(ino, p, hdr.ex.a_data)) return; - p += hdr.ex.a_data + roundup2(hdr.ex.a_bss, PAGE_SIZE); - bootinfo.bi_symtab = VTOP(p); - *(uint32_t*)p = hdr.ex.a_syms; - p += sizeof(hdr.ex.a_syms); - if (hdr.ex.a_syms) { - if (xfsread(ino, p, hdr.ex.a_syms)) - return; - p += hdr.ex.a_syms; - if (xfsread(ino, p, sizeof(int))) - return; - x = *(uint32_t *)p; - p += sizeof(int); - x -= sizeof(int); - if (xfsread(ino, p, x)) - return; - p += x; - } } else { fs_off = hdr.eh.e_phoff; for (j = i = 0; i < hdr.eh.e_phnum && j < 2; i++) { @@ -532,8 +515,8 @@ load(void) } } addr = hdr.eh.e_entry & 0xffffff; + bootinfo.bi_esymtab = VTOP(p); } - bootinfo.bi_esymtab = VTOP(p); bootinfo.bi_kernelname = VTOP(kname); bootinfo.bi_bios_dev = dsk.daua; __exec((caddr_t)addr, RB_BOOTINFO | (opts & RBX_MASK), diff --git a/sys/boot/powerpc/boot1.chrp/boot1.c b/sys/boot/powerpc/boot1.chrp/boot1.c index 6a6ad073fbd8..f5bc4d575498 100644 --- a/sys/boot/powerpc/boot1.chrp/boot1.c +++ b/sys/boot/powerpc/boot1.chrp/boot1.c @@ -103,6 +103,7 @@ ofwh_t stdinh, stdouth; __asm(" \n\ .data \n\ + .align 4 \n\ stack: \n\ .space 16384 \n\ \n\ diff --git a/sys/boot/powerpc/ofw/start.c b/sys/boot/powerpc/ofw/start.c index 1988b3c22cf2..911a2ec2af77 100644 --- a/sys/boot/powerpc/ofw/start.c +++ b/sys/boot/powerpc/ofw/start.c @@ -40,6 +40,7 @@ void startup(void *, int, int (*)(void *), char *, int); __asm(" \n\ .data \n\ + .align 4 \n\ stack: \n\ .space 16388 \n\ \n\ diff --git a/sys/conf/kern.mk b/sys/conf/kern.mk index 8d016608814f..01b1438666b9 100644 --- a/sys/conf/kern.mk +++ b/sys/conf/kern.mk @@ -81,6 +81,13 @@ CFLAGS+= -msoft-float -mno-altivec INLINE_LIMIT?= 15000 .endif +# +# Use dot symbols on powerpc64 to make ddb happy +# +.if ${MACHINE_ARCH} == "powerpc64" +CFLAGS+= -mcall-aixdesc +.endif + # # For MIPS we also tell gcc to use floating point emulation # diff --git a/sys/conf/ldscript.amd64 b/sys/conf/ldscript.amd64 index 68ab1a2c7e4e..ce275ef6c365 100644 --- a/sys/conf/ldscript.amd64 +++ b/sys/conf/ldscript.amd64 @@ -1,14 +1,15 @@ /* $FreeBSD$ */ -OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64") +OUTPUT_FORMAT("elf64-x86-64-freebsd", "elf64-x86-64-freebsd", "elf64-x86-64-freebsd") OUTPUT_ARCH(i386:x86-64) ENTRY(btext) SEARCH_DIR("/usr/lib"); SECTIONS { /* Read-only sections, merged into text segment: */ - . = kernbase + 0x00100000 + SIZEOF_HEADERS; + . = kernbase + CONSTANT (MAXPAGESIZE) + SIZEOF_HEADERS; .interp : { *(.interp) } .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } .dynsym : { *(.dynsym) } .dynstr : { *(.dynstr) } .gnu.version : { *(.gnu.version) } @@ -22,6 +23,8 @@ SECTIONS .rela.fini : { *(.rela.fini) } .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } + .rel.data.rel.ro : { *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*) } + .rela.data.rel.ro : { *(.rela.data.rel.ro* .rela.gnu.linkonce.d.rel.ro.*) } .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } @@ -36,6 +39,12 @@ SECTIONS .rela.got : { *(.rela.got) } .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } + .rel.ldata : { *(.rel.ldata .rel.ldata.* .rel.gnu.linkonce.l.*) } + .rela.ldata : { *(.rela.ldata .rela.ldata.* .rela.gnu.linkonce.l.*) } + .rel.lbss : { *(.rel.lbss .rel.lbss.* .rel.gnu.linkonce.lb.*) } + .rela.lbss : { *(.rela.lbss .rela.lbss.* .rela.gnu.linkonce.lb.*) } + .rel.lrodata : { *(.rel.lrodata .rel.lrodata.* .rel.gnu.linkonce.lr.*) } + .rela.lrodata : { *(.rela.lrodata .rela.lrodata.* .rela.gnu.linkonce.lr.*) } .rel.plt : { *(.rel.plt) } .rela.plt : { *(.rela.plt) } .init : @@ -46,6 +55,7 @@ SECTIONS .text : { *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) } =0x90909090 @@ -59,34 +69,37 @@ SECTIONS .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } .rodata1 : { *(.rodata1) } .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } /* Adjust the address for the data segment. We want to adjust up to the same address within the page on the next page up. */ - . = DATA_SEGMENT_ALIGN(0x100000, 0x1000); - /* Ensure the __preinit_array_start label is properly aligned. We - could instead move the label definition inside the section, but - the linker would then create the section even if it turns out to - be empty, which isn't pretty. */ - . = ALIGN(64 / 8); - PROVIDE (__preinit_array_start = .); - .preinit_array : { *(.preinit_array) } - PROVIDE (__preinit_array_end = .); - PROVIDE (__init_array_start = .); - .init_array : { *(.init_array) } - PROVIDE (__init_array_end = .); - PROVIDE (__fini_array_start = .); - .fini_array : { *(.fini_array) } - PROVIDE (__fini_array_end = .); - .data : - { - *(.data .data.* .gnu.linkonce.d.*) - SORT(CONSTRUCTORS) - } - .data1 : { *(.data1) } + . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE)); + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } + /* Thread Local Storage sections */ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } - .eh_frame : { KEEP (*(.eh_frame)) } - .gcc_except_table : { *(.gcc_except_table) } - .dynamic : { *(.dynamic) } + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + } + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } _start_ctors = .; PROVIDE (start_ctors = .); .ctors : @@ -101,11 +114,12 @@ SECTIONS doesn't matter which directory crtbegin.o is in. */ KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) /* We don't want to include the .ctor section from - from the crtend.o file until after the sorted ctors. + the crtend.o file until after the sorted ctors. The .ctor section from the crtend file contains the end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) } @@ -114,14 +128,25 @@ SECTIONS .dtors : { KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) } .jcr : { KEEP (*(.jcr)) } - .got : { *(.got.plt) *(.got) } - _edata = .; - PROVIDE (edata = .); + .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) } + .dynamic : { *(.dynamic) } + .got : { *(.got) } + . = DATA_SEGMENT_RELRO_END (24, .); + .got.plt : { *(.got.plt) } + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } + .data1 : { *(.data1) } + _edata = .; PROVIDE (edata = .); __bss_start = .; .bss : { @@ -130,12 +155,29 @@ SECTIONS *(COMMON) /* Align here to ensure that the .bss section occupies space up to _end. Align after .bss to ensure correct alignment even if the - .bss section disappears because there are no input sections. */ - . = ALIGN(64 / 8); + .bss section disappears because there are no input sections. + FIXME: Why do we need it? When there is no .bss section, we don't + pad the .data section. */ + . = ALIGN(. != 0 ? 64 / 8 : 1); + } + .lbss : + { + *(.dynlbss) + *(.lbss .lbss.* .gnu.linkonce.lb.*) + *(LARGE_COMMON) } . = ALIGN(64 / 8); - _end = .; - PROVIDE (end = .); + .lrodata ALIGN(CONSTANT (MAXPAGESIZE)) + (. & (CONSTANT (MAXPAGESIZE) - 1)) : + { + *(.lrodata .lrodata.* .gnu.linkonce.lr.*) + } + .ldata ALIGN(CONSTANT (MAXPAGESIZE)) + (. & (CONSTANT (MAXPAGESIZE) - 1)) : + { + *(.ldata .ldata.* .gnu.linkonce.l.*) + . = ALIGN(. != 0 ? 64 / 8 : 1); + } + . = ALIGN(64 / 8); + _end = .; PROVIDE (end = .); . = DATA_SEGMENT_END (.); /* Stabs debugging sections. */ .stab 0 : { *(.stab) } @@ -170,4 +212,9 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } } diff --git a/sys/conf/ldscript.i386 b/sys/conf/ldscript.i386 index a94f32fdd4c2..8617821977ba 100644 --- a/sys/conf/ldscript.i386 +++ b/sys/conf/ldscript.i386 @@ -7,104 +7,165 @@ SECTIONS { /* Read-only sections, merged into text segment: */ . = kernbase + kernload + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rel.text : - { *(.rel.text) *(.rel.gnu.linkonce.t*) } - .rela.text : - { *(.rela.text) *(.rela.gnu.linkonce.t*) } - .rel.data : - { *(.rel.data) *(.rel.gnu.linkonce.d*) } - .rela.data : - { *(.rela.data) *(.rela.gnu.linkonce.d*) } - .rel.rodata : - { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } - .rela.rodata : - { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.init : { *(.rel.init) } - .rela.init : { *(.rela.init) } - .rel.fini : { *(.rel.fini) } - .rela.fini : { *(.rela.fini) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } =0x9090 - .plt : { *(.plt) } - .text : + .interp : { *(.interp) } + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } + .rel.data.rel.ro : { *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*) } + .rela.data.rel.ro : { *(.rela.data.rel.ro* .rela.gnu.linkonce.d.rel.ro.*) } + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { - *(.text) - *(.stub) + KEEP (*(.init)) + } =0x90909090 + .plt : { *(.plt) } + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) - *(.gnu.linkonce.t*) - } =0x9090 - _etext = .; + } =0x90909090 + .fini : + { + KEEP (*(.fini)) + } =0x90909090 + PROVIDE (__etext = .); + PROVIDE (_etext = .); PROVIDE (etext = .); - .fini : { *(.fini) } =0x9090 - .rodata : { *(.rodata) *(.gnu.linkonce.r*) } - .rodata1 : { *(.rodata1) } + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } + .rodata1 : { *(.rodata1) } + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } /* Adjust the address for the data segment. We want to adjust up to the same address within the page on the next page up. */ - . = ALIGN(0x1000) + (. & (0x1000 - 1)) ; - .data : + . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE)); + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } + .preinit_array : { - *(.data) - *(.gnu.linkonce.d*) - CONSTRUCTORS + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + } + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); } - .data1 : { *(.data1) } - . = ALIGN(32 / 8); _start_ctors = .; PROVIDE (start_ctors = .); - .ctors : + .ctors : { - *(.ctors) + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) } _stop_ctors = .; PROVIDE (stop_ctors = .); - .dtors : + .dtors : { - *(.dtors) + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) } - .got : { *(.got.plt) *(.got) } - .dynamic : { *(.dynamic) } - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - .sdata : { *(.sdata) } - _edata = .; - PROVIDE (edata = .); + .jcr : { KEEP (*(.jcr)) } + .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) } + .dynamic : { *(.dynamic) } + .got : { *(.got) } + . = DATA_SEGMENT_RELRO_END (12, .); + .got.plt : { *(.got.plt) } + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } + .data1 : { *(.data1) } + _edata = .; PROVIDE (edata = .); __bss_start = .; - .sbss : { *(.sbss) *(.scommon) } - .bss : + .bss : { *(.dynbss) - *(.bss) + *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. + FIXME: Why do we need it? When there is no .bss section, we don't + pad the .data section. */ + . = ALIGN(. != 0 ? 32 / 8 : 1); } . = ALIGN(32 / 8); - _end = . ; - PROVIDE (end = .); + . = ALIGN(32 / 8); + _end = .; PROVIDE (end = .); + . = DATA_SEGMENT_END (.); /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } + .comment 0 : { *(.comment) } /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ @@ -118,7 +179,7 @@ SECTIONS .debug_aranges 0 : { *(.debug_aranges) } .debug_pubnames 0 : { *(.debug_pubnames) } /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } .debug_abbrev 0 : { *(.debug_abbrev) } .debug_line 0 : { *(.debug_line) } .debug_frame 0 : { *(.debug_frame) } @@ -130,5 +191,9 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - /* These must appear regardless of . */ + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } } diff --git a/sys/conf/ldscript.ia64 b/sys/conf/ldscript.ia64 index 9e182ae339f0..f980dba33813 100644 --- a/sys/conf/ldscript.ia64 +++ b/sys/conf/ldscript.ia64 @@ -1,5 +1,5 @@ /* $FreeBSD$ */ -OUTPUT_FORMAT("elf64-ia64-little", "elf64-ia64-little", "elf64-ia64-little") +OUTPUT_FORMAT("elf64-ia64-freebsd", "elf64-ia64-freebsd", "elf64-ia64-freebsd") OUTPUT_ARCH(ia64) ENTRY(__start) SEARCH_DIR(/usr/lib); diff --git a/sys/conf/ldscript.sparc64 b/sys/conf/ldscript.sparc64 index 8d47965005ea..84871c27303f 100644 --- a/sys/conf/ldscript.sparc64 +++ b/sys/conf/ldscript.sparc64 @@ -1,6 +1,6 @@ /* $FreeBSD$ */ -OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", - "elf64-sparc") +OUTPUT_FORMAT("elf64-sparc-freebsd", "elf64-sparc-freebsd", + "elf64-sparc-freebsd") OUTPUT_ARCH(sparc:v9) ENTRY(_start) SEARCH_DIR(/usr/lib); diff --git a/sys/ddb/db_command.c b/sys/ddb/db_command.c index 7fab5c28a7f2..ba9c094aa367 100644 --- a/sys/ddb/db_command.c +++ b/sys/ddb/db_command.c @@ -723,10 +723,16 @@ static void db_gdb(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) { - if (kdb_dbbe_select("gdb") != 0) + if (kdb_dbbe_select("gdb") != 0) { db_printf("The remote GDB backend could not be selected.\n"); - else - db_printf("Step to enter the remote GDB backend.\n"); + return; + } + /* + * Mark that we are done in the debugger. kdb_trap() + * should re-enter with the new backend. + */ + db_cmd_loop_done = 1; + db_printf("(ctrl-c will return control to ddb)\n"); } static void diff --git a/sys/dev/dc/if_dc.c b/sys/dev/dc/if_dc.c index 29125bf0b603..390b5cf7c7c2 100644 --- a/sys/dev/dc/if_dc.c +++ b/sys/dev/dc/if_dc.c @@ -127,7 +127,7 @@ __FBSDID("$FreeBSD$"); #include #include -#define DC_USEIOSPACE +#define DC_USEIOSPACE #include @@ -233,7 +233,8 @@ static int dc_detach(device_t); static int dc_suspend(device_t); static int dc_resume(device_t); static const struct dc_type *dc_devtype(device_t); -static int dc_newbuf(struct dc_softc *, int, int); +static void dc_discard_rxbuf(struct dc_softc *, int); +static int dc_newbuf(struct dc_softc *, int); static int dc_encap(struct dc_softc *, struct mbuf **); static void dc_pnic_rx_bug_war(struct dc_softc *, int); static int dc_rx_resync(struct dc_softc *); @@ -253,19 +254,23 @@ static int dc_shutdown(device_t); static int dc_ifmedia_upd(struct ifnet *); static void dc_ifmedia_sts(struct ifnet *, struct ifmediareq *); +static int dc_dma_alloc(struct dc_softc *); +static void dc_dma_free(struct dc_softc *); +static void dc_dma_map_addr(void *, bus_dma_segment_t *, int, int); + static void dc_delay(struct dc_softc *); static void dc_eeprom_idle(struct dc_softc *); static void dc_eeprom_putbyte(struct dc_softc *, int); -static void dc_eeprom_getword(struct dc_softc *, int, u_int16_t *); -static void dc_eeprom_getword_pnic(struct dc_softc *, int, u_int16_t *); -static void dc_eeprom_getword_xircom(struct dc_softc *, int, u_int16_t *); +static void dc_eeprom_getword(struct dc_softc *, int, uint16_t *); +static void dc_eeprom_getword_pnic(struct dc_softc *, int, uint16_t *); +static void dc_eeprom_getword_xircom(struct dc_softc *, int, uint16_t *); static void dc_eeprom_width(struct dc_softc *); static void dc_read_eeprom(struct dc_softc *, caddr_t, int, int, int); static void dc_mii_writebit(struct dc_softc *, int); static int dc_mii_readbit(struct dc_softc *); static void dc_mii_sync(struct dc_softc *); -static void dc_mii_send(struct dc_softc *, u_int32_t, int); +static void dc_mii_send(struct dc_softc *, uint32_t, int); static int dc_mii_readreg(struct dc_softc *, struct dc_mii_frame *); static int dc_mii_writereg(struct dc_softc *, struct dc_mii_frame *); static int dc_miibus_readreg(device_t, int, int); @@ -296,11 +301,11 @@ static void dc_apply_fixup(struct dc_softc *, int); static int dc_check_multiport(struct dc_softc *); #ifdef DC_USEIOSPACE -#define DC_RES SYS_RES_IOPORT -#define DC_RID DC_PCI_CFBIO +#define DC_RES SYS_RES_IOPORT +#define DC_RID DC_PCI_CFBIO #else -#define DC_RES SYS_RES_MEMORY -#define DC_RID DC_PCI_CFBMA +#define DC_RES SYS_RES_MEMORY +#define DC_RID DC_PCI_CFBMA #endif static device_method_t dc_methods[] = { @@ -336,14 +341,14 @@ static devclass_t dc_devclass; DRIVER_MODULE(dc, pci, dc_driver, dc_devclass, 0, 0); DRIVER_MODULE(miibus, dc, miibus_driver, miibus_devclass, 0, 0); -#define DC_SETBIT(sc, reg, x) \ +#define DC_SETBIT(sc, reg, x) \ CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x)) -#define DC_CLRBIT(sc, reg, x) \ +#define DC_CLRBIT(sc, reg, x) \ CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x)) -#define SIO_SET(x) DC_SETBIT(sc, DC_SIO, (x)) -#define SIO_CLR(x) DC_CLRBIT(sc, DC_SIO, (x)) +#define SIO_SET(x) DC_SETBIT(sc, DC_SIO, (x)) +#define SIO_CLR(x) DC_CLRBIT(sc, DC_SIO, (x)) static void dc_delay(struct dc_softc *sc) @@ -490,10 +495,10 @@ dc_eeprom_putbyte(struct dc_softc *sc, int addr) * the EEPROM. */ static void -dc_eeprom_getword_pnic(struct dc_softc *sc, int addr, u_int16_t *dest) +dc_eeprom_getword_pnic(struct dc_softc *sc, int addr, uint16_t *dest) { int i; - u_int32_t r; + uint32_t r; CSR_WRITE_4(sc, DC_PN_SIOCTL, DC_PN_EEOPCODE_READ | addr); @@ -501,7 +506,7 @@ dc_eeprom_getword_pnic(struct dc_softc *sc, int addr, u_int16_t *dest) DELAY(1); r = CSR_READ_4(sc, DC_SIO); if (!(r & DC_PN_SIOCTL_BUSY)) { - *dest = (u_int16_t)(r & 0xFFFF); + *dest = (uint16_t)(r & 0xFFFF); return; } } @@ -513,17 +518,17 @@ dc_eeprom_getword_pnic(struct dc_softc *sc, int addr, u_int16_t *dest) * the EEPROM, too. */ static void -dc_eeprom_getword_xircom(struct dc_softc *sc, int addr, u_int16_t *dest) +dc_eeprom_getword_xircom(struct dc_softc *sc, int addr, uint16_t *dest) { SIO_SET(DC_SIO_ROMSEL | DC_SIO_ROMCTL_READ); addr *= 2; CSR_WRITE_4(sc, DC_ROM, addr | 0x160); - *dest = (u_int16_t)CSR_READ_4(sc, DC_SIO) & 0xff; + *dest = (uint16_t)CSR_READ_4(sc, DC_SIO) & 0xff; addr += 1; CSR_WRITE_4(sc, DC_ROM, addr | 0x160); - *dest |= ((u_int16_t)CSR_READ_4(sc, DC_SIO) & 0xff) << 8; + *dest |= ((uint16_t)CSR_READ_4(sc, DC_SIO) & 0xff) << 8; SIO_CLR(DC_SIO_ROMSEL | DC_SIO_ROMCTL_READ); } @@ -532,10 +537,10 @@ dc_eeprom_getword_xircom(struct dc_softc *sc, int addr, u_int16_t *dest) * Read a word of data stored in the EEPROM at address 'addr.' */ static void -dc_eeprom_getword(struct dc_softc *sc, int addr, u_int16_t *dest) +dc_eeprom_getword(struct dc_softc *sc, int addr, uint16_t *dest) { int i; - u_int16_t word = 0; + uint16_t word = 0; /* Force EEPROM to idle state. */ dc_eeprom_idle(sc); @@ -581,7 +586,7 @@ static void dc_read_eeprom(struct dc_softc *sc, caddr_t dest, int off, int cnt, int be) { int i; - u_int16_t word = 0, *ptr; + uint16_t word = 0, *ptr; for (i = 0; i < cnt; i++) { if (DC_IS_PNIC(sc)) @@ -590,7 +595,7 @@ dc_read_eeprom(struct dc_softc *sc, caddr_t dest, int off, int cnt, int be) dc_eeprom_getword_xircom(sc, off + i, &word); else dc_eeprom_getword(sc, off + i, &word); - ptr = (u_int16_t *)(dest + (i * 2)); + ptr = (uint16_t *)(dest + (i * 2)); if (be) *ptr = be16toh(word); else @@ -675,7 +680,7 @@ dc_mii_sync(struct dc_softc *sc) * Clock a series of bits through the MII. */ static void -dc_mii_send(struct dc_softc *sc, u_int32_t bits, int cnt) +dc_mii_send(struct dc_softc *sc, uint32_t bits, int cnt) { int i; @@ -1011,9 +1016,9 @@ dc_miibus_mediainit(device_t dev) ifmedia_add(ifm, IFM_ETHER | IFM_HPNA_1, 0, NULL); } -#define DC_BITS_512 9 -#define DC_BITS_128 7 -#define DC_BITS_64 6 +#define DC_BITS_512 9 +#define DC_BITS_128 7 +#define DC_BITS_64 6 static uint32_t dc_mchash_le(struct dc_softc *sc, const uint8_t *addr) @@ -1077,7 +1082,7 @@ dc_setfilt_21143(struct dc_softc *sc) { uint16_t eaddr[(ETHER_ADDR_LEN+1)/2]; struct dc_desc *sframe; - u_int32_t h, *sp; + uint32_t h, *sp; struct ifmultiaddr *ifma; struct ifnet *ifp; int i; @@ -1087,11 +1092,11 @@ dc_setfilt_21143(struct dc_softc *sc) i = sc->dc_cdata.dc_tx_prod; DC_INC(sc->dc_cdata.dc_tx_prod, DC_TX_LIST_CNT); sc->dc_cdata.dc_tx_cnt++; - sframe = &sc->dc_ldata->dc_tx_list[i]; + sframe = &sc->dc_ldata.dc_tx_list[i]; sp = sc->dc_cdata.dc_sbuf; bzero(sp, DC_SFRAME_LEN); - sframe->dc_data = htole32(sc->dc_saddr); + sframe->dc_data = htole32(DC_ADDR_LO(sc->dc_saddr)); sframe->dc_ctl = htole32(DC_SFRAME_LEN | DC_TXCTL_SETUP | DC_TXCTL_TLINK | DC_FILTER_HASHPERF | DC_TXCTL_FINT); @@ -1130,6 +1135,7 @@ dc_setfilt_21143(struct dc_softc *sc) sp[41] = DC_SP_MAC(eaddr[2]); sframe->dc_status = htole32(DC_TXSTAT_OWN); + bus_dmamap_sync(sc->dc_stag, sc->dc_smap, BUS_DMASYNC_PREWRITE); CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF); /* @@ -1150,7 +1156,7 @@ dc_setfilt_admtek(struct dc_softc *sc) struct ifnet *ifp; struct ifmultiaddr *ifma; int h = 0; - u_int32_t hashes[2] = { 0, 0 }; + uint32_t hashes[2] = { 0, 0 }; ifp = sc->dc_ifp; @@ -1211,7 +1217,7 @@ dc_setfilt_asix(struct dc_softc *sc) struct ifnet *ifp; struct ifmultiaddr *ifma; int h = 0; - u_int32_t hashes[2] = { 0, 0 }; + uint32_t hashes[2] = { 0, 0 }; ifp = sc->dc_ifp; @@ -1281,7 +1287,7 @@ dc_setfilt_xircom(struct dc_softc *sc) struct ifnet *ifp; struct ifmultiaddr *ifma; struct dc_desc *sframe; - u_int32_t h, *sp; + uint32_t h, *sp; int i; ifp = sc->dc_ifp; @@ -1290,11 +1296,11 @@ dc_setfilt_xircom(struct dc_softc *sc) i = sc->dc_cdata.dc_tx_prod; DC_INC(sc->dc_cdata.dc_tx_prod, DC_TX_LIST_CNT); sc->dc_cdata.dc_tx_cnt++; - sframe = &sc->dc_ldata->dc_tx_list[i]; + sframe = &sc->dc_ldata.dc_tx_list[i]; sp = sc->dc_cdata.dc_sbuf; bzero(sp, DC_SFRAME_LEN); - sframe->dc_data = htole32(sc->dc_saddr); + sframe->dc_data = htole32(DC_ADDR_LO(sc->dc_saddr)); sframe->dc_ctl = htole32(DC_SFRAME_LEN | DC_TXCTL_SETUP | DC_TXCTL_TLINK | DC_FILTER_HASHPERF | DC_TXCTL_FINT); @@ -1334,8 +1340,8 @@ dc_setfilt_xircom(struct dc_softc *sc) DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON); DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ON); - ifp->if_drv_flags |= IFF_DRV_RUNNING; sframe->dc_status = htole32(DC_TXSTAT_OWN); + bus_dmamap_sync(sc->dc_stag, sc->dc_smap, BUS_DMASYNC_PREWRITE); CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF); /* @@ -1373,7 +1379,7 @@ static void dc_setcfg(struct dc_softc *sc, int media) { int i, restart = 0, watchdogreg; - u_int32_t isr; + uint32_t isr; if (IFM_SUBTYPE(media) == IFM_NONE) return; @@ -1557,8 +1563,8 @@ static const struct dc_type * dc_devtype(device_t dev) { const struct dc_type *t; - u_int32_t devid; - u_int8_t rev; + uint32_t devid; + uint8_t rev; t = dc_devs; devid = pci_get_devid(dev); @@ -1601,9 +1607,9 @@ static void dc_apply_fixup(struct dc_softc *sc, int media) { struct dc_mediainfo *m; - u_int8_t *p; + uint8_t *p; int i; - u_int32_t reg; + uint32_t reg; m = sc->dc_mi; @@ -1662,11 +1668,11 @@ dc_decode_leaf_sia(struct dc_softc *sc, struct dc_eblock_sia *l) if (l->dc_sia_code & DC_SIA_CODE_EXT) { m->dc_gp_len = 2; m->dc_gp_ptr = - (u_int8_t *)&l->dc_un.dc_sia_ext.dc_sia_gpio_ctl; + (uint8_t *)&l->dc_un.dc_sia_ext.dc_sia_gpio_ctl; } else { m->dc_gp_len = 2; m->dc_gp_ptr = - (u_int8_t *)&l->dc_un.dc_sia_noext.dc_sia_gpio_ctl; + (uint8_t *)&l->dc_un.dc_sia_noext.dc_sia_gpio_ctl; } m->dc_next = sc->dc_mi; @@ -1693,7 +1699,7 @@ dc_decode_leaf_sym(struct dc_softc *sc, struct dc_eblock_sym *l) m->dc_media = IFM_100_TX | IFM_FDX; m->dc_gp_len = 2; - m->dc_gp_ptr = (u_int8_t *)&l->dc_sym_gpio_ctl; + m->dc_gp_ptr = (uint8_t *)&l->dc_sym_gpio_ctl; m->dc_next = sc->dc_mi; sc->dc_mi = m; @@ -1706,7 +1712,7 @@ static int dc_decode_leaf_mii(struct dc_softc *sc, struct dc_eblock_mii *l) { struct dc_mediainfo *m; - u_int8_t *p; + uint8_t *p; m = malloc(sizeof(struct dc_mediainfo), M_DEVBUF, M_NOWAIT | M_ZERO); if (m == NULL) { @@ -1717,7 +1723,7 @@ dc_decode_leaf_mii(struct dc_softc *sc, struct dc_eblock_mii *l) m->dc_media = IFM_AUTO; m->dc_gp_len = l->dc_gpr_len; - p = (u_int8_t *)l; + p = (uint8_t *)l; p += sizeof(struct dc_eblock_mii); m->dc_gp_ptr = p; p += 2 * l->dc_gpr_len; @@ -1807,7 +1813,7 @@ dc_parse_21143_srom(struct dc_softc *sc) static void dc_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) { - u_int32_t *paddr; + bus_addr_t *paddr; KASSERT(nseg == 1, ("%s: wrong number of segments (%d)", __func__, nseg)); @@ -1815,6 +1821,208 @@ dc_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) *paddr = segs->ds_addr; } +static int +dc_dma_alloc(struct dc_softc *sc) +{ + int error, i; + + error = bus_dma_tag_create(bus_get_dma_tag(sc->dc_dev), 1, 0, + BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, + BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT, 0, + NULL, NULL, &sc->dc_ptag); + if (error) { + device_printf(sc->dc_dev, + "failed to allocate parent DMA tag\n"); + goto fail; + } + + /* Allocate a busdma tag and DMA safe memory for TX/RX descriptors. */ + error = bus_dma_tag_create(sc->dc_ptag, DC_LIST_ALIGN, 0, + BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, DC_RX_LIST_SZ, 1, + DC_RX_LIST_SZ, 0, NULL, NULL, &sc->dc_rx_ltag); + if (error) { + device_printf(sc->dc_dev, "failed to create RX list DMA tag\n"); + goto fail; + } + + error = bus_dma_tag_create(sc->dc_ptag, DC_LIST_ALIGN, 0, + BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, DC_TX_LIST_SZ, 1, + DC_TX_LIST_SZ, 0, NULL, NULL, &sc->dc_tx_ltag); + if (error) { + device_printf(sc->dc_dev, "failed to create TX list DMA tag\n"); + goto fail; + } + + /* RX descriptor list. */ + error = bus_dmamem_alloc(sc->dc_rx_ltag, + (void **)&sc->dc_ldata.dc_rx_list, BUS_DMA_NOWAIT | + BUS_DMA_ZERO | BUS_DMA_COHERENT, &sc->dc_rx_lmap); + if (error) { + device_printf(sc->dc_dev, + "failed to allocate DMA'able memory for RX list\n"); + goto fail; + } + error = bus_dmamap_load(sc->dc_rx_ltag, sc->dc_rx_lmap, + sc->dc_ldata.dc_rx_list, DC_RX_LIST_SZ, dc_dma_map_addr, + &sc->dc_ldata.dc_rx_list_paddr, BUS_DMA_NOWAIT); + if (error) { + device_printf(sc->dc_dev, + "failed to load DMA'able memory for RX list\n"); + goto fail; + } + /* TX descriptor list. */ + error = bus_dmamem_alloc(sc->dc_tx_ltag, + (void **)&sc->dc_ldata.dc_tx_list, BUS_DMA_NOWAIT | + BUS_DMA_ZERO | BUS_DMA_COHERENT, &sc->dc_tx_lmap); + if (error) { + device_printf(sc->dc_dev, + "failed to allocate DMA'able memory for TX list\n"); + goto fail; + } + error = bus_dmamap_load(sc->dc_tx_ltag, sc->dc_tx_lmap, + sc->dc_ldata.dc_tx_list, DC_TX_LIST_SZ, dc_dma_map_addr, + &sc->dc_ldata.dc_tx_list_paddr, BUS_DMA_NOWAIT); + if (error) { + device_printf(sc->dc_dev, + "cannot load DMA'able memory for TX list\n"); + goto fail; + } + + /* + * Allocate a busdma tag and DMA safe memory for the multicast + * setup frame. + */ + error = bus_dma_tag_create(sc->dc_ptag, DC_LIST_ALIGN, 0, + BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, + DC_SFRAME_LEN + DC_MIN_FRAMELEN, 1, DC_SFRAME_LEN + DC_MIN_FRAMELEN, + 0, NULL, NULL, &sc->dc_stag); + if (error) { + device_printf(sc->dc_dev, + "failed to create DMA tag for setup frame\n"); + goto fail; + } + error = bus_dmamem_alloc(sc->dc_stag, (void **)&sc->dc_cdata.dc_sbuf, + BUS_DMA_NOWAIT, &sc->dc_smap); + if (error) { + device_printf(sc->dc_dev, + "failed to allocate DMA'able memory for setup frame\n"); + goto fail; + } + error = bus_dmamap_load(sc->dc_stag, sc->dc_smap, sc->dc_cdata.dc_sbuf, + DC_SFRAME_LEN, dc_dma_map_addr, &sc->dc_saddr, BUS_DMA_NOWAIT); + if (error) { + device_printf(sc->dc_dev, + "cannot load DMA'able memory for setup frame\n"); + goto fail; + } + + /* Allocate a busdma tag for RX mbufs. */ + error = bus_dma_tag_create(sc->dc_ptag, DC_RXBUF_ALIGN, 0, + BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, + MCLBYTES, 1, MCLBYTES, 0, NULL, NULL, &sc->dc_rx_mtag); + if (error) { + device_printf(sc->dc_dev, "failed to create RX mbuf tag\n"); + goto fail; + } + + /* Allocate a busdma tag for TX mbufs. */ + error = bus_dma_tag_create(sc->dc_ptag, 1, 0, + BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, + MCLBYTES * DC_MAXFRAGS, DC_MAXFRAGS, MCLBYTES, + 0, NULL, NULL, &sc->dc_tx_mtag); + if (error) { + device_printf(sc->dc_dev, "failed to create TX mbuf tag\n"); + goto fail; + } + + /* Create the TX/RX busdma maps. */ + for (i = 0; i < DC_TX_LIST_CNT; i++) { + error = bus_dmamap_create(sc->dc_tx_mtag, 0, + &sc->dc_cdata.dc_tx_map[i]); + if (error) { + device_printf(sc->dc_dev, + "failed to create TX mbuf dmamap\n"); + goto fail; + } + } + for (i = 0; i < DC_RX_LIST_CNT; i++) { + error = bus_dmamap_create(sc->dc_rx_mtag, 0, + &sc->dc_cdata.dc_rx_map[i]); + if (error) { + device_printf(sc->dc_dev, + "failed to create RX mbuf dmamap\n"); + goto fail; + } + } + error = bus_dmamap_create(sc->dc_rx_mtag, 0, &sc->dc_sparemap); + if (error) { + device_printf(sc->dc_dev, + "failed to create spare RX mbuf dmamap\n"); + goto fail; + } + +fail: + return (error); +} + +static void +dc_dma_free(struct dc_softc *sc) +{ + int i; + + /* RX buffers. */ + if (sc->dc_rx_mtag != NULL) { + for (i = 0; i < DC_RX_LIST_CNT; i++) { + if (sc->dc_cdata.dc_rx_map[i] != NULL) + bus_dmamap_destroy(sc->dc_rx_mtag, + sc->dc_cdata.dc_rx_map[i]); + } + if (sc->dc_sparemap != NULL) + bus_dmamap_destroy(sc->dc_rx_mtag, sc->dc_sparemap); + bus_dma_tag_destroy(sc->dc_rx_mtag); + } + + /* TX buffers. */ + if (sc->dc_rx_mtag != NULL) { + for (i = 0; i < DC_TX_LIST_CNT; i++) { + if (sc->dc_cdata.dc_tx_map[i] != NULL) + bus_dmamap_destroy(sc->dc_tx_mtag, + sc->dc_cdata.dc_tx_map[i]); + } + bus_dma_tag_destroy(sc->dc_tx_mtag); + } + + /* RX descriptor list. */ + if (sc->dc_rx_ltag) { + if (sc->dc_rx_lmap != NULL) + bus_dmamap_unload(sc->dc_rx_ltag, sc->dc_rx_lmap); + if (sc->dc_rx_lmap != NULL && sc->dc_ldata.dc_rx_list != NULL) + bus_dmamem_free(sc->dc_rx_ltag, sc->dc_ldata.dc_rx_list, + sc->dc_rx_lmap); + bus_dma_tag_destroy(sc->dc_rx_ltag); + } + + /* TX descriptor list. */ + if (sc->dc_tx_ltag) { + if (sc->dc_tx_lmap != NULL) + bus_dmamap_unload(sc->dc_tx_ltag, sc->dc_tx_lmap); + if (sc->dc_tx_lmap != NULL && sc->dc_ldata.dc_tx_list != NULL) + bus_dmamem_free(sc->dc_tx_ltag, sc->dc_ldata.dc_tx_list, + sc->dc_tx_lmap); + bus_dma_tag_destroy(sc->dc_tx_ltag); + } + + /* multicast setup frame. */ + if (sc->dc_stag) { + if (sc->dc_smap != NULL) + bus_dmamap_unload(sc->dc_stag, sc->dc_smap); + if (sc->dc_smap != NULL && sc->dc_cdata.dc_sbuf != NULL) + bus_dmamem_free(sc->dc_stag, sc->dc_cdata.dc_sbuf, + sc->dc_smap); + bus_dma_tag_destroy(sc->dc_stag); + } +} + /* * Attach the interface. Allocate softc structures, do ifmedia * setup and ethernet/BPF attach. @@ -1823,13 +2031,13 @@ static int dc_attach(device_t dev) { uint32_t eaddr[(ETHER_ADDR_LEN+3)/4]; - u_int32_t command; + uint32_t command; struct dc_softc *sc; struct ifnet *ifp; struct dc_mediainfo *m; - u_int32_t reg, revision; - int error, i, mac_offset, phy, rid, tmp; - u_int8_t *mac; + uint32_t reg, revision; + int error, mac_offset, phy, rid, tmp; + uint8_t *mac; sc = device_get_softc(dev); sc->dc_dev = dev; @@ -2140,96 +2348,8 @@ dc_attach(device_t dev) error = 0; } - /* Allocate a busdma tag and DMA safe memory for TX/RX descriptors. */ - error = bus_dma_tag_create(bus_get_dma_tag(dev), PAGE_SIZE, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - sizeof(struct dc_list_data), 1, sizeof(struct dc_list_data), - 0, NULL, NULL, &sc->dc_ltag); - if (error) { - device_printf(dev, "failed to allocate busdma tag\n"); - error = ENXIO; + if ((error = dc_dma_alloc(sc)) != 0) goto fail; - } - error = bus_dmamem_alloc(sc->dc_ltag, (void **)&sc->dc_ldata, - BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->dc_lmap); - if (error) { - device_printf(dev, "failed to allocate DMA safe memory\n"); - error = ENXIO; - goto fail; - } - error = bus_dmamap_load(sc->dc_ltag, sc->dc_lmap, sc->dc_ldata, - sizeof(struct dc_list_data), dc_dma_map_addr, &sc->dc_laddr, - BUS_DMA_NOWAIT); - if (error) { - device_printf(dev, "cannot get address of the descriptors\n"); - error = ENXIO; - goto fail; - } - - /* - * Allocate a busdma tag and DMA safe memory for the multicast - * setup frame. - */ - error = bus_dma_tag_create(bus_get_dma_tag(dev), PAGE_SIZE, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - DC_SFRAME_LEN + DC_MIN_FRAMELEN, 1, DC_SFRAME_LEN + DC_MIN_FRAMELEN, - 0, NULL, NULL, &sc->dc_stag); - if (error) { - device_printf(dev, "failed to allocate busdma tag\n"); - error = ENXIO; - goto fail; - } - error = bus_dmamem_alloc(sc->dc_stag, (void **)&sc->dc_cdata.dc_sbuf, - BUS_DMA_NOWAIT, &sc->dc_smap); - if (error) { - device_printf(dev, "failed to allocate DMA safe memory\n"); - error = ENXIO; - goto fail; - } - error = bus_dmamap_load(sc->dc_stag, sc->dc_smap, sc->dc_cdata.dc_sbuf, - DC_SFRAME_LEN, dc_dma_map_addr, &sc->dc_saddr, BUS_DMA_NOWAIT); - if (error) { - device_printf(dev, "cannot get address of the descriptors\n"); - error = ENXIO; - goto fail; - } - - /* Allocate a busdma tag for mbufs. */ - error = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - MCLBYTES * DC_MAXFRAGS, DC_MAXFRAGS, MCLBYTES, - 0, NULL, NULL, &sc->dc_mtag); - if (error) { - device_printf(dev, "failed to allocate busdma tag\n"); - error = ENXIO; - goto fail; - } - - /* Create the TX/RX busdma maps. */ - for (i = 0; i < DC_TX_LIST_CNT; i++) { - error = bus_dmamap_create(sc->dc_mtag, 0, - &sc->dc_cdata.dc_tx_map[i]); - if (error) { - device_printf(dev, "failed to init TX ring\n"); - error = ENXIO; - goto fail; - } - } - for (i = 0; i < DC_RX_LIST_CNT; i++) { - error = bus_dmamap_create(sc->dc_mtag, 0, - &sc->dc_cdata.dc_rx_map[i]); - if (error) { - device_printf(dev, "failed to init RX ring\n"); - error = ENXIO; - goto fail; - } - } - error = bus_dmamap_create(sc->dc_mtag, 0, &sc->dc_sparemap); - if (error) { - device_printf(dev, "failed to init RX ring\n"); - error = ENXIO; - goto fail; - } ifp = sc->dc_ifp = if_alloc(IFT_ETHER); if (ifp == NULL) { @@ -2378,7 +2498,6 @@ dc_detach(device_t dev) struct dc_softc *sc; struct ifnet *ifp; struct dc_mediainfo *m; - int i; sc = device_get_softc(dev); KASSERT(mtx_initialized(&sc->dc_mtx), ("dc mutex not initialized")); @@ -2413,27 +2532,7 @@ dc_detach(device_t dev) if (ifp) if_free(ifp); - if (sc->dc_cdata.dc_sbuf != NULL) - bus_dmamem_free(sc->dc_stag, sc->dc_cdata.dc_sbuf, sc->dc_smap); - if (sc->dc_ldata != NULL) - bus_dmamem_free(sc->dc_ltag, sc->dc_ldata, sc->dc_lmap); - if (sc->dc_mtag) { - for (i = 0; i < DC_TX_LIST_CNT; i++) - if (sc->dc_cdata.dc_tx_map[i] != NULL) - bus_dmamap_destroy(sc->dc_mtag, - sc->dc_cdata.dc_tx_map[i]); - for (i = 0; i < DC_RX_LIST_CNT; i++) - if (sc->dc_cdata.dc_rx_map[i] != NULL) - bus_dmamap_destroy(sc->dc_mtag, - sc->dc_cdata.dc_rx_map[i]); - bus_dmamap_destroy(sc->dc_mtag, sc->dc_sparemap); - } - if (sc->dc_stag) - bus_dma_tag_destroy(sc->dc_stag); - if (sc->dc_mtag) - bus_dma_tag_destroy(sc->dc_mtag); - if (sc->dc_ltag) - bus_dma_tag_destroy(sc->dc_ltag); + dc_dma_free(sc); free(sc->dc_pnic_rx_buf, M_DEVBUF); @@ -2460,20 +2559,22 @@ dc_list_tx_init(struct dc_softc *sc) int i, nexti; cd = &sc->dc_cdata; - ld = sc->dc_ldata; + ld = &sc->dc_ldata; for (i = 0; i < DC_TX_LIST_CNT; i++) { if (i == DC_TX_LIST_CNT - 1) nexti = 0; else nexti = i + 1; + ld->dc_tx_list[i].dc_status = 0; + ld->dc_tx_list[i].dc_ctl = 0; + ld->dc_tx_list[i].dc_data = 0; ld->dc_tx_list[i].dc_next = htole32(DC_TXDESC(sc, nexti)); cd->dc_tx_chain[i] = NULL; - ld->dc_tx_list[i].dc_data = 0; - ld->dc_tx_list[i].dc_ctl = 0; } cd->dc_tx_prod = cd->dc_tx_cons = cd->dc_tx_cnt = 0; - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, + cd->dc_tx_pkts = 0; + bus_dmamap_sync(sc->dc_tx_ltag, sc->dc_tx_lmap, BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); return (0); } @@ -2492,10 +2593,10 @@ dc_list_rx_init(struct dc_softc *sc) int i, nexti; cd = &sc->dc_cdata; - ld = sc->dc_ldata; + ld = &sc->dc_ldata; for (i = 0; i < DC_RX_LIST_CNT; i++) { - if (dc_newbuf(sc, i, 1) != 0) + if (dc_newbuf(sc, i) != 0) return (ENOBUFS); if (i == DC_RX_LIST_CNT - 1) nexti = 0; @@ -2505,7 +2606,7 @@ dc_list_rx_init(struct dc_softc *sc) } cd->dc_rx_prod = 0; - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, + bus_dmamap_sync(sc->dc_rx_ltag, sc->dc_rx_lmap, BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); return (0); } @@ -2514,23 +2615,18 @@ dc_list_rx_init(struct dc_softc *sc) * Initialize an RX descriptor and attach an MBUF cluster. */ static int -dc_newbuf(struct dc_softc *sc, int i, int alloc) +dc_newbuf(struct dc_softc *sc, int i) { - struct mbuf *m_new; - bus_dmamap_t tmp; + struct mbuf *m; + bus_dmamap_t map; bus_dma_segment_t segs[1]; int error, nseg; - if (alloc) { - m_new = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); - if (m_new == NULL) - return (ENOBUFS); - } else { - m_new = sc->dc_cdata.dc_rx_chain[i]; - m_new->m_data = m_new->m_ext.ext_buf; - } - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - m_adj(m_new, sizeof(u_int64_t)); + m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); + if (m == NULL) + return (ENOBUFS); + m->m_len = m->m_pkthdr.len = MCLBYTES; + m_adj(m, sizeof(u_int64_t)); /* * If this is a PNIC chip, zero the buffer. This is part @@ -2538,31 +2634,31 @@ dc_newbuf(struct dc_softc *sc, int i, int alloc) * 82c169 chips. */ if (sc->dc_flags & DC_PNIC_RX_BUG_WAR) - bzero(mtod(m_new, char *), m_new->m_len); + bzero(mtod(m, char *), m->m_len); - /* No need to remap the mbuf if we're reusing it. */ - if (alloc) { - error = bus_dmamap_load_mbuf_sg(sc->dc_mtag, sc->dc_sparemap, - m_new, segs, &nseg, 0); - if (error) { - m_freem(m_new); - return (error); - } - KASSERT(nseg == 1, - ("%s: wrong number of segments (%d)", __func__, nseg)); - sc->dc_ldata->dc_rx_list[i].dc_data = htole32(segs->ds_addr); - bus_dmamap_unload(sc->dc_mtag, sc->dc_cdata.dc_rx_map[i]); - tmp = sc->dc_cdata.dc_rx_map[i]; - sc->dc_cdata.dc_rx_map[i] = sc->dc_sparemap; - sc->dc_sparemap = tmp; - sc->dc_cdata.dc_rx_chain[i] = m_new; + error = bus_dmamap_load_mbuf_sg(sc->dc_rx_mtag, sc->dc_sparemap, + m, segs, &nseg, 0); + if (error) { + m_freem(m); + return (error); } + KASSERT(nseg == 1, ("%s: wrong number of segments (%d)", __func__, + nseg)); + if (sc->dc_cdata.dc_rx_chain[i] != NULL) + bus_dmamap_unload(sc->dc_rx_mtag, sc->dc_cdata.dc_rx_map[i]); - sc->dc_ldata->dc_rx_list[i].dc_ctl = htole32(DC_RXCTL_RLINK | DC_RXLEN); - sc->dc_ldata->dc_rx_list[i].dc_status = htole32(DC_RXSTAT_OWN); - bus_dmamap_sync(sc->dc_mtag, sc->dc_cdata.dc_rx_map[i], + map = sc->dc_cdata.dc_rx_map[i]; + sc->dc_cdata.dc_rx_map[i] = sc->dc_sparemap; + sc->dc_sparemap = map; + sc->dc_cdata.dc_rx_chain[i] = m; + bus_dmamap_sync(sc->dc_rx_mtag, sc->dc_cdata.dc_rx_map[i], BUS_DMASYNC_PREREAD); - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, + + sc->dc_ldata.dc_rx_list[i].dc_ctl = htole32(DC_RXCTL_RLINK | DC_RXLEN); + sc->dc_ldata.dc_rx_list[i].dc_data = + htole32(DC_ADDR_LO(segs[0].ds_addr)); + sc->dc_ldata.dc_rx_list[i].dc_status = htole32(DC_RXSTAT_OWN); + bus_dmamap_sync(sc->dc_rx_ltag, sc->dc_rx_lmap, BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); return (0); } @@ -2619,7 +2715,7 @@ dc_newbuf(struct dc_softc *sc, int i, int alloc) * the time. */ -#define DC_WHOLEFRAME (DC_RXSTAT_FIRSTFRAG | DC_RXSTAT_LASTFRAG) +#define DC_WHOLEFRAME (DC_RXSTAT_FIRSTFRAG | DC_RXSTAT_LASTFRAG) static void dc_pnic_rx_bug_war(struct dc_softc *sc, int idx) { @@ -2628,16 +2724,16 @@ dc_pnic_rx_bug_war(struct dc_softc *sc, int idx) struct mbuf *m = NULL; unsigned char *ptr; int i, total_len; - u_int32_t rxstat = 0; + uint32_t rxstat = 0; i = sc->dc_pnic_rx_bug_save; - cur_rx = &sc->dc_ldata->dc_rx_list[idx]; + cur_rx = &sc->dc_ldata.dc_rx_list[idx]; ptr = sc->dc_pnic_rx_buf; bzero(ptr, DC_RXLEN * 5); /* Copy all the bytes from the bogus buffers. */ while (1) { - c = &sc->dc_ldata->dc_rx_list[i]; + c = &sc->dc_ldata.dc_rx_list[i]; rxstat = le32toh(c->dc_status); m = sc->dc_cdata.dc_rx_chain[i]; bcopy(mtod(m, char *), ptr, DC_RXLEN); @@ -2645,7 +2741,7 @@ dc_pnic_rx_bug_war(struct dc_softc *sc, int idx) /* If this is the last buffer, break out. */ if (i == idx || rxstat & DC_RXSTAT_LASTFRAG) break; - dc_newbuf(sc, i, 0); + dc_discard_rxbuf(sc, i); DC_INC(i, DC_RX_LIST_CNT); } @@ -2670,7 +2766,6 @@ dc_pnic_rx_bug_war(struct dc_softc *sc, int idx) * the status word to make it look like a successful * frame reception. */ - dc_newbuf(sc, i, 0); bcopy(ptr, mtod(m, char *), total_len); cur_rx->dc_status = htole32(rxstat | DC_RXSTAT_FIRSTFRAG); } @@ -2695,7 +2790,9 @@ dc_rx_resync(struct dc_softc *sc) pos = sc->dc_cdata.dc_rx_prod; for (i = 0; i < DC_RX_LIST_CNT; i++) { - cur_rx = &sc->dc_ldata->dc_rx_list[pos]; + bus_dmamap_sync(sc->dc_rx_ltag, sc->dc_rx_lmap, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + cur_rx = &sc->dc_ldata.dc_rx_list[pos]; if (!(le32toh(cur_rx->dc_status) & DC_RXSTAT_OWN)) break; DC_INC(pos, DC_RX_LIST_CNT); @@ -2711,6 +2808,22 @@ dc_rx_resync(struct dc_softc *sc) return (EAGAIN); } +static void +dc_discard_rxbuf(struct dc_softc *sc, int i) +{ + struct mbuf *m; + + if (sc->dc_flags & DC_PNIC_RX_BUG_WAR) { + m = sc->dc_cdata.dc_rx_chain[i]; + bzero(mtod(m, char *), m->m_len); + } + + sc->dc_ldata.dc_rx_list[i].dc_ctl = htole32(DC_RXCTL_RLINK | DC_RXLEN); + sc->dc_ldata.dc_rx_list[i].dc_status = htole32(DC_RXSTAT_OWN); + bus_dmamap_sync(sc->dc_rx_ltag, sc->dc_rx_lmap, BUS_DMASYNC_PREREAD | + BUS_DMASYNC_PREWRITE); +} + /* * A frame has been uploaded: pass the resulting mbuf chain up to * the higher level protocols. @@ -2718,22 +2831,22 @@ dc_rx_resync(struct dc_softc *sc) static int dc_rxeof(struct dc_softc *sc) { - struct mbuf *m, *m0; + struct mbuf *m; struct ifnet *ifp; struct dc_desc *cur_rx; int i, total_len, rx_npkts; - u_int32_t rxstat; + uint32_t rxstat; DC_LOCK_ASSERT(sc); ifp = sc->dc_ifp; - i = sc->dc_cdata.dc_rx_prod; - total_len = 0; rx_npkts = 0; - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, BUS_DMASYNC_POSTREAD); - while (!(le32toh(sc->dc_ldata->dc_rx_list[i].dc_status) & - DC_RXSTAT_OWN)) { + bus_dmamap_sync(sc->dc_rx_ltag, sc->dc_rx_lmap, BUS_DMASYNC_POSTREAD | + BUS_DMASYNC_POSTWRITE); + for (i = sc->dc_cdata.dc_rx_prod; + (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0; + DC_INC(i, DC_RX_LIST_CNT)) { #ifdef DEVICE_POLLING if (ifp->if_capenable & IFCAP_POLLING) { if (sc->rxcycles <= 0) @@ -2741,10 +2854,12 @@ dc_rxeof(struct dc_softc *sc) sc->rxcycles--; } #endif - cur_rx = &sc->dc_ldata->dc_rx_list[i]; + cur_rx = &sc->dc_ldata.dc_rx_list[i]; rxstat = le32toh(cur_rx->dc_status); + if ((rxstat & DC_RXSTAT_OWN) != 0) + break; m = sc->dc_cdata.dc_rx_chain[i]; - bus_dmamap_sync(sc->dc_mtag, sc->dc_cdata.dc_rx_map[i], + bus_dmamap_sync(sc->dc_rx_mtag, sc->dc_cdata.dc_rx_map[i], BUS_DMASYNC_POSTREAD); total_len = DC_RXBYTES(rxstat); @@ -2752,10 +2867,8 @@ dc_rxeof(struct dc_softc *sc) if ((rxstat & DC_WHOLEFRAME) != DC_WHOLEFRAME) { if (rxstat & DC_RXSTAT_FIRSTFRAG) sc->dc_pnic_rx_bug_save = i; - if ((rxstat & DC_RXSTAT_LASTFRAG) == 0) { - DC_INC(i, DC_RX_LIST_CNT); + if ((rxstat & DC_RXSTAT_LASTFRAG) == 0) continue; - } dc_pnic_rx_bug_war(sc, i); rxstat = le32toh(cur_rx->dc_status); total_len = DC_RXBYTES(rxstat); @@ -2777,11 +2890,10 @@ dc_rxeof(struct dc_softc *sc) ifp->if_ierrors++; if (rxstat & DC_RXSTAT_COLLSEEN) ifp->if_collisions++; - dc_newbuf(sc, i, 0); - if (rxstat & DC_RXSTAT_CRCERR) { - DC_INC(i, DC_RX_LIST_CNT); + dc_discard_rxbuf(sc, i); + if (rxstat & DC_RXSTAT_CRCERR) continue; - } else { + else { dc_init_locked(sc); return (rx_npkts); } @@ -2800,23 +2912,27 @@ dc_rxeof(struct dc_softc *sc) * if the allocation fails, then use m_devget and leave the * existing buffer in the receive ring. */ - if (dc_newbuf(sc, i, 1) == 0) { - m->m_pkthdr.rcvif = ifp; - m->m_pkthdr.len = m->m_len = total_len; - DC_INC(i, DC_RX_LIST_CNT); - } else -#endif + if (dc_newbuf(sc, i) != 0) { + dc_discard_rxbuf(sc, i); + ifp->if_iqdrops++; + continue; + } + m->m_pkthdr.rcvif = ifp; + m->m_pkthdr.len = m->m_len = total_len; +#else { + struct mbuf *m0; + m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, ifp, NULL); - dc_newbuf(sc, i, 0); - DC_INC(i, DC_RX_LIST_CNT); + dc_discard_rxbuf(sc, i); if (m0 == NULL) { - ifp->if_ierrors++; + ifp->if_iqdrops++; continue; } m = m0; } +#endif ifp->if_ipackets++; DC_UNLOCK(sc); @@ -2836,10 +2952,13 @@ dc_rxeof(struct dc_softc *sc) static void dc_txeof(struct dc_softc *sc) { - struct dc_desc *cur_tx = NULL; + struct dc_desc *cur_tx; struct ifnet *ifp; - int idx; - u_int32_t ctl, txstat; + int idx, setup; + uint32_t ctl, txstat; + + if (sc->dc_cdata.dc_tx_cnt == 0) + return; ifp = sc->dc_ifp; @@ -2847,36 +2966,40 @@ dc_txeof(struct dc_softc *sc) * Go through our tx list and free mbufs for those * frames that have been transmitted. */ - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, BUS_DMASYNC_POSTREAD); - idx = sc->dc_cdata.dc_tx_cons; - while (idx != sc->dc_cdata.dc_tx_prod) { - - cur_tx = &sc->dc_ldata->dc_tx_list[idx]; + bus_dmamap_sync(sc->dc_rx_ltag, sc->dc_tx_lmap, BUS_DMASYNC_POSTREAD | + BUS_DMASYNC_POSTWRITE); + setup = 0; + for (idx = sc->dc_cdata.dc_tx_cons; idx != sc->dc_cdata.dc_tx_prod; + DC_INC(idx, DC_TX_LIST_CNT), sc->dc_cdata.dc_tx_cnt--) { + cur_tx = &sc->dc_ldata.dc_tx_list[idx]; txstat = le32toh(cur_tx->dc_status); ctl = le32toh(cur_tx->dc_ctl); if (txstat & DC_TXSTAT_OWN) break; - if (!(ctl & DC_TXCTL_LASTFRAG) || ctl & DC_TXCTL_SETUP) { - if (ctl & DC_TXCTL_SETUP) { - /* - * Yes, the PNIC is so brain damaged - * that it will sometimes generate a TX - * underrun error while DMAing the RX - * filter setup frame. If we detect this, - * we have to send the setup frame again, - * or else the filter won't be programmed - * correctly. - */ - if (DC_IS_PNIC(sc)) { - if (txstat & DC_TXSTAT_ERRSUM) - dc_setfilt(sc); - } - sc->dc_cdata.dc_tx_chain[idx] = NULL; + if (sc->dc_cdata.dc_tx_chain[idx] == NULL) + continue; + + if (ctl & DC_TXCTL_SETUP) { + cur_tx->dc_ctl = htole32(ctl & ~DC_TXCTL_SETUP); + setup++; + bus_dmamap_sync(sc->dc_stag, sc->dc_smap, + BUS_DMASYNC_POSTWRITE); + /* + * Yes, the PNIC is so brain damaged + * that it will sometimes generate a TX + * underrun error while DMAing the RX + * filter setup frame. If we detect this, + * we have to send the setup frame again, + * or else the filter won't be programmed + * correctly. + */ + if (DC_IS_PNIC(sc)) { + if (txstat & DC_TXSTAT_ERRSUM) + dc_setfilt(sc); } - sc->dc_cdata.dc_tx_cnt--; - DC_INC(idx, DC_TX_LIST_CNT); + sc->dc_cdata.dc_tx_chain[idx] = NULL; continue; } @@ -2912,31 +3035,26 @@ dc_txeof(struct dc_softc *sc) dc_init_locked(sc); return; } - } - + } else + ifp->if_opackets++; ifp->if_collisions += (txstat & DC_TXSTAT_COLLCNT) >> 3; - ifp->if_opackets++; - if (sc->dc_cdata.dc_tx_chain[idx] != NULL) { - bus_dmamap_sync(sc->dc_mtag, - sc->dc_cdata.dc_tx_map[idx], - BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(sc->dc_mtag, - sc->dc_cdata.dc_tx_map[idx]); - m_freem(sc->dc_cdata.dc_tx_chain[idx]); - sc->dc_cdata.dc_tx_chain[idx] = NULL; - } - - sc->dc_cdata.dc_tx_cnt--; - DC_INC(idx, DC_TX_LIST_CNT); + bus_dmamap_sync(sc->dc_tx_mtag, sc->dc_cdata.dc_tx_map[idx], + BUS_DMASYNC_POSTWRITE); + bus_dmamap_unload(sc->dc_tx_mtag, sc->dc_cdata.dc_tx_map[idx]); + m_freem(sc->dc_cdata.dc_tx_chain[idx]); + sc->dc_cdata.dc_tx_chain[idx] = NULL; } sc->dc_cdata.dc_tx_cons = idx; - if (DC_TX_LIST_CNT - sc->dc_cdata.dc_tx_cnt > DC_TX_LIST_RSVD) + if (sc->dc_cdata.dc_tx_cnt <= DC_TX_LIST_CNT - DC_TX_LIST_RSVD) { ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - - if (sc->dc_cdata.dc_tx_cnt == 0) - sc->dc_wdog_timer = 0; + if (sc->dc_cdata.dc_tx_cnt == 0) + sc->dc_wdog_timer = 0; + } + if (setup > 0) + bus_dmamap_sync(sc->dc_tx_ltag, sc->dc_tx_lmap, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); } static void @@ -2945,13 +3063,20 @@ dc_tick(void *xsc) struct dc_softc *sc; struct mii_data *mii; struct ifnet *ifp; - u_int32_t r; + uint32_t r; sc = xsc; DC_LOCK_ASSERT(sc); ifp = sc->dc_ifp; mii = device_get_softc(sc->dc_miibus); + /* + * Reclaim transmitted frames for controllers that do + * not generate TX completion interrupt for every frame. + */ + if (sc->dc_flags & DC_TX_USE_TX_INTR) + dc_txeof(sc); + if (sc->dc_flags & DC_REDUCED_MII_POLL) { if (sc->dc_flags & DC_21143_NWAY) { r = CSR_READ_4(sc, DC_10BTSTAT); @@ -3015,7 +3140,7 @@ dc_tick(void *xsc) static void dc_tx_underrun(struct dc_softc *sc) { - u_int32_t isr; + uint32_t isr; int i; if (DC_IS_DAVICOM(sc)) @@ -3082,7 +3207,7 @@ dc_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) dc_start_locked(ifp); if (cmd == POLL_AND_CHECK_STATUS) { /* also check status register */ - u_int32_t status; + uint32_t status; status = CSR_READ_4(sc, DC_ISR); status &= (DC_ISR_RX_WATDOGTIMEO | DC_ISR_RX_NOBUF | @@ -3096,7 +3221,7 @@ dc_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) CSR_WRITE_4(sc, DC_ISR, status); if (status & (DC_ISR_RX_WATDOGTIMEO | DC_ISR_RX_NOBUF)) { - u_int32_t r = CSR_READ_4(sc, DC_FRAMESDISCARDED); + uint32_t r = CSR_READ_4(sc, DC_FRAMESDISCARDED); ifp->if_ierrors += (r & 0xffff) + ((r >> 17) & 0x7ff); if (dc_rx_resync(sc)) @@ -3125,17 +3250,20 @@ dc_intr(void *arg) { struct dc_softc *sc; struct ifnet *ifp; - u_int32_t status; + uint32_t r, status; + int curpkts, n; sc = arg; if (sc->suspended) return; - if ((CSR_READ_4(sc, DC_ISR) & DC_INTRS) == 0) - return; - DC_LOCK(sc); + status = CSR_READ_4(sc, DC_ISR); + if (status == 0xFFFFFFFF || (status & DC_INTRS) == 0) { + DC_UNLOCK(sc); + return; + } ifp = sc->dc_ifp; #ifdef DEVICE_POLLING if (ifp->if_capenable & IFCAP_POLLING) { @@ -3143,26 +3271,16 @@ dc_intr(void *arg) return; } #endif - - /* Suppress unwanted interrupts */ - if (!(ifp->if_flags & IFF_UP)) { - if (CSR_READ_4(sc, DC_ISR) & DC_INTRS) - dc_stop(sc); - DC_UNLOCK(sc); - return; - } - /* Disable interrupts. */ CSR_WRITE_4(sc, DC_IMR, 0x00000000); - while (((status = CSR_READ_4(sc, DC_ISR)) & DC_INTRS) && - status != 0xFFFFFFFF && - (ifp->if_drv_flags & IFF_DRV_RUNNING)) { - + for (n = 16; n > 0; n--) { + if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) + break; + /* Ack interrupts. */ CSR_WRITE_4(sc, DC_ISR, status); if (status & DC_ISR_RX_OK) { - int curpkts; curpkts = ifp->if_ipackets; dc_rxeof(sc); if (curpkts == ifp->if_ipackets) { @@ -3187,7 +3305,8 @@ dc_intr(void *arg) if ((status & DC_ISR_RX_WATDOGTIMEO) || (status & DC_ISR_RX_NOBUF)) { - int curpkts; + r = CSR_READ_4(sc, DC_FRAMESDISCARDED); + ifp->if_ierrors += (r & 0xffff) + ((r >> 17) & 0x7ff); curpkts = ifp->if_ipackets; dc_rxeof(sc); if (curpkts == ifp->if_ipackets) { @@ -3196,17 +3315,23 @@ dc_intr(void *arg) } } + if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) + dc_start_locked(ifp); + if (status & DC_ISR_BUS_ERR) { dc_reset(sc); dc_init_locked(sc); + DC_UNLOCK(sc); + return; } + status = CSR_READ_4(sc, DC_ISR); + if (status == 0xFFFFFFFF || (status & DC_INTRS) == 0) + break; } /* Re-enable interrupts. */ - CSR_WRITE_4(sc, DC_IMR, DC_INTRS); - - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - dc_start_locked(ifp); + if (ifp->if_drv_flags & IFF_DRV_RUNNING) + CSR_WRITE_4(sc, DC_IMR, DC_INTRS); DC_UNLOCK(sc); } @@ -3219,16 +3344,11 @@ static int dc_encap(struct dc_softc *sc, struct mbuf **m_head) { bus_dma_segment_t segs[DC_MAXFRAGS]; + bus_dmamap_t map; struct dc_desc *f; struct mbuf *m; int cur, defragged, error, first, frag, i, idx, nseg; - /* - * If there's no way we can send any packets, return now. - */ - if (DC_TX_LIST_CNT - sc->dc_cdata.dc_tx_cnt <= DC_TX_LIST_RSVD) - return (ENOBUFS); - m = NULL; defragged = 0; if (sc->dc_flags & DC_TX_COALESCE && @@ -3262,7 +3382,7 @@ dc_encap(struct dc_softc *sc, struct mbuf **m_head) } idx = sc->dc_cdata.dc_tx_prod; - error = bus_dmamap_load_mbuf_sg(sc->dc_mtag, + error = bus_dmamap_load_mbuf_sg(sc->dc_tx_mtag, sc->dc_cdata.dc_tx_map[idx], *m_head, segs, &nseg, 0); if (error == EFBIG) { if (defragged != 0 || (m = m_collapse(*m_head, M_DONTWAIT, @@ -3272,7 +3392,7 @@ dc_encap(struct dc_softc *sc, struct mbuf **m_head) return (defragged != 0 ? error : ENOBUFS); } *m_head = m; - error = bus_dmamap_load_mbuf_sg(sc->dc_mtag, + error = bus_dmamap_load_mbuf_sg(sc->dc_tx_mtag, sc->dc_cdata.dc_tx_map[idx], *m_head, segs, &nseg, 0); if (error != 0) { m_freem(*m_head); @@ -3289,26 +3409,34 @@ dc_encap(struct dc_softc *sc, struct mbuf **m_head) return (EIO); } + /* Check descriptor overruns. */ + if (sc->dc_cdata.dc_tx_cnt + nseg > DC_TX_LIST_CNT - DC_TX_LIST_RSVD) { + bus_dmamap_unload(sc->dc_tx_mtag, sc->dc_cdata.dc_tx_map[idx]); + return (ENOBUFS); + } + bus_dmamap_sync(sc->dc_tx_mtag, sc->dc_cdata.dc_tx_map[idx], + BUS_DMASYNC_PREWRITE); + first = cur = frag = sc->dc_cdata.dc_tx_prod; for (i = 0; i < nseg; i++) { if ((sc->dc_flags & DC_TX_ADMTEK_WAR) && (frag == (DC_TX_LIST_CNT - 1)) && (first != sc->dc_cdata.dc_tx_first)) { - bus_dmamap_unload(sc->dc_mtag, + bus_dmamap_unload(sc->dc_tx_mtag, sc->dc_cdata.dc_tx_map[first]); m_freem(*m_head); *m_head = NULL; return (ENOBUFS); } - f = &sc->dc_ldata->dc_tx_list[frag]; + f = &sc->dc_ldata.dc_tx_list[frag]; f->dc_ctl = htole32(DC_TXCTL_TLINK | segs[i].ds_len); if (i == 0) { f->dc_status = 0; f->dc_ctl |= htole32(DC_TXCTL_FIRSTFRAG); } else f->dc_status = htole32(DC_TXSTAT_OWN); - f->dc_data = htole32(segs[i].ds_addr); + f->dc_data = htole32(DC_ADDR_LO(segs[i].ds_addr)); cur = frag; DC_INC(frag, DC_TX_LIST_CNT); } @@ -3316,20 +3444,30 @@ dc_encap(struct dc_softc *sc, struct mbuf **m_head) sc->dc_cdata.dc_tx_prod = frag; sc->dc_cdata.dc_tx_cnt += nseg; sc->dc_cdata.dc_tx_chain[cur] = *m_head; - sc->dc_ldata->dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_LASTFRAG); + sc->dc_ldata.dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_LASTFRAG); if (sc->dc_flags & DC_TX_INTR_FIRSTFRAG) - sc->dc_ldata->dc_tx_list[first].dc_ctl |= + sc->dc_ldata.dc_tx_list[first].dc_ctl |= htole32(DC_TXCTL_FINT); if (sc->dc_flags & DC_TX_INTR_ALWAYS) - sc->dc_ldata->dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_FINT); - if (sc->dc_flags & DC_TX_USE_TX_INTR && sc->dc_cdata.dc_tx_cnt > 64) - sc->dc_ldata->dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_FINT); - sc->dc_ldata->dc_tx_list[first].dc_status = htole32(DC_TXSTAT_OWN); + sc->dc_ldata.dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_FINT); + if (sc->dc_flags & DC_TX_USE_TX_INTR && + ++sc->dc_cdata.dc_tx_pkts >= 8) { + sc->dc_cdata.dc_tx_pkts = 0; + sc->dc_ldata.dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_FINT); + } + sc->dc_ldata.dc_tx_list[first].dc_status = htole32(DC_TXSTAT_OWN); + + bus_dmamap_sync(sc->dc_tx_ltag, sc->dc_tx_lmap, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); + + /* + * Swap the last and the first dmamaps to ensure the map for + * this transmission is placed at the last descriptor. + */ + map = sc->dc_cdata.dc_tx_map[cur]; + sc->dc_cdata.dc_tx_map[cur] = sc->dc_cdata.dc_tx_map[first]; + sc->dc_cdata.dc_tx_map[first] = map; - bus_dmamap_sync(sc->dc_mtag, sc->dc_cdata.dc_tx_map[idx], - BUS_DMASYNC_PREWRITE); - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, - BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); return (0); } @@ -3355,23 +3493,27 @@ static void dc_start_locked(struct ifnet *ifp) { struct dc_softc *sc; - struct mbuf *m_head = NULL; - unsigned int queued = 0; - int idx; + struct mbuf *m_head; + int queued; sc = ifp->if_softc; DC_LOCK_ASSERT(sc); - if (!sc->dc_link && ifp->if_snd.ifq_len < 10) + if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != + IFF_DRV_RUNNING || sc->dc_link == 0) return; - if (ifp->if_drv_flags & IFF_DRV_OACTIVE) - return; + sc->dc_cdata.dc_tx_first = sc->dc_cdata.dc_tx_prod; - idx = sc->dc_cdata.dc_tx_first = sc->dc_cdata.dc_tx_prod; - - while (sc->dc_cdata.dc_tx_chain[idx] == NULL) { + for (queued = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd); ) { + /* + * If there's no way we can send any packets, return now. + */ + if (sc->dc_cdata.dc_tx_cnt > DC_TX_LIST_CNT - DC_TX_LIST_RSVD) { + ifp->if_drv_flags |= IFF_DRV_OACTIVE; + break; + } IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); if (m_head == NULL) break; @@ -3383,7 +3525,6 @@ dc_start_locked(struct ifnet *ifp) ifp->if_drv_flags |= IFF_DRV_OACTIVE; break; } - idx = sc->dc_cdata.dc_tx_prod; queued++; /* @@ -3584,6 +3725,9 @@ dc_init_locked(struct dc_softc *sc) mii_mediachg(mii); dc_setcfg(sc, sc->dc_if_media); + /* Clear missed frames and overflow counter. */ + CSR_READ_4(sc, DC_FRAMESDISCARDED); + /* Don't start the ticker if this is a homePNA link. */ if (IFM_SUBTYPE(mii->mii_media.ifm_media) == IFM_HPNA_1) sc->dc_link = 1; @@ -3682,14 +3826,13 @@ dc_ioctl(struct ifnet *ifp, u_long command, caddr_t data) } sc->dc_if_flags = ifp->if_flags; DC_UNLOCK(sc); - error = 0; break; case SIOCADDMULTI: case SIOCDELMULTI: DC_LOCK(sc); - dc_setfilt(sc); + if (ifp->if_drv_flags & IFF_DRV_RUNNING) + dc_setfilt(sc); DC_UNLOCK(sc); - error = 0; break; case SIOCGIFMEDIA: case SIOCSIFMEDIA: @@ -3766,12 +3909,12 @@ dc_stop(struct dc_softc *sc) struct dc_list_data *ld; struct dc_chain_data *cd; int i; - u_int32_t ctl; + uint32_t ctl; DC_LOCK_ASSERT(sc); ifp = sc->dc_ifp; - ld = sc->dc_ldata; + ld = &sc->dc_ldata; cd = &sc->dc_cdata; callout_stop(&sc->dc_stat_ch); @@ -3791,11 +3934,17 @@ dc_stop(struct dc_softc *sc) */ for (i = 0; i < DC_RX_LIST_CNT; i++) { if (cd->dc_rx_chain[i] != NULL) { + bus_dmamap_sync(sc->dc_rx_mtag, + cd->dc_rx_map[i], BUS_DMASYNC_POSTREAD); + bus_dmamap_unload(sc->dc_rx_mtag, + cd->dc_rx_map[i]); m_freem(cd->dc_rx_chain[i]); cd->dc_rx_chain[i] = NULL; } } - bzero(&ld->dc_rx_list, sizeof(ld->dc_rx_list)); + bzero(ld->dc_rx_list, DC_RX_LIST_SZ); + bus_dmamap_sync(sc->dc_rx_ltag, sc->dc_rx_lmap, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); /* * Free the TX list buffers. @@ -3803,17 +3952,22 @@ dc_stop(struct dc_softc *sc) for (i = 0; i < DC_TX_LIST_CNT; i++) { if (cd->dc_tx_chain[i] != NULL) { ctl = le32toh(ld->dc_tx_list[i].dc_ctl); - if ((ctl & DC_TXCTL_SETUP) || - !(ctl & DC_TXCTL_LASTFRAG)) { - cd->dc_tx_chain[i] = NULL; - continue; + if (ctl & DC_TXCTL_SETUP) { + bus_dmamap_sync(sc->dc_stag, sc->dc_smap, + BUS_DMASYNC_POSTWRITE); + } else { + bus_dmamap_sync(sc->dc_tx_mtag, + cd->dc_tx_map[i], BUS_DMASYNC_POSTWRITE); + bus_dmamap_unload(sc->dc_tx_mtag, + cd->dc_tx_map[i]); + m_freem(cd->dc_tx_chain[i]); } - bus_dmamap_unload(sc->dc_mtag, cd->dc_tx_map[i]); - m_freem(cd->dc_tx_chain[i]); cd->dc_tx_chain[i] = NULL; } } - bzero(&ld->dc_tx_list, sizeof(ld->dc_tx_list)); + bzero(ld->dc_tx_list, DC_TX_LIST_SZ); + bus_dmamap_sync(sc->dc_tx_ltag, sc->dc_tx_lmap, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); } /* diff --git a/sys/dev/dc/if_dcreg.h b/sys/dev/dc/if_dcreg.h index 066ea88c036b..cc7df2934822 100644 --- a/sys/dev/dc/if_dcreg.h +++ b/sys/dev/dc/if_dcreg.h @@ -36,23 +36,23 @@ * 21143 and clone common register definitions. */ -#define DC_BUSCTL 0x00 /* bus control */ -#define DC_TXSTART 0x08 /* tx start demand */ -#define DC_RXSTART 0x10 /* rx start demand */ -#define DC_RXADDR 0x18 /* rx descriptor list start addr */ -#define DC_TXADDR 0x20 /* tx descriptor list start addr */ -#define DC_ISR 0x28 /* interrupt status register */ -#define DC_NETCFG 0x30 /* network config register */ -#define DC_IMR 0x38 /* interrupt mask */ -#define DC_FRAMESDISCARDED 0x40 /* # of discarded frames */ -#define DC_SIO 0x48 /* MII and ROM/EEPROM access */ -#define DC_ROM 0x50 /* ROM programming address */ -#define DC_TIMER 0x58 /* general timer */ -#define DC_10BTSTAT 0x60 /* SIA status */ -#define DC_SIARESET 0x68 /* SIA connectivity */ -#define DC_10BTCTRL 0x70 /* SIA transmit and receive */ -#define DC_WATCHDOG 0x78 /* SIA and general purpose port */ -#define DC_SIAGP 0x78 /* SIA and general purpose port (X3201) */ +#define DC_BUSCTL 0x00 /* bus control */ +#define DC_TXSTART 0x08 /* tx start demand */ +#define DC_RXSTART 0x10 /* rx start demand */ +#define DC_RXADDR 0x18 /* rx descriptor list start addr */ +#define DC_TXADDR 0x20 /* tx descriptor list start addr */ +#define DC_ISR 0x28 /* interrupt status register */ +#define DC_NETCFG 0x30 /* network config register */ +#define DC_IMR 0x38 /* interrupt mask */ +#define DC_FRAMESDISCARDED 0x40 /* # of discarded frames */ +#define DC_SIO 0x48 /* MII and ROM/EEPROM access */ +#define DC_ROM 0x50 /* ROM programming address */ +#define DC_TIMER 0x58 /* general timer */ +#define DC_10BTSTAT 0x60 /* SIA status */ +#define DC_SIARESET 0x68 /* SIA connectivity */ +#define DC_10BTCTRL 0x70 /* SIA transmit and receive */ +#define DC_WATCHDOG 0x78 /* SIA and general purpose port */ +#define DC_SIAGP 0x78 /* SIA and general purpose port (X3201) */ /* * There are two general 'types' of MX chips that we need to be @@ -64,437 +64,447 @@ * 'magic' numbers we write to CSR16. The PNIC II falls into the * 98713A/98715/98715A/98725 category. */ -#define DC_TYPE_98713 0x1 -#define DC_TYPE_98713A 0x2 -#define DC_TYPE_987x5 0x3 +#define DC_TYPE_98713 0x1 +#define DC_TYPE_98713A 0x2 +#define DC_TYPE_987x5 0x3 /* Other type of supported chips. */ -#define DC_TYPE_21143 0x4 /* Intel 21143 */ -#define DC_TYPE_ASIX 0x5 /* ASIX AX88140A/AX88141 */ -#define DC_TYPE_AL981 0x6 /* ADMtek AL981 Comet */ -#define DC_TYPE_AN983 0x7 /* ADMtek AN983 Centaur */ -#define DC_TYPE_DM9102 0x8 /* Davicom DM9102 */ -#define DC_TYPE_PNICII 0x9 /* 82c115 PNIC II */ -#define DC_TYPE_PNIC 0xA /* 82c168/82c169 PNIC I */ +#define DC_TYPE_21143 0x4 /* Intel 21143 */ +#define DC_TYPE_ASIX 0x5 /* ASIX AX88140A/AX88141 */ +#define DC_TYPE_AL981 0x6 /* ADMtek AL981 Comet */ +#define DC_TYPE_AN983 0x7 /* ADMtek AN983 Centaur */ +#define DC_TYPE_DM9102 0x8 /* Davicom DM9102 */ +#define DC_TYPE_PNICII 0x9 /* 82c115 PNIC II */ +#define DC_TYPE_PNIC 0xA /* 82c168/82c169 PNIC I */ #define DC_TYPE_XIRCOM 0xB /* Xircom X3201 */ -#define DC_TYPE_CONEXANT 0xC /* Conexant LANfinity RS7112 */ +#define DC_TYPE_CONEXANT 0xC /* Conexant LANfinity RS7112 */ -#define DC_IS_MACRONIX(x) \ +#define DC_IS_MACRONIX(x) \ (x->dc_type == DC_TYPE_98713 || \ x->dc_type == DC_TYPE_98713A || \ x->dc_type == DC_TYPE_987x5) -#define DC_IS_ADMTEK(x) \ +#define DC_IS_ADMTEK(x) \ (x->dc_type == DC_TYPE_AL981 || \ x->dc_type == DC_TYPE_AN983) -#define DC_IS_INTEL(x) (x->dc_type == DC_TYPE_21143) -#define DC_IS_ASIX(x) (x->dc_type == DC_TYPE_ASIX) -#define DC_IS_COMET(x) (x->dc_type == DC_TYPE_AL981) -#define DC_IS_CENTAUR(x) (x->dc_type == DC_TYPE_AN983) -#define DC_IS_DAVICOM(x) (x->dc_type == DC_TYPE_DM9102) -#define DC_IS_PNICII(x) (x->dc_type == DC_TYPE_PNICII) -#define DC_IS_PNIC(x) (x->dc_type == DC_TYPE_PNIC) +#define DC_IS_INTEL(x) (x->dc_type == DC_TYPE_21143) +#define DC_IS_ASIX(x) (x->dc_type == DC_TYPE_ASIX) +#define DC_IS_COMET(x) (x->dc_type == DC_TYPE_AL981) +#define DC_IS_CENTAUR(x) (x->dc_type == DC_TYPE_AN983) +#define DC_IS_DAVICOM(x) (x->dc_type == DC_TYPE_DM9102) +#define DC_IS_PNICII(x) (x->dc_type == DC_TYPE_PNICII) +#define DC_IS_PNIC(x) (x->dc_type == DC_TYPE_PNIC) #define DC_IS_XIRCOM(x) (x->dc_type == DC_TYPE_XIRCOM) -#define DC_IS_CONEXANT(x) (x->dc_type == DC_TYPE_CONEXANT) +#define DC_IS_CONEXANT(x) (x->dc_type == DC_TYPE_CONEXANT) /* MII/symbol mode port types */ -#define DC_PMODE_MII 0x1 -#define DC_PMODE_SYM 0x2 -#define DC_PMODE_SIA 0x3 +#define DC_PMODE_MII 0x1 +#define DC_PMODE_SYM 0x2 +#define DC_PMODE_SIA 0x3 /* * Bus control bits. */ -#define DC_BUSCTL_RESET 0x00000001 -#define DC_BUSCTL_ARBITRATION 0x00000002 -#define DC_BUSCTL_SKIPLEN 0x0000007C -#define DC_BUSCTL_BUF_BIGENDIAN 0x00000080 -#define DC_BUSCTL_BURSTLEN 0x00003F00 -#define DC_BUSCTL_CACHEALIGN 0x0000C000 -#define DC_BUSCTL_TXPOLL 0x000E0000 -#define DC_BUSCTL_DBO 0x00100000 -#define DC_BUSCTL_MRME 0x00200000 -#define DC_BUSCTL_MRLE 0x00800000 -#define DC_BUSCTL_MWIE 0x01000000 -#define DC_BUSCTL_ONNOW_ENB 0x04000000 +#define DC_BUSCTL_RESET 0x00000001 +#define DC_BUSCTL_ARBITRATION 0x00000002 +#define DC_BUSCTL_SKIPLEN 0x0000007C +#define DC_BUSCTL_BUF_BIGENDIAN 0x00000080 +#define DC_BUSCTL_BURSTLEN 0x00003F00 +#define DC_BUSCTL_CACHEALIGN 0x0000C000 +#define DC_BUSCTL_TXPOLL 0x000E0000 +#define DC_BUSCTL_DBO 0x00100000 +#define DC_BUSCTL_MRME 0x00200000 +#define DC_BUSCTL_MRLE 0x00800000 +#define DC_BUSCTL_MWIE 0x01000000 +#define DC_BUSCTL_ONNOW_ENB 0x04000000 -#define DC_SKIPLEN_1LONG 0x00000004 -#define DC_SKIPLEN_2LONG 0x00000008 -#define DC_SKIPLEN_3LONG 0x00000010 -#define DC_SKIPLEN_4LONG 0x00000020 -#define DC_SKIPLEN_5LONG 0x00000040 +#define DC_SKIPLEN_1LONG 0x00000004 +#define DC_SKIPLEN_2LONG 0x00000008 +#define DC_SKIPLEN_3LONG 0x00000010 +#define DC_SKIPLEN_4LONG 0x00000020 +#define DC_SKIPLEN_5LONG 0x00000040 -#define DC_CACHEALIGN_NONE 0x00000000 -#define DC_CACHEALIGN_8LONG 0x00004000 -#define DC_CACHEALIGN_16LONG 0x00008000 -#define DC_CACHEALIGN_32LONG 0x0000C000 +#define DC_CACHEALIGN_NONE 0x00000000 +#define DC_CACHEALIGN_8LONG 0x00004000 +#define DC_CACHEALIGN_16LONG 0x00008000 +#define DC_CACHEALIGN_32LONG 0x0000C000 -#define DC_BURSTLEN_USECA 0x00000000 -#define DC_BURSTLEN_1LONG 0x00000100 -#define DC_BURSTLEN_2LONG 0x00000200 -#define DC_BURSTLEN_4LONG 0x00000400 -#define DC_BURSTLEN_8LONG 0x00000800 -#define DC_BURSTLEN_16LONG 0x00001000 -#define DC_BURSTLEN_32LONG 0x00002000 +#define DC_BURSTLEN_USECA 0x00000000 +#define DC_BURSTLEN_1LONG 0x00000100 +#define DC_BURSTLEN_2LONG 0x00000200 +#define DC_BURSTLEN_4LONG 0x00000400 +#define DC_BURSTLEN_8LONG 0x00000800 +#define DC_BURSTLEN_16LONG 0x00001000 +#define DC_BURSTLEN_32LONG 0x00002000 -#define DC_TXPOLL_OFF 0x00000000 -#define DC_TXPOLL_1 0x00020000 -#define DC_TXPOLL_2 0x00040000 -#define DC_TXPOLL_3 0x00060000 -#define DC_TXPOLL_4 0x00080000 -#define DC_TXPOLL_5 0x000A0000 -#define DC_TXPOLL_6 0x000C0000 -#define DC_TXPOLL_7 0x000E0000 +#define DC_TXPOLL_OFF 0x00000000 +#define DC_TXPOLL_1 0x00020000 +#define DC_TXPOLL_2 0x00040000 +#define DC_TXPOLL_3 0x00060000 +#define DC_TXPOLL_4 0x00080000 +#define DC_TXPOLL_5 0x000A0000 +#define DC_TXPOLL_6 0x000C0000 +#define DC_TXPOLL_7 0x000E0000 /* * Interrupt status bits. */ -#define DC_ISR_TX_OK 0x00000001 -#define DC_ISR_TX_IDLE 0x00000002 -#define DC_ISR_TX_NOBUF 0x00000004 -#define DC_ISR_TX_JABBERTIMEO 0x00000008 -#define DC_ISR_LINKGOOD 0x00000010 -#define DC_ISR_TX_UNDERRUN 0x00000020 -#define DC_ISR_RX_OK 0x00000040 -#define DC_ISR_RX_NOBUF 0x00000080 -#define DC_ISR_RX_READ 0x00000100 -#define DC_ISR_RX_WATDOGTIMEO 0x00000200 -#define DC_ISR_TX_EARLY 0x00000400 -#define DC_ISR_TIMER_EXPIRED 0x00000800 -#define DC_ISR_LINKFAIL 0x00001000 -#define DC_ISR_BUS_ERR 0x00002000 -#define DC_ISR_RX_EARLY 0x00004000 -#define DC_ISR_ABNORMAL 0x00008000 -#define DC_ISR_NORMAL 0x00010000 -#define DC_ISR_RX_STATE 0x000E0000 -#define DC_ISR_TX_STATE 0x00700000 -#define DC_ISR_BUSERRTYPE 0x03800000 -#define DC_ISR_100MBPSLINK 0x08000000 -#define DC_ISR_MAGICKPACK 0x10000000 +#define DC_ISR_TX_OK 0x00000001 +#define DC_ISR_TX_IDLE 0x00000002 +#define DC_ISR_TX_NOBUF 0x00000004 +#define DC_ISR_TX_JABBERTIMEO 0x00000008 +#define DC_ISR_LINKGOOD 0x00000010 +#define DC_ISR_TX_UNDERRUN 0x00000020 +#define DC_ISR_RX_OK 0x00000040 +#define DC_ISR_RX_NOBUF 0x00000080 +#define DC_ISR_RX_READ 0x00000100 +#define DC_ISR_RX_WATDOGTIMEO 0x00000200 +#define DC_ISR_TX_EARLY 0x00000400 +#define DC_ISR_TIMER_EXPIRED 0x00000800 +#define DC_ISR_LINKFAIL 0x00001000 +#define DC_ISR_BUS_ERR 0x00002000 +#define DC_ISR_RX_EARLY 0x00004000 +#define DC_ISR_ABNORMAL 0x00008000 +#define DC_ISR_NORMAL 0x00010000 +#define DC_ISR_RX_STATE 0x000E0000 +#define DC_ISR_TX_STATE 0x00700000 +#define DC_ISR_BUSERRTYPE 0x03800000 +#define DC_ISR_100MBPSLINK 0x08000000 +#define DC_ISR_MAGICKPACK 0x10000000 -#define DC_RXSTATE_STOPPED 0x00000000 /* 000 - Stopped */ -#define DC_RXSTATE_FETCH 0x00020000 /* 001 - Fetching descriptor */ -#define DC_RXSTATE_ENDCHECK 0x00040000 /* 010 - check for rx end */ -#define DC_RXSTATE_WAIT 0x00060000 /* 011 - waiting for packet */ -#define DC_RXSTATE_SUSPEND 0x00080000 /* 100 - suspend rx */ -#define DC_RXSTATE_CLOSE 0x000A0000 /* 101 - close tx desc */ -#define DC_RXSTATE_FLUSH 0x000C0000 /* 110 - flush from FIFO */ -#define DC_RXSTATE_DEQUEUE 0x000E0000 /* 111 - dequeue from FIFO */ +#define DC_RXSTATE_STOPPED 0x00000000 /* 000 - Stopped */ +#define DC_RXSTATE_FETCH 0x00020000 /* 001 - Fetching descriptor */ +#define DC_RXSTATE_ENDCHECK 0x00040000 /* 010 - check for rx end */ +#define DC_RXSTATE_WAIT 0x00060000 /* 011 - waiting for packet */ +#define DC_RXSTATE_SUSPEND 0x00080000 /* 100 - suspend rx */ +#define DC_RXSTATE_CLOSE 0x000A0000 /* 101 - close tx desc */ +#define DC_RXSTATE_FLUSH 0x000C0000 /* 110 - flush from FIFO */ +#define DC_RXSTATE_DEQUEUE 0x000E0000 /* 111 - dequeue from FIFO */ #define DC_HAS_BROKEN_RXSTATE(x) \ (DC_IS_CENTAUR(x) || DC_IS_CONEXANT(x) || (DC_IS_DAVICOM(x) && \ pci_get_revid((x)->dc_dev) >= DC_REVISION_DM9102A)) -#define DC_TXSTATE_RESET 0x00000000 /* 000 - reset */ -#define DC_TXSTATE_FETCH 0x00100000 /* 001 - fetching descriptor */ -#define DC_TXSTATE_WAITEND 0x00200000 /* 010 - wait for tx end */ -#define DC_TXSTATE_READING 0x00300000 /* 011 - read and enqueue */ -#define DC_TXSTATE_RSVD 0x00400000 /* 100 - reserved */ -#define DC_TXSTATE_SETUP 0x00500000 /* 101 - setup packet */ -#define DC_TXSTATE_SUSPEND 0x00600000 /* 110 - suspend tx */ -#define DC_TXSTATE_CLOSE 0x00700000 /* 111 - close tx desc */ +#define DC_TXSTATE_RESET 0x00000000 /* 000 - reset */ +#define DC_TXSTATE_FETCH 0x00100000 /* 001 - fetching descriptor */ +#define DC_TXSTATE_WAITEND 0x00200000 /* 010 - wait for tx end */ +#define DC_TXSTATE_READING 0x00300000 /* 011 - read and enqueue */ +#define DC_TXSTATE_RSVD 0x00400000 /* 100 - reserved */ +#define DC_TXSTATE_SETUP 0x00500000 /* 101 - setup packet */ +#define DC_TXSTATE_SUSPEND 0x00600000 /* 110 - suspend tx */ +#define DC_TXSTATE_CLOSE 0x00700000 /* 111 - close tx desc */ /* * Network config bits. */ -#define DC_NETCFG_RX_HASHPERF 0x00000001 -#define DC_NETCFG_RX_ON 0x00000002 -#define DC_NETCFG_RX_HASHONLY 0x00000004 -#define DC_NETCFG_RX_BADFRAMES 0x00000008 -#define DC_NETCFG_RX_INVFILT 0x00000010 -#define DC_NETCFG_BACKOFFCNT 0x00000020 -#define DC_NETCFG_RX_PROMISC 0x00000040 -#define DC_NETCFG_RX_ALLMULTI 0x00000080 -#define DC_NETCFG_FULLDUPLEX 0x00000200 -#define DC_NETCFG_LOOPBACK 0x00000C00 -#define DC_NETCFG_FORCECOLL 0x00001000 -#define DC_NETCFG_TX_ON 0x00002000 -#define DC_NETCFG_TX_THRESH 0x0000C000 -#define DC_NETCFG_TX_BACKOFF 0x00020000 -#define DC_NETCFG_PORTSEL 0x00040000 /* 0 == 10, 1 == 100 */ -#define DC_NETCFG_HEARTBEAT 0x00080000 -#define DC_NETCFG_STORENFWD 0x00200000 -#define DC_NETCFG_SPEEDSEL 0x00400000 /* 1 == 10, 0 == 100 */ -#define DC_NETCFG_PCS 0x00800000 -#define DC_NETCFG_SCRAMBLER 0x01000000 -#define DC_NETCFG_NO_RXCRC 0x02000000 -#define DC_NETCFG_RX_ALL 0x40000000 -#define DC_NETCFG_CAPEFFECT 0x80000000 +#define DC_NETCFG_RX_HASHPERF 0x00000001 +#define DC_NETCFG_RX_ON 0x00000002 +#define DC_NETCFG_RX_HASHONLY 0x00000004 +#define DC_NETCFG_RX_BADFRAMES 0x00000008 +#define DC_NETCFG_RX_INVFILT 0x00000010 +#define DC_NETCFG_BACKOFFCNT 0x00000020 +#define DC_NETCFG_RX_PROMISC 0x00000040 +#define DC_NETCFG_RX_ALLMULTI 0x00000080 +#define DC_NETCFG_FULLDUPLEX 0x00000200 +#define DC_NETCFG_LOOPBACK 0x00000C00 +#define DC_NETCFG_FORCECOLL 0x00001000 +#define DC_NETCFG_TX_ON 0x00002000 +#define DC_NETCFG_TX_THRESH 0x0000C000 +#define DC_NETCFG_TX_BACKOFF 0x00020000 +#define DC_NETCFG_PORTSEL 0x00040000 /* 0 == 10, 1 == 100 */ +#define DC_NETCFG_HEARTBEAT 0x00080000 +#define DC_NETCFG_STORENFWD 0x00200000 +#define DC_NETCFG_SPEEDSEL 0x00400000 /* 1 == 10, 0 == 100 */ +#define DC_NETCFG_PCS 0x00800000 +#define DC_NETCFG_SCRAMBLER 0x01000000 +#define DC_NETCFG_NO_RXCRC 0x02000000 +#define DC_NETCFG_RX_ALL 0x40000000 +#define DC_NETCFG_CAPEFFECT 0x80000000 -#define DC_OPMODE_NORM 0x00000000 -#define DC_OPMODE_INTLOOP 0x00000400 -#define DC_OPMODE_EXTLOOP 0x00000800 +#define DC_OPMODE_NORM 0x00000000 +#define DC_OPMODE_INTLOOP 0x00000400 +#define DC_OPMODE_EXTLOOP 0x00000800 #if 0 -#define DC_TXTHRESH_72BYTES 0x00000000 -#define DC_TXTHRESH_96BYTES 0x00004000 -#define DC_TXTHRESH_128BYTES 0x00008000 -#define DC_TXTHRESH_160BYTES 0x0000C000 +#define DC_TXTHRESH_72BYTES 0x00000000 +#define DC_TXTHRESH_96BYTES 0x00004000 +#define DC_TXTHRESH_128BYTES 0x00008000 +#define DC_TXTHRESH_160BYTES 0x0000C000 #endif -#define DC_TXTHRESH_MIN 0x00000000 -#define DC_TXTHRESH_INC 0x00004000 -#define DC_TXTHRESH_MAX 0x0000C000 +#define DC_TXTHRESH_MIN 0x00000000 +#define DC_TXTHRESH_INC 0x00004000 +#define DC_TXTHRESH_MAX 0x0000C000 /* * Interrupt mask bits. */ -#define DC_IMR_TX_OK 0x00000001 -#define DC_IMR_TX_IDLE 0x00000002 -#define DC_IMR_TX_NOBUF 0x00000004 -#define DC_IMR_TX_JABBERTIMEO 0x00000008 -#define DC_IMR_LINKGOOD 0x00000010 -#define DC_IMR_TX_UNDERRUN 0x00000020 -#define DC_IMR_RX_OK 0x00000040 -#define DC_IMR_RX_NOBUF 0x00000080 -#define DC_IMR_RX_READ 0x00000100 -#define DC_IMR_RX_WATDOGTIMEO 0x00000200 -#define DC_IMR_TX_EARLY 0x00000400 -#define DC_IMR_TIMER_EXPIRED 0x00000800 -#define DC_IMR_LINKFAIL 0x00001000 -#define DC_IMR_BUS_ERR 0x00002000 -#define DC_IMR_RX_EARLY 0x00004000 -#define DC_IMR_ABNORMAL 0x00008000 -#define DC_IMR_NORMAL 0x00010000 -#define DC_IMR_100MBPSLINK 0x08000000 -#define DC_IMR_MAGICKPACK 0x10000000 +#define DC_IMR_TX_OK 0x00000001 +#define DC_IMR_TX_IDLE 0x00000002 +#define DC_IMR_TX_NOBUF 0x00000004 +#define DC_IMR_TX_JABBERTIMEO 0x00000008 +#define DC_IMR_LINKGOOD 0x00000010 +#define DC_IMR_TX_UNDERRUN 0x00000020 +#define DC_IMR_RX_OK 0x00000040 +#define DC_IMR_RX_NOBUF 0x00000080 +#define DC_IMR_RX_READ 0x00000100 +#define DC_IMR_RX_WATDOGTIMEO 0x00000200 +#define DC_IMR_TX_EARLY 0x00000400 +#define DC_IMR_TIMER_EXPIRED 0x00000800 +#define DC_IMR_LINKFAIL 0x00001000 +#define DC_IMR_BUS_ERR 0x00002000 +#define DC_IMR_RX_EARLY 0x00004000 +#define DC_IMR_ABNORMAL 0x00008000 +#define DC_IMR_NORMAL 0x00010000 +#define DC_IMR_100MBPSLINK 0x08000000 +#define DC_IMR_MAGICKPACK 0x10000000 -#define DC_INTRS \ +#define DC_INTRS \ (DC_IMR_RX_OK|DC_IMR_TX_OK|DC_IMR_RX_NOBUF|DC_IMR_RX_WATDOGTIMEO|\ DC_IMR_TX_NOBUF|DC_IMR_TX_UNDERRUN|DC_IMR_BUS_ERR| \ DC_IMR_ABNORMAL|DC_IMR_NORMAL/*|DC_IMR_TX_EARLY*/) /* * Serial I/O (EEPROM/ROM) bits. */ -#define DC_SIO_EE_CS 0x00000001 /* EEPROM chip select */ -#define DC_SIO_EE_CLK 0x00000002 /* EEPROM clock */ -#define DC_SIO_EE_DATAIN 0x00000004 /* EEPROM data output */ -#define DC_SIO_EE_DATAOUT 0x00000008 /* EEPROM data input */ -#define DC_SIO_ROMDATA4 0x00000010 -#define DC_SIO_ROMDATA5 0x00000020 -#define DC_SIO_ROMDATA6 0x00000040 -#define DC_SIO_ROMDATA7 0x00000080 -#define DC_SIO_EESEL 0x00000800 -#define DC_SIO_ROMSEL 0x00001000 -#define DC_SIO_ROMCTL_WRITE 0x00002000 -#define DC_SIO_ROMCTL_READ 0x00004000 -#define DC_SIO_MII_CLK 0x00010000 /* MDIO clock */ -#define DC_SIO_MII_DATAOUT 0x00020000 /* MDIO data out */ -#define DC_SIO_MII_DIR 0x00040000 /* MDIO dir */ -#define DC_SIO_MII_DATAIN 0x00080000 /* MDIO data in */ +#define DC_SIO_EE_CS 0x00000001 /* EEPROM chip select */ +#define DC_SIO_EE_CLK 0x00000002 /* EEPROM clock */ +#define DC_SIO_EE_DATAIN 0x00000004 /* EEPROM data output */ +#define DC_SIO_EE_DATAOUT 0x00000008 /* EEPROM data input */ +#define DC_SIO_ROMDATA4 0x00000010 +#define DC_SIO_ROMDATA5 0x00000020 +#define DC_SIO_ROMDATA6 0x00000040 +#define DC_SIO_ROMDATA7 0x00000080 +#define DC_SIO_EESEL 0x00000800 +#define DC_SIO_ROMSEL 0x00001000 +#define DC_SIO_ROMCTL_WRITE 0x00002000 +#define DC_SIO_ROMCTL_READ 0x00004000 +#define DC_SIO_MII_CLK 0x00010000 /* MDIO clock */ +#define DC_SIO_MII_DATAOUT 0x00020000 /* MDIO data out */ +#define DC_SIO_MII_DIR 0x00040000 /* MDIO dir */ +#define DC_SIO_MII_DATAIN 0x00080000 /* MDIO data in */ -#define DC_EECMD_WRITE 0x140 -#define DC_EECMD_READ 0x180 -#define DC_EECMD_ERASE 0x1c0 +#define DC_EECMD_WRITE 0x140 +#define DC_EECMD_READ 0x180 +#define DC_EECMD_ERASE 0x1c0 -#define DC_EE_NODEADDR_OFFSET 0x70 -#define DC_EE_NODEADDR 10 +#define DC_EE_NODEADDR_OFFSET 0x70 +#define DC_EE_NODEADDR 10 /* * General purpose timer register */ -#define DC_TIMER_VALUE 0x0000FFFF -#define DC_TIMER_CONTINUOUS 0x00010000 +#define DC_TIMER_VALUE 0x0000FFFF +#define DC_TIMER_CONTINUOUS 0x00010000 /* * 10baseT status register */ -#define DC_TSTAT_MIIACT 0x00000001 /* MII port activity */ -#define DC_TSTAT_LS100 0x00000002 /* link status of 100baseTX */ -#define DC_TSTAT_LS10 0x00000004 /* link status of 10baseT */ -#define DC_TSTAT_AUTOPOLARITY 0x00000008 -#define DC_TSTAT_AUIACT 0x00000100 /* AUI activity */ -#define DC_TSTAT_10BTACT 0x00000200 /* 10baseT activity */ -#define DC_TSTAT_NSN 0x00000400 /* non-stable FLPs detected */ -#define DC_TSTAT_REMFAULT 0x00000800 -#define DC_TSTAT_ANEGSTAT 0x00007000 -#define DC_TSTAT_LP_CAN_NWAY 0x00008000 /* link partner supports NWAY */ -#define DC_TSTAT_LPCODEWORD 0xFFFF0000 /* link partner's code word */ +#define DC_TSTAT_MIIACT 0x00000001 /* MII port activity */ +#define DC_TSTAT_LS100 0x00000002 /* link status of 100baseTX */ +#define DC_TSTAT_LS10 0x00000004 /* link status of 10baseT */ +#define DC_TSTAT_AUTOPOLARITY 0x00000008 +#define DC_TSTAT_AUIACT 0x00000100 /* AUI activity */ +#define DC_TSTAT_10BTACT 0x00000200 /* 10baseT activity */ +#define DC_TSTAT_NSN 0x00000400 /* non-stable FLPs detected */ +#define DC_TSTAT_REMFAULT 0x00000800 +#define DC_TSTAT_ANEGSTAT 0x00007000 +#define DC_TSTAT_LP_CAN_NWAY 0x00008000 /* link partner supports NWAY */ +#define DC_TSTAT_LPCODEWORD 0xFFFF0000 /* link partner's code word */ -#define DC_ASTAT_DISABLE 0x00000000 -#define DC_ASTAT_TXDISABLE 0x00001000 -#define DC_ASTAT_ABDETECT 0x00002000 -#define DC_ASTAT_ACKDETECT 0x00003000 -#define DC_ASTAT_CMPACKDETECT 0x00004000 -#define DC_ASTAT_AUTONEGCMP 0x00005000 -#define DC_ASTAT_LINKCHECK 0x00006000 +#define DC_ASTAT_DISABLE 0x00000000 +#define DC_ASTAT_TXDISABLE 0x00001000 +#define DC_ASTAT_ABDETECT 0x00002000 +#define DC_ASTAT_ACKDETECT 0x00003000 +#define DC_ASTAT_CMPACKDETECT 0x00004000 +#define DC_ASTAT_AUTONEGCMP 0x00005000 +#define DC_ASTAT_LINKCHECK 0x00006000 /* * PHY reset register */ -#define DC_SIA_RESET 0x00000001 -#define DC_SIA_AUI 0x00000008 /* AUI or 10baseT */ +#define DC_SIA_RESET 0x00000001 +#define DC_SIA_AUI 0x00000008 /* AUI or 10baseT */ /* * 10baseT control register */ -#define DC_TCTL_ENCODER_ENB 0x00000001 -#define DC_TCTL_LOOPBACK 0x00000002 -#define DC_TCTL_DRIVER_ENB 0x00000004 -#define DC_TCTL_LNKPULSE_ENB 0x00000008 -#define DC_TCTL_HALFDUPLEX 0x00000040 -#define DC_TCTL_AUTONEGENBL 0x00000080 -#define DC_TCTL_RX_SQUELCH 0x00000100 -#define DC_TCTL_COLL_SQUELCH 0x00000200 -#define DC_TCTL_COLL_DETECT 0x00000400 -#define DC_TCTL_SQE_ENB 0x00000800 -#define DC_TCTL_LINKTEST 0x00001000 -#define DC_TCTL_AUTOPOLARITY 0x00002000 -#define DC_TCTL_SET_POL_PLUS 0x00004000 -#define DC_TCTL_AUTOSENSE 0x00008000 /* 10bt/AUI autosense */ -#define DC_TCTL_100BTXHALF 0x00010000 -#define DC_TCTL_100BTXFULL 0x00020000 -#define DC_TCTL_100BT4 0x00040000 +#define DC_TCTL_ENCODER_ENB 0x00000001 +#define DC_TCTL_LOOPBACK 0x00000002 +#define DC_TCTL_DRIVER_ENB 0x00000004 +#define DC_TCTL_LNKPULSE_ENB 0x00000008 +#define DC_TCTL_HALFDUPLEX 0x00000040 +#define DC_TCTL_AUTONEGENBL 0x00000080 +#define DC_TCTL_RX_SQUELCH 0x00000100 +#define DC_TCTL_COLL_SQUELCH 0x00000200 +#define DC_TCTL_COLL_DETECT 0x00000400 +#define DC_TCTL_SQE_ENB 0x00000800 +#define DC_TCTL_LINKTEST 0x00001000 +#define DC_TCTL_AUTOPOLARITY 0x00002000 +#define DC_TCTL_SET_POL_PLUS 0x00004000 +#define DC_TCTL_AUTOSENSE 0x00008000 /* 10bt/AUI autosense */ +#define DC_TCTL_100BTXHALF 0x00010000 +#define DC_TCTL_100BTXFULL 0x00020000 +#define DC_TCTL_100BT4 0x00040000 /* * Watchdog timer register */ -#define DC_WDOG_JABBERDIS 0x00000001 -#define DC_WDOG_HOSTUNJAB 0x00000002 -#define DC_WDOG_JABBERCLK 0x00000004 -#define DC_WDOG_RXWDOGDIS 0x00000010 -#define DC_WDOG_RXWDOGCLK 0x00000020 -#define DC_WDOG_MUSTBEZERO 0x00000100 -#define DC_WDOG_AUIBNC 0x00100000 -#define DC_WDOG_ACTIVITY 0x00200000 -#define DC_WDOG_RX_MATCH 0x00400000 -#define DC_WDOG_LINK 0x00800000 -#define DC_WDOG_CTLWREN 0x08000000 +#define DC_WDOG_JABBERDIS 0x00000001 +#define DC_WDOG_HOSTUNJAB 0x00000002 +#define DC_WDOG_JABBERCLK 0x00000004 +#define DC_WDOG_RXWDOGDIS 0x00000010 +#define DC_WDOG_RXWDOGCLK 0x00000020 +#define DC_WDOG_MUSTBEZERO 0x00000100 +#define DC_WDOG_AUIBNC 0x00100000 +#define DC_WDOG_ACTIVITY 0x00200000 +#define DC_WDOG_RX_MATCH 0x00400000 +#define DC_WDOG_LINK 0x00800000 +#define DC_WDOG_CTLWREN 0x08000000 /* * SIA and General Purpose Port register (X3201) */ -#define DC_SIAGP_RXMATCH 0x40000000 -#define DC_SIAGP_INT1 0x20000000 -#define DC_SIAGP_INT0 0x10000000 -#define DC_SIAGP_WRITE_EN 0x08000000 -#define DC_SIAGP_RXMATCH_EN 0x04000000 -#define DC_SIAGP_INT1_EN 0x02000000 -#define DC_SIAGP_INT0_EN 0x01000000 -#define DC_SIAGP_LED3 0x00800000 -#define DC_SIAGP_LED2 0x00400000 -#define DC_SIAGP_LED1 0x00200000 -#define DC_SIAGP_LED0 0x00100000 -#define DC_SIAGP_MD_GP3_OUTPUT 0x00080000 -#define DC_SIAGP_MD_GP2_OUTPUT 0x00040000 -#define DC_SIAGP_MD_GP1_OUTPUT 0x00020000 -#define DC_SIAGP_MD_GP0_OUTPUT 0x00010000 +#define DC_SIAGP_RXMATCH 0x40000000 +#define DC_SIAGP_INT1 0x20000000 +#define DC_SIAGP_INT0 0x10000000 +#define DC_SIAGP_WRITE_EN 0x08000000 +#define DC_SIAGP_RXMATCH_EN 0x04000000 +#define DC_SIAGP_INT1_EN 0x02000000 +#define DC_SIAGP_INT0_EN 0x01000000 +#define DC_SIAGP_LED3 0x00800000 +#define DC_SIAGP_LED2 0x00400000 +#define DC_SIAGP_LED1 0x00200000 +#define DC_SIAGP_LED0 0x00100000 +#define DC_SIAGP_MD_GP3_OUTPUT 0x00080000 +#define DC_SIAGP_MD_GP2_OUTPUT 0x00040000 +#define DC_SIAGP_MD_GP1_OUTPUT 0x00020000 +#define DC_SIAGP_MD_GP0_OUTPUT 0x00010000 /* * Size of a setup frame. */ -#define DC_SFRAME_LEN 192 +#define DC_SFRAME_LEN 192 /* * 21x4x TX/RX list structure. */ struct dc_desc { - u_int32_t dc_status; - u_int32_t dc_ctl; - u_int32_t dc_ptr1; - u_int32_t dc_ptr2; + uint32_t dc_status; + uint32_t dc_ctl; + uint32_t dc_ptr1; + uint32_t dc_ptr2; }; -#define dc_data dc_ptr1 -#define dc_next dc_ptr2 +#define dc_data dc_ptr1 +#define dc_next dc_ptr2 -#define DC_RXSTAT_FIFOOFLOW 0x00000001 -#define DC_RXSTAT_CRCERR 0x00000002 -#define DC_RXSTAT_DRIBBLE 0x00000004 -#define DC_RXSTAT_MIIERE 0x00000008 -#define DC_RXSTAT_WATCHDOG 0x00000010 -#define DC_RXSTAT_FRAMETYPE 0x00000020 /* 0 == IEEE 802.3 */ -#define DC_RXSTAT_COLLSEEN 0x00000040 -#define DC_RXSTAT_GIANT 0x00000080 -#define DC_RXSTAT_LASTFRAG 0x00000100 -#define DC_RXSTAT_FIRSTFRAG 0x00000200 -#define DC_RXSTAT_MULTICAST 0x00000400 -#define DC_RXSTAT_RUNT 0x00000800 -#define DC_RXSTAT_RXTYPE 0x00003000 -#define DC_RXSTAT_DE 0x00004000 -#define DC_RXSTAT_RXERR 0x00008000 -#define DC_RXSTAT_RXLEN 0x3FFF0000 -#define DC_RXSTAT_OWN 0x80000000 +#define DC_RXSTAT_FIFOOFLOW 0x00000001 +#define DC_RXSTAT_CRCERR 0x00000002 +#define DC_RXSTAT_DRIBBLE 0x00000004 +#define DC_RXSTAT_MIIERE 0x00000008 +#define DC_RXSTAT_WATCHDOG 0x00000010 +#define DC_RXSTAT_FRAMETYPE 0x00000020 /* 0 == IEEE 802.3 */ +#define DC_RXSTAT_COLLSEEN 0x00000040 +#define DC_RXSTAT_GIANT 0x00000080 +#define DC_RXSTAT_LASTFRAG 0x00000100 +#define DC_RXSTAT_FIRSTFRAG 0x00000200 +#define DC_RXSTAT_MULTICAST 0x00000400 +#define DC_RXSTAT_RUNT 0x00000800 +#define DC_RXSTAT_RXTYPE 0x00003000 +#define DC_RXSTAT_DE 0x00004000 +#define DC_RXSTAT_RXERR 0x00008000 +#define DC_RXSTAT_RXLEN 0x3FFF0000 +#define DC_RXSTAT_OWN 0x80000000 -#define DC_RXBYTES(x) ((x & DC_RXSTAT_RXLEN) >> 16) -#define DC_RXSTAT (DC_RXSTAT_FIRSTFRAG|DC_RXSTAT_LASTFRAG|DC_RXSTAT_OWN) +#define DC_RXBYTES(x) ((x & DC_RXSTAT_RXLEN) >> 16) +#define DC_RXSTAT (DC_RXSTAT_FIRSTFRAG|DC_RXSTAT_LASTFRAG|DC_RXSTAT_OWN) -#define DC_RXCTL_BUFLEN1 0x00000FFF -#define DC_RXCTL_BUFLEN2 0x00FFF000 -#define DC_RXCTL_RLINK 0x01000000 -#define DC_RXCTL_RLAST 0x02000000 +#define DC_RXCTL_BUFLEN1 0x00000FFF +#define DC_RXCTL_BUFLEN2 0x00FFF000 +#define DC_RXCTL_RLINK 0x01000000 +#define DC_RXCTL_RLAST 0x02000000 -#define DC_TXSTAT_DEFER 0x00000001 -#define DC_TXSTAT_UNDERRUN 0x00000002 -#define DC_TXSTAT_LINKFAIL 0x00000003 -#define DC_TXSTAT_COLLCNT 0x00000078 -#define DC_TXSTAT_SQE 0x00000080 -#define DC_TXSTAT_EXCESSCOLL 0x00000100 -#define DC_TXSTAT_LATECOLL 0x00000200 -#define DC_TXSTAT_NOCARRIER 0x00000400 -#define DC_TXSTAT_CARRLOST 0x00000800 -#define DC_TXSTAT_JABTIMEO 0x00004000 -#define DC_TXSTAT_ERRSUM 0x00008000 -#define DC_TXSTAT_OWN 0x80000000 +#define DC_TXSTAT_DEFER 0x00000001 +#define DC_TXSTAT_UNDERRUN 0x00000002 +#define DC_TXSTAT_LINKFAIL 0x00000003 +#define DC_TXSTAT_COLLCNT 0x00000078 +#define DC_TXSTAT_SQE 0x00000080 +#define DC_TXSTAT_EXCESSCOLL 0x00000100 +#define DC_TXSTAT_LATECOLL 0x00000200 +#define DC_TXSTAT_NOCARRIER 0x00000400 +#define DC_TXSTAT_CARRLOST 0x00000800 +#define DC_TXSTAT_JABTIMEO 0x00004000 +#define DC_TXSTAT_ERRSUM 0x00008000 +#define DC_TXSTAT_OWN 0x80000000 -#define DC_TXCTL_BUFLEN1 0x000007FF -#define DC_TXCTL_BUFLEN2 0x003FF800 -#define DC_TXCTL_FILTTYPE0 0x00400000 -#define DC_TXCTL_PAD 0x00800000 -#define DC_TXCTL_TLINK 0x01000000 -#define DC_TXCTL_TLAST 0x02000000 -#define DC_TXCTL_NOCRC 0x04000000 -#define DC_TXCTL_SETUP 0x08000000 -#define DC_TXCTL_FILTTYPE1 0x10000000 -#define DC_TXCTL_FIRSTFRAG 0x20000000 -#define DC_TXCTL_LASTFRAG 0x40000000 -#define DC_TXCTL_FINT 0x80000000 +#define DC_TXCTL_BUFLEN1 0x000007FF +#define DC_TXCTL_BUFLEN2 0x003FF800 +#define DC_TXCTL_FILTTYPE0 0x00400000 +#define DC_TXCTL_PAD 0x00800000 +#define DC_TXCTL_TLINK 0x01000000 +#define DC_TXCTL_TLAST 0x02000000 +#define DC_TXCTL_NOCRC 0x04000000 +#define DC_TXCTL_SETUP 0x08000000 +#define DC_TXCTL_FILTTYPE1 0x10000000 +#define DC_TXCTL_FIRSTFRAG 0x20000000 +#define DC_TXCTL_LASTFRAG 0x40000000 +#define DC_TXCTL_FINT 0x80000000 -#define DC_FILTER_PERFECT 0x00000000 -#define DC_FILTER_HASHPERF 0x00400000 -#define DC_FILTER_INVERSE 0x10000000 -#define DC_FILTER_HASHONLY 0x10400000 +#define DC_FILTER_PERFECT 0x00000000 +#define DC_FILTER_HASHPERF 0x00400000 +#define DC_FILTER_INVERSE 0x10000000 +#define DC_FILTER_HASHONLY 0x10400000 -#define DC_MAXFRAGS 16 +#define DC_MAXFRAGS 16 #ifdef DEVICE_POLLING -#define DC_RX_LIST_CNT 192 +#define DC_RX_LIST_CNT 192 #else -#define DC_RX_LIST_CNT 64 +#define DC_RX_LIST_CNT 64 #endif -#define DC_TX_LIST_CNT 256 -#define DC_TX_LIST_RSVD 5 -#define DC_MIN_FRAMELEN 60 -#define DC_RXLEN 1536 +#define DC_TX_LIST_CNT 256 +#define DC_TX_LIST_RSVD 5 +#define DC_MIN_FRAMELEN 60 +#define DC_RXLEN 1536 -#define DC_INC(x, y) (x) = (x + 1) % y +#define DC_INC(x, y) (x) = (x + 1) % y + +#define DC_LIST_ALIGN (sizeof(struct dc_desc)) +#define DC_RXBUF_ALIGN 4 /* Macros to easily get the DMA address of a descriptor. */ -#define DC_RXDESC(sc, i) (sc->dc_laddr + \ - (uintptr_t)(sc->dc_ldata->dc_rx_list + i) - (uintptr_t)sc->dc_ldata) -#define DC_TXDESC(sc, i) (sc->dc_laddr + \ - (uintptr_t)(sc->dc_ldata->dc_tx_list + i) - (uintptr_t)sc->dc_ldata) +#define DC_ADDR_LO(x) ((uint64_t)(x) & 0xFFFFFFFF) +#define DC_RXDESC(sc, i) \ + (DC_ADDR_LO(sc->dc_ldata.dc_rx_list_paddr + (sizeof(struct dc_desc) * i))) +#define DC_TXDESC(sc, i) \ + (DC_ADDR_LO(sc->dc_ldata.dc_tx_list_paddr + (sizeof(struct dc_desc) * i))) #if BYTE_ORDER == BIG_ENDIAN -#define DC_SP_MAC(x) ((x) << 16) +#define DC_SP_MAC(x) ((x) << 16) #else -#define DC_SP_MAC(x) (x) +#define DC_SP_MAC(x) (x) #endif struct dc_list_data { - struct dc_desc dc_rx_list[DC_RX_LIST_CNT]; - struct dc_desc dc_tx_list[DC_TX_LIST_CNT]; + struct dc_desc *dc_rx_list; + bus_addr_t dc_rx_list_paddr; + struct dc_desc *dc_tx_list; + bus_addr_t dc_tx_list_paddr; }; +#define DC_RX_LIST_SZ ((sizeof(struct dc_desc) * DC_RX_LIST_CNT)) +#define DC_TX_LIST_SZ ((sizeof(struct dc_desc) * DC_TX_LIST_CNT)) + struct dc_chain_data { struct mbuf *dc_rx_chain[DC_RX_LIST_CNT]; struct mbuf *dc_tx_chain[DC_TX_LIST_CNT]; bus_dmamap_t dc_rx_map[DC_RX_LIST_CNT]; bus_dmamap_t dc_tx_map[DC_TX_LIST_CNT]; - u_int32_t *dc_sbuf; - u_int8_t dc_pad[DC_MIN_FRAMELEN]; + uint32_t *dc_sbuf; + uint8_t dc_pad[DC_MIN_FRAMELEN]; + int dc_tx_pkts; int dc_tx_first; int dc_tx_prod; int dc_tx_cons; @@ -504,36 +514,36 @@ struct dc_chain_data { struct dc_mediainfo { int dc_media; - u_int8_t *dc_gp_ptr; - u_int8_t dc_gp_len; - u_int8_t *dc_reset_ptr; - u_int8_t dc_reset_len; + uint8_t *dc_gp_ptr; + uint8_t dc_gp_len; + uint8_t *dc_reset_ptr; + uint8_t dc_reset_len; struct dc_mediainfo *dc_next; }; struct dc_type { - u_int32_t dc_devid; - u_int8_t dc_minrev; + uint32_t dc_devid; + uint8_t dc_minrev; char *dc_name; }; struct dc_mii_frame { - u_int8_t mii_stdelim; - u_int8_t mii_opcode; - u_int8_t mii_phyaddr; - u_int8_t mii_regaddr; - u_int8_t mii_turnaround; - u_int16_t mii_data; + uint8_t mii_stdelim; + uint8_t mii_opcode; + uint8_t mii_phyaddr; + uint8_t mii_regaddr; + uint8_t mii_turnaround; + uint16_t mii_data; }; /* * MII constants */ -#define DC_MII_STARTDELIM 0x01 -#define DC_MII_READOP 0x02 -#define DC_MII_WRITEOP 0x01 -#define DC_MII_TURNAROUND 0x02 +#define DC_MII_STARTDELIM 0x01 +#define DC_MII_READOP 0x02 +#define DC_MII_WRITEOP 0x01 +#define DC_MII_TURNAROUND 0x02 /* @@ -546,42 +556,42 @@ struct dc_mii_frame { * ADMtek specific registers and constants for the AL981 and AN983. * The AN983 doesn't use the magic PHY registers. */ -#define DC_AL_CR 0x88 /* command register */ -#define DC_AL_PAR0 0xA4 /* station address */ -#define DC_AL_PAR1 0xA8 /* station address */ -#define DC_AL_MAR0 0xAC /* multicast hash filter */ -#define DC_AL_MAR1 0xB0 /* multicast hash filter */ -#define DC_AL_BMCR 0xB4 /* built in PHY control */ -#define DC_AL_BMSR 0xB8 /* built in PHY status */ -#define DC_AL_VENID 0xBC /* built in PHY ID0 */ -#define DC_AL_DEVID 0xC0 /* built in PHY ID1 */ -#define DC_AL_ANAR 0xC4 /* built in PHY autoneg advert */ -#define DC_AL_LPAR 0xC8 /* bnilt in PHY link part. ability */ -#define DC_AL_ANER 0xCC /* built in PHY autoneg expansion */ +#define DC_AL_CR 0x88 /* command register */ +#define DC_AL_PAR0 0xA4 /* station address */ +#define DC_AL_PAR1 0xA8 /* station address */ +#define DC_AL_MAR0 0xAC /* multicast hash filter */ +#define DC_AL_MAR1 0xB0 /* multicast hash filter */ +#define DC_AL_BMCR 0xB4 /* built in PHY control */ +#define DC_AL_BMSR 0xB8 /* built in PHY status */ +#define DC_AL_VENID 0xBC /* built in PHY ID0 */ +#define DC_AL_DEVID 0xC0 /* built in PHY ID1 */ +#define DC_AL_ANAR 0xC4 /* built in PHY autoneg advert */ +#define DC_AL_LPAR 0xC8 /* bnilt in PHY link part. ability */ +#define DC_AL_ANER 0xCC /* built in PHY autoneg expansion */ -#define DC_AL_CR_ATUR 0x00000001 /* automatic TX underrun recovery */ -#define DC_ADMTEK_PHYADDR 0x1 -#define DC_AL_EE_NODEADDR 4 +#define DC_AL_CR_ATUR 0x00000001 /* automatic TX underrun recovery */ +#define DC_ADMTEK_PHYADDR 0x1 +#define DC_AL_EE_NODEADDR 4 /* End of ADMtek specific registers */ /* * ASIX specific registers. */ -#define DC_AX_FILTIDX 0x68 /* RX filter index */ -#define DC_AX_FILTDATA 0x70 /* RX filter data */ +#define DC_AX_FILTIDX 0x68 /* RX filter index */ +#define DC_AX_FILTDATA 0x70 /* RX filter data */ /* * Special ASIX-specific bits in the ASIX NETCFG register (CSR6). */ -#define DC_AX_NETCFG_RX_BROAD 0x00000100 +#define DC_AX_NETCFG_RX_BROAD 0x00000100 /* * RX Filter Index Register values */ -#define DC_AX_FILTIDX_PAR0 0x00000000 -#define DC_AX_FILTIDX_PAR1 0x00000001 -#define DC_AX_FILTIDX_MAR0 0x00000002 -#define DC_AX_FILTIDX_MAR1 0x00000003 +#define DC_AX_FILTIDX_PAR0 0x00000000 +#define DC_AX_FILTIDX_PAR1 0x00000001 +#define DC_AX_FILTIDX_MAR0 0x00000002 +#define DC_AX_FILTIDX_MAR1 0x00000003 /* End of ASIX specific registers */ /* @@ -590,22 +600,22 @@ struct dc_mii_frame { * a magic packet register, which we need to tweak a bit per the * Macronix application notes. */ -#define DC_MX_MAGICPACKET 0x80 -#define DC_MX_NWAYSTAT 0xA0 +#define DC_MX_MAGICPACKET 0x80 +#define DC_MX_NWAYSTAT 0xA0 /* * Magic packet register */ -#define DC_MX_MPACK_DISABLE 0x00400000 +#define DC_MX_MPACK_DISABLE 0x00400000 /* * NWAY status register. */ -#define DC_MX_NWAY_10BTHALF 0x08000000 -#define DC_MX_NWAY_10BTFULL 0x10000000 -#define DC_MX_NWAY_100BTHALF 0x20000000 -#define DC_MX_NWAY_100BTFULL 0x40000000 -#define DC_MX_NWAY_100BT4 0x80000000 +#define DC_MX_NWAY_10BTHALF 0x08000000 +#define DC_MX_NWAY_10BTFULL 0x10000000 +#define DC_MX_NWAY_100BTHALF 0x20000000 +#define DC_MX_NWAY_100BTFULL 0x40000000 +#define DC_MX_NWAY_100BT4 0x80000000 /* * These are magic values that must be written into CSR16 @@ -613,10 +623,10 @@ struct dc_mii_frame { * operating mode. The magic numbers are documented in the * Macronix 98715 application notes. */ -#define DC_MX_MAGIC_98713 0x0F370000 -#define DC_MX_MAGIC_98713A 0x0B3C0000 -#define DC_MX_MAGIC_98715 0x0B3C0000 -#define DC_MX_MAGIC_98725 0x0B3C0000 +#define DC_MX_MAGIC_98713 0x0F370000 +#define DC_MX_MAGIC_98713A 0x0B3C0000 +#define DC_MX_MAGIC_98715 0x0B3C0000 +#define DC_MX_MAGIC_98725 0x0B3C0000 /* End of Macronix specific registers */ /* @@ -624,20 +634,20 @@ struct dc_mii_frame { * The PNIC has its own special NWAY support, which doesn't work, * and shortcut ways of reading the EEPROM and MII bus. */ -#define DC_PN_GPIO 0x60 /* general purpose pins control */ -#define DC_PN_PWRUP_CFG 0x90 /* config register, set by EEPROM */ -#define DC_PN_SIOCTL 0x98 /* serial EEPROM control register */ -#define DC_PN_MII 0xA0 /* MII access register */ -#define DC_PN_NWAY 0xB8 /* Internal NWAY register */ +#define DC_PN_GPIO 0x60 /* general purpose pins control */ +#define DC_PN_PWRUP_CFG 0x90 /* config register, set by EEPROM */ +#define DC_PN_SIOCTL 0x98 /* serial EEPROM control register */ +#define DC_PN_MII 0xA0 /* MII access register */ +#define DC_PN_NWAY 0xB8 /* Internal NWAY register */ /* Serial I/O EEPROM register */ -#define DC_PN_SIOCTL_DATA 0x0000003F -#define DC_PN_SIOCTL_OPCODE 0x00000300 -#define DC_PN_SIOCTL_BUSY 0x80000000 +#define DC_PN_SIOCTL_DATA 0x0000003F +#define DC_PN_SIOCTL_OPCODE 0x00000300 +#define DC_PN_SIOCTL_BUSY 0x80000000 -#define DC_PN_EEOPCODE_ERASE 0x00000300 -#define DC_PN_EEOPCODE_READ 0x00000600 -#define DC_PN_EEOPCODE_WRITE 0x00000100 +#define DC_PN_EEOPCODE_ERASE 0x00000300 +#define DC_PN_EEOPCODE_READ 0x00000600 +#define DC_PN_EEOPCODE_WRITE 0x00000100 /* * The first two general purpose pins control speed selection and @@ -646,63 +656,63 @@ struct dc_mii_frame { * loopback bits set accordingly when changing media. Physically, this * will set the state of a relay mounted on the card. */ -#define DC_PN_GPIO_DATA0 0x000000001 -#define DC_PN_GPIO_DATA1 0x000000002 -#define DC_PN_GPIO_DATA2 0x000000004 -#define DC_PN_GPIO_DATA3 0x000000008 -#define DC_PN_GPIO_CTL0 0x000000010 -#define DC_PN_GPIO_CTL1 0x000000020 -#define DC_PN_GPIO_CTL2 0x000000040 -#define DC_PN_GPIO_CTL3 0x000000080 -#define DC_PN_GPIO_SPEEDSEL DC_PN_GPIO_DATA0/* 1 == 100Mbps, 0 == 10Mbps */ -#define DC_PN_GPIO_100TX_LOOP DC_PN_GPIO_DATA1/* 1 == normal, 0 == loop */ -#define DC_PN_GPIO_BNC_ENB DC_PN_GPIO_DATA2 -#define DC_PN_GPIO_100TX_LNK DC_PN_GPIO_DATA3 -#define DC_PN_GPIO_SETBIT(sc, r) \ +#define DC_PN_GPIO_DATA0 0x000000001 +#define DC_PN_GPIO_DATA1 0x000000002 +#define DC_PN_GPIO_DATA2 0x000000004 +#define DC_PN_GPIO_DATA3 0x000000008 +#define DC_PN_GPIO_CTL0 0x000000010 +#define DC_PN_GPIO_CTL1 0x000000020 +#define DC_PN_GPIO_CTL2 0x000000040 +#define DC_PN_GPIO_CTL3 0x000000080 +#define DC_PN_GPIO_SPEEDSEL DC_PN_GPIO_DATA0/* 1 == 100Mbps, 0 == 10Mbps */ +#define DC_PN_GPIO_100TX_LOOP DC_PN_GPIO_DATA1/* 1 == normal, 0 == loop */ +#define DC_PN_GPIO_BNC_ENB DC_PN_GPIO_DATA2 +#define DC_PN_GPIO_100TX_LNK DC_PN_GPIO_DATA3 +#define DC_PN_GPIO_SETBIT(sc, r) \ DC_SETBIT(sc, DC_PN_GPIO, ((r) | (r << 4))) -#define DC_PN_GPIO_CLRBIT(sc, r) \ +#define DC_PN_GPIO_CLRBIT(sc, r) \ { \ DC_SETBIT(sc, DC_PN_GPIO, ((r) << 4)); \ DC_CLRBIT(sc, DC_PN_GPIO, (r)); \ } - -/* shortcut MII access register */ -#define DC_PN_MII_DATA 0x0000FFFF -#define DC_PN_MII_RESERVER 0x00020000 -#define DC_PN_MII_REGADDR 0x007C0000 -#define DC_PN_MII_PHYADDR 0x0F800000 -#define DC_PN_MII_OPCODE 0x30000000 -#define DC_PN_MII_BUSY 0x80000000 -#define DC_PN_MIIOPCODE_READ 0x60020000 -#define DC_PN_MIIOPCODE_WRITE 0x50020000 +/* shortcut MII access register */ +#define DC_PN_MII_DATA 0x0000FFFF +#define DC_PN_MII_RESERVER 0x00020000 +#define DC_PN_MII_REGADDR 0x007C0000 +#define DC_PN_MII_PHYADDR 0x0F800000 +#define DC_PN_MII_OPCODE 0x30000000 +#define DC_PN_MII_BUSY 0x80000000 + +#define DC_PN_MIIOPCODE_READ 0x60020000 +#define DC_PN_MIIOPCODE_WRITE 0x50020000 /* Internal NWAY bits */ -#define DC_PN_NWAY_RESET 0x00000001 /* reset */ -#define DC_PN_NWAY_PDOWN 0x00000002 /* power down */ -#define DC_PN_NWAY_BYPASS 0x00000004 /* bypass */ -#define DC_PN_NWAY_AUILOWCUR 0x00000008 /* AUI low current */ -#define DC_PN_NWAY_TPEXTEND 0x00000010 /* low squelch voltage */ -#define DC_PN_NWAY_POLARITY 0x00000020 /* 0 == on, 1 == off */ -#define DC_PN_NWAY_TP 0x00000040 /* 1 == tp, 0 == AUI */ -#define DC_PN_NWAY_AUIVOLT 0x00000080 /* 1 == full, 0 == half */ -#define DC_PN_NWAY_DUPLEX 0x00000100 /* LED, 1 == full, 0 == half */ -#define DC_PN_NWAY_LINKTEST 0x00000200 /* 0 == on, 1 == off */ -#define DC_PN_NWAY_AUTODETECT 0x00000400 /* 1 == off, 0 == on */ -#define DC_PN_NWAY_SPEEDSEL 0x00000800 /* LED, 0 = 10, 1 == 100 */ -#define DC_PN_NWAY_NWAY_ENB 0x00001000 /* 0 == off, 1 == on */ -#define DC_PN_NWAY_CAP10HDX 0x00002000 -#define DC_PN_NWAY_CAP10FDX 0x00004000 -#define DC_PN_NWAY_CAP100FDX 0x00008000 -#define DC_PN_NWAY_CAP100HDX 0x00010000 -#define DC_PN_NWAY_CAP100T4 0x00020000 -#define DC_PN_NWAY_ANEGRESTART 0x02000000 /* resets when aneg done */ -#define DC_PN_NWAY_REMFAULT 0x04000000 -#define DC_PN_NWAY_LPAR10HDX 0x08000000 -#define DC_PN_NWAY_LPAR10FDX 0x10000000 -#define DC_PN_NWAY_LPAR100FDX 0x20000000 -#define DC_PN_NWAY_LPAR100HDX 0x40000000 -#define DC_PN_NWAY_LPAR100T4 0x80000000 +#define DC_PN_NWAY_RESET 0x00000001 /* reset */ +#define DC_PN_NWAY_PDOWN 0x00000002 /* power down */ +#define DC_PN_NWAY_BYPASS 0x00000004 /* bypass */ +#define DC_PN_NWAY_AUILOWCUR 0x00000008 /* AUI low current */ +#define DC_PN_NWAY_TPEXTEND 0x00000010 /* low squelch voltage */ +#define DC_PN_NWAY_POLARITY 0x00000020 /* 0 == on, 1 == off */ +#define DC_PN_NWAY_TP 0x00000040 /* 1 == tp, 0 == AUI */ +#define DC_PN_NWAY_AUIVOLT 0x00000080 /* 1 == full, 0 == half */ +#define DC_PN_NWAY_DUPLEX 0x00000100 /* LED, 1 == full, 0 == half */ +#define DC_PN_NWAY_LINKTEST 0x00000200 /* 0 == on, 1 == off */ +#define DC_PN_NWAY_AUTODETECT 0x00000400 /* 1 == off, 0 == on */ +#define DC_PN_NWAY_SPEEDSEL 0x00000800 /* LED, 0 = 10, 1 == 100 */ +#define DC_PN_NWAY_NWAY_ENB 0x00001000 /* 0 == off, 1 == on */ +#define DC_PN_NWAY_CAP10HDX 0x00002000 +#define DC_PN_NWAY_CAP10FDX 0x00004000 +#define DC_PN_NWAY_CAP100FDX 0x00008000 +#define DC_PN_NWAY_CAP100HDX 0x00010000 +#define DC_PN_NWAY_CAP100T4 0x00020000 +#define DC_PN_NWAY_ANEGRESTART 0x02000000 /* resets when aneg done */ +#define DC_PN_NWAY_REMFAULT 0x04000000 +#define DC_PN_NWAY_LPAR10HDX 0x08000000 +#define DC_PN_NWAY_LPAR10FDX 0x10000000 +#define DC_PN_NWAY_LPAR100FDX 0x20000000 +#define DC_PN_NWAY_LPAR100HDX 0x40000000 +#define DC_PN_NWAY_LPAR100T4 0x80000000 /* End of PNIC specific registers */ @@ -710,8 +720,8 @@ struct dc_mii_frame { * CONEXANT specific registers. */ -#define DC_CONEXANT_PHYADDR 0x1 -#define DC_CONEXANT_EE_NODEADDR 0x19A +#define DC_CONEXANT_PHYADDR 0x1 +#define DC_CONEXANT_EE_NODEADDR 0x19A /* End of CONEXANT specific registers */ @@ -721,34 +731,37 @@ struct dc_softc { device_t dc_dev; /* device info */ bus_space_handle_t dc_bhandle; /* bus space handle */ bus_space_tag_t dc_btag; /* bus space tag */ - bus_dma_tag_t dc_ltag; /* tag for descriptor ring */ - bus_dmamap_t dc_lmap; /* map for descriptor ring */ - u_int32_t dc_laddr; /* DMA address of dc_ldata */ - bus_dma_tag_t dc_mtag; /* tag for mbufs */ + bus_dma_tag_t dc_ptag; /* parent DMA tag */ bus_dmamap_t dc_sparemap; + bus_dma_tag_t dc_rx_ltag; /* tag for RX descriptors */ + bus_dmamap_t dc_rx_lmap; + bus_dma_tag_t dc_tx_ltag; /* tag for TX descriptors */ + bus_dmamap_t dc_tx_lmap; bus_dma_tag_t dc_stag; /* tag for the setup frame */ bus_dmamap_t dc_smap; /* map for the setup frame */ - u_int32_t dc_saddr; /* DMA address of setup frame */ + bus_addr_t dc_saddr; /* DMA address of setup frame */ + bus_dma_tag_t dc_rx_mtag; /* tag for RX mbufs */ + bus_dma_tag_t dc_tx_mtag; /* tag for TX mbufs */ void *dc_intrhand; struct resource *dc_irq; struct resource *dc_res; const struct dc_type *dc_info; /* adapter info */ device_t dc_miibus; - u_int8_t dc_type; - u_int8_t dc_pmode; - u_int8_t dc_link; - u_int8_t dc_cachesize; + uint8_t dc_type; + uint8_t dc_pmode; + uint8_t dc_link; + uint8_t dc_cachesize; int dc_romwidth; int dc_pnic_rx_bug_save; unsigned char *dc_pnic_rx_buf; int dc_if_flags; int dc_if_media; - u_int32_t dc_flags; - u_int32_t dc_txthresh; - u_int32_t dc_eaddr[2]; - u_int8_t *dc_srom; + uint32_t dc_flags; + uint32_t dc_txthresh; + uint32_t dc_eaddr[2]; + uint8_t *dc_srom; struct dc_mediainfo *dc_mi; - struct dc_list_data *dc_ldata; + struct dc_list_data dc_ldata; struct dc_chain_data dc_cdata; struct callout dc_stat_ch; struct callout dc_wdog_ch; @@ -765,37 +778,36 @@ struct dc_softc { #define DC_UNLOCK(_sc) mtx_unlock(&(_sc)->dc_mtx) #define DC_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->dc_mtx, MA_OWNED) -#define DC_TX_POLL 0x00000001 -#define DC_TX_COALESCE 0x00000002 -#define DC_TX_ADMTEK_WAR 0x00000004 -#define DC_TX_USE_TX_INTR 0x00000008 -#define DC_RX_FILTER_TULIP 0x00000010 -#define DC_TX_INTR_FIRSTFRAG 0x00000020 -#define DC_PNIC_RX_BUG_WAR 0x00000040 -#define DC_TX_FIXED_RING 0x00000080 -#define DC_TX_STORENFWD 0x00000100 -#define DC_REDUCED_MII_POLL 0x00000200 -#define DC_TX_INTR_ALWAYS 0x00000400 -#define DC_21143_NWAY 0x00000800 -#define DC_128BIT_HASH 0x00001000 -#define DC_64BIT_HASH 0x00002000 -#define DC_TULIP_LEDS 0x00004000 -#define DC_TX_ALIGN 0x00010000 /* align mbuf on tx */ +#define DC_TX_POLL 0x00000001 +#define DC_TX_COALESCE 0x00000002 +#define DC_TX_ADMTEK_WAR 0x00000004 +#define DC_TX_USE_TX_INTR 0x00000008 +#define DC_RX_FILTER_TULIP 0x00000010 +#define DC_TX_INTR_FIRSTFRAG 0x00000020 +#define DC_PNIC_RX_BUG_WAR 0x00000040 +#define DC_TX_FIXED_RING 0x00000080 +#define DC_TX_STORENFWD 0x00000100 +#define DC_REDUCED_MII_POLL 0x00000200 +#define DC_TX_INTR_ALWAYS 0x00000400 +#define DC_21143_NWAY 0x00000800 +#define DC_128BIT_HASH 0x00001000 +#define DC_64BIT_HASH 0x00002000 +#define DC_TULIP_LEDS 0x00004000 +#define DC_TX_ALIGN 0x00010000 /* align mbuf on tx */ /* * register space access macros */ -#define CSR_WRITE_4(sc, reg, val) \ +#define CSR_WRITE_4(sc, reg, val) \ bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val) -#define CSR_READ_4(sc, reg) \ +#define CSR_READ_4(sc, reg) \ bus_space_read_4(sc->dc_btag, sc->dc_bhandle, reg) -#define CSR_BARRIER_4(sc, reg, flags) \ +#define CSR_BARRIER_4(sc, reg, flags) \ bus_space_barrier(sc->dc_btag, sc->dc_bhandle, reg, 4, flags) -#define DC_TIMEOUT 1000 -#define ETHER_ALIGN 2 +#define DC_TIMEOUT 1000 /* * General constants that are fun to know. @@ -804,12 +816,12 @@ struct dc_softc { /* * DEC PCI vendor ID */ -#define DC_VENDORID_DEC 0x1011 +#define DC_VENDORID_DEC 0x1011 /* * DEC/Intel 21143 PCI device ID */ -#define DC_DEVICEID_21143 0x0019 +#define DC_DEVICEID_21143 0x0019 /* * Macronix PCI vendor ID @@ -819,118 +831,118 @@ struct dc_softc { /* * Macronix PMAC device IDs. */ -#define DC_DEVICEID_98713 0x0512 -#define DC_DEVICEID_987x5 0x0531 -#define DC_DEVICEID_98727 0x0532 -#define DC_DEVICEID_98732 0x0532 +#define DC_DEVICEID_98713 0x0512 +#define DC_DEVICEID_987x5 0x0531 +#define DC_DEVICEID_98727 0x0532 +#define DC_DEVICEID_98732 0x0532 /* Macronix PCI revision codes. */ -#define DC_REVISION_98713 0x00 -#define DC_REVISION_98713A 0x10 -#define DC_REVISION_98715 0x20 -#define DC_REVISION_98715AEC_C 0x25 -#define DC_REVISION_98725 0x30 +#define DC_REVISION_98713 0x00 +#define DC_REVISION_98713A 0x10 +#define DC_REVISION_98715 0x20 +#define DC_REVISION_98715AEC_C 0x25 +#define DC_REVISION_98725 0x30 /* * Compex PCI vendor ID. */ -#define DC_VENDORID_CP 0x11F6 +#define DC_VENDORID_CP 0x11F6 /* * Compex PMAC PCI device IDs. */ -#define DC_DEVICEID_98713_CP 0x9881 +#define DC_DEVICEID_98713_CP 0x9881 /* * Lite-On PNIC PCI vendor ID */ -#define DC_VENDORID_LO 0x11AD +#define DC_VENDORID_LO 0x11AD /* * 82c168/82c169 PNIC device IDs. Both chips have the same device * ID but different revisions. Revision 0x10 is the 82c168, and * 0x20 is the 82c169. */ -#define DC_DEVICEID_82C168 0x0002 +#define DC_DEVICEID_82C168 0x0002 -#define DC_REVISION_82C168 0x10 -#define DC_REVISION_82C169 0x20 +#define DC_REVISION_82C168 0x10 +#define DC_REVISION_82C169 0x20 /* * Lite-On PNIC II device ID. Note: this is actually a Macronix 98715A * with wake on lan/magic packet support. */ -#define DC_DEVICEID_82C115 0xc115 +#define DC_DEVICEID_82C115 0xc115 /* * Davicom vendor ID. */ -#define DC_VENDORID_DAVICOM 0x1282 +#define DC_VENDORID_DAVICOM 0x1282 /* * Davicom device IDs. */ -#define DC_DEVICEID_DM9009 0x9009 -#define DC_DEVICEID_DM9100 0x9100 -#define DC_DEVICEID_DM9102 0x9102 +#define DC_DEVICEID_DM9009 0x9009 +#define DC_DEVICEID_DM9100 0x9100 +#define DC_DEVICEID_DM9102 0x9102 /* * The DM9102A has the same PCI device ID as the DM9102, * but a higher revision code. */ -#define DC_REVISION_DM9102 0x10 -#define DC_REVISION_DM9102A 0x30 +#define DC_REVISION_DM9102 0x10 +#define DC_REVISION_DM9102A 0x30 /* * ADMtek vendor ID. */ -#define DC_VENDORID_ADMTEK 0x1317 +#define DC_VENDORID_ADMTEK 0x1317 /* * ADMtek device IDs. */ -#define DC_DEVICEID_AL981 0x0981 -#define DC_DEVICEID_AN983 0x0985 -#define DC_DEVICEID_AN985 0x1985 -#define DC_DEVICEID_ADM9511 0x9511 -#define DC_DEVICEID_ADM9513 0x9513 +#define DC_DEVICEID_AL981 0x0981 +#define DC_DEVICEID_AN983 0x0985 +#define DC_DEVICEID_AN985 0x1985 +#define DC_DEVICEID_ADM9511 0x9511 +#define DC_DEVICEID_ADM9513 0x9513 /* * 3COM PCI vendor ID */ -#define DC_VENDORID_3COM 0x10b7 +#define DC_VENDORID_3COM 0x10b7 /* * 3COM OfficeConnect 10/100B (3CSOHO100B-TX) */ -#define DC_DEVICEID_3CSOHOB 0x9300 +#define DC_DEVICEID_3CSOHOB 0x9300 /* * ASIX vendor ID. */ -#define DC_VENDORID_ASIX 0x125B +#define DC_VENDORID_ASIX 0x125B /* * ASIX device IDs. */ -#define DC_DEVICEID_AX88140A 0x1400 +#define DC_DEVICEID_AX88140A 0x1400 /* * The ASIX AX88140 and ASIX AX88141 have the same vendor and * device IDs but different revision values. */ -#define DC_REVISION_88140 0x00 -#define DC_REVISION_88141 0x10 +#define DC_REVISION_88140 0x00 +#define DC_REVISION_88141 0x10 /* * Accton vendor ID. */ -#define DC_VENDORID_ACCTON 0x1113 +#define DC_VENDORID_ACCTON 0x1113 /* * Accton device IDs. */ -#define DC_DEVICEID_EN1217 0x1217 +#define DC_DEVICEID_EN1217 0x1217 #define DC_DEVICEID_EN2242 0x1216 /* @@ -956,69 +968,69 @@ struct dc_softc { /* * Abocom vendor ID */ -#define DC_VENDORID_ABOCOM 0x13d1 +#define DC_VENDORID_ABOCOM 0x13d1 /* * Abocom device IDs. */ -#define DC_DEVICEID_FE2500 0xAB02 -#define DC_DEVICEID_FE2500MX 0xab08 +#define DC_DEVICEID_FE2500 0xAB02 +#define DC_DEVICEID_FE2500MX 0xab08 /* * Conexant vendor ID. */ -#define DC_VENDORID_CONEXANT 0x14f1 +#define DC_VENDORID_CONEXANT 0x14f1 /* * Conexant device IDs. */ -#define DC_DEVICEID_RS7112 0x1803 +#define DC_DEVICEID_RS7112 0x1803 /* * Planex vendor ID */ -#define DC_VENDORID_PLANEX 0x14ea +#define DC_VENDORID_PLANEX 0x14ea /* * Planex device IDs. */ -#define DC_DEVICEID_FNW3602T 0xab08 +#define DC_DEVICEID_FNW3602T 0xab08 /* * Not sure who this vendor should be, so we'll go with HAWKING until * I can locate the right one. */ -#define DC_VENDORID_HAWKING 0x17b3 +#define DC_VENDORID_HAWKING 0x17b3 /* * Sure looks like an abocom device ID, but it found on my hawking PN672TX * card. Use that for now, and upgrade later. */ -#define DC_DEVICEID_HAWKING_PN672TX 0xab08 +#define DC_DEVICEID_HAWKING_PN672TX 0xab08 /* * Microsoft device ID. */ -#define DC_VENDORID_MICROSOFT 0x1414 +#define DC_VENDORID_MICROSOFT 0x1414 /* * Supported Microsoft PCI and CardBus NICs. These are really * ADMtek parts in disguise. */ -#define DC_DEVICEID_MSMN120 0x0001 -#define DC_DEVICEID_MSMN130 0x0002 +#define DC_DEVICEID_MSMN120 0x0001 +#define DC_DEVICEID_MSMN130 0x0002 /* * Linksys vendor ID. */ -#define DC_VENDORID_LINKSYS 0x1737 +#define DC_VENDORID_LINKSYS 0x1737 /* * Linksys device IDs. */ -#define DC_DEVICEID_PCMPC200_AB08 0xab08 -#define DC_DEVICEID_PCMPC200_AB09 0xab09 +#define DC_DEVICEID_PCMPC200_AB08 0xab08 +#define DC_DEVICEID_PCMPC200_AB09 0xab09 #define DC_DEVID(vendor, device) ((device) << 16 | (vendor)) @@ -1027,37 +1039,37 @@ struct dc_softc { * other PCI registers. */ -#define DC_PCI_CFBIO PCIR_BAR(0) /* Base I/O address */ -#define DC_PCI_CFBMA PCIR_BAR(1) /* Base memory address */ -#define DC_PCI_CFDD 0x40 /* Device and driver area */ -#define DC_PCI_CWUA0 0x44 /* Wake-Up LAN addr 0 */ -#define DC_PCI_CWUA1 0x48 /* Wake-Up LAN addr 1 */ -#define DC_PCI_SOP0 0x4C /* SecureON passwd 0 */ -#define DC_PCI_SOP1 0x50 /* SecureON passwd 1 */ -#define DC_PCI_CWUC 0x54 /* Configuration Wake-Up cmd */ +#define DC_PCI_CFBIO PCIR_BAR(0) /* Base I/O address */ +#define DC_PCI_CFBMA PCIR_BAR(1) /* Base memory address */ +#define DC_PCI_CFDD 0x40 /* Device and driver area */ +#define DC_PCI_CWUA0 0x44 /* Wake-Up LAN addr 0 */ +#define DC_PCI_CWUA1 0x48 /* Wake-Up LAN addr 1 */ +#define DC_PCI_SOP0 0x4C /* SecureON passwd 0 */ +#define DC_PCI_SOP1 0x50 /* SecureON passwd 1 */ +#define DC_PCI_CWUC 0x54 /* Configuration Wake-Up cmd */ -#define DC_21143_PB_REV 0x00000030 -#define DC_21143_TB_REV 0x00000030 -#define DC_21143_PC_REV 0x00000030 -#define DC_21143_TC_REV 0x00000030 -#define DC_21143_PD_REV 0x00000041 -#define DC_21143_TD_REV 0x00000041 +#define DC_21143_PB_REV 0x00000030 +#define DC_21143_TB_REV 0x00000030 +#define DC_21143_PC_REV 0x00000030 +#define DC_21143_TC_REV 0x00000030 +#define DC_21143_PD_REV 0x00000041 +#define DC_21143_TD_REV 0x00000041 /* Configuration and driver area */ -#define DC_CFDD_DRVUSE 0x0000FFFF -#define DC_CFDD_SNOOZE_MODE 0x40000000 -#define DC_CFDD_SLEEP_MODE 0x80000000 +#define DC_CFDD_DRVUSE 0x0000FFFF +#define DC_CFDD_SNOOZE_MODE 0x40000000 +#define DC_CFDD_SLEEP_MODE 0x80000000 /* Configuration wake-up command register */ -#define DC_CWUC_MUST_BE_ZERO 0x00000001 -#define DC_CWUC_SECUREON_ENB 0x00000002 -#define DC_CWUC_FORCE_WUL 0x00000004 -#define DC_CWUC_BNC_ABILITY 0x00000008 -#define DC_CWUC_AUI_ABILITY 0x00000010 -#define DC_CWUC_TP10_ABILITY 0x00000020 -#define DC_CWUC_MII_ABILITY 0x00000040 -#define DC_CWUC_SYM_ABILITY 0x00000080 -#define DC_CWUC_LOCK 0x00000100 +#define DC_CWUC_MUST_BE_ZERO 0x00000001 +#define DC_CWUC_SECUREON_ENB 0x00000002 +#define DC_CWUC_FORCE_WUL 0x00000004 +#define DC_CWUC_BNC_ABILITY 0x00000008 +#define DC_CWUC_AUI_ABILITY 0x00000010 +#define DC_CWUC_TP10_ABILITY 0x00000020 +#define DC_CWUC_MII_ABILITY 0x00000040 +#define DC_CWUC_SYM_ABILITY 0x00000080 +#define DC_CWUC_LOCK 0x00000100 /* * SROM nonsense. @@ -1065,76 +1077,76 @@ struct dc_softc { #define DC_ROM_SIZE(bits) (2 << (bits)) -#define DC_IB_CTLRCNT 0x13 -#define DC_IB_LEAF0_CNUM 0x1A -#define DC_IB_LEAF0_OFFSET 0x1B +#define DC_IB_CTLRCNT 0x13 +#define DC_IB_LEAF0_CNUM 0x1A +#define DC_IB_LEAF0_OFFSET 0x1B struct dc_info_leaf { - u_int16_t dc_conntype; - u_int8_t dc_blkcnt; - u_int8_t dc_rsvd; - u_int16_t dc_infoblk; + uint16_t dc_conntype; + uint8_t dc_blkcnt; + uint8_t dc_rsvd; + uint16_t dc_infoblk; }; -#define DC_CTYPE_10BT 0x0000 -#define DC_CTYPE_10BT_NWAY 0x0100 -#define DC_CTYPE_10BT_FDX 0x0204 -#define DC_CTYPE_10B2 0x0001 -#define DC_CTYPE_10B5 0x0002 -#define DC_CTYPE_100BT 0x0003 -#define DC_CTYPE_100BT_FDX 0x0205 -#define DC_CTYPE_100T4 0x0006 -#define DC_CTYPE_100FX 0x0007 -#define DC_CTYPE_100FX_FDX 0x0208 -#define DC_CTYPE_MII_10BT 0x0009 -#define DC_CTYPE_MII_10BT_FDX 0x020A -#define DC_CTYPE_MII_100BT 0x000D -#define DC_CTYPE_MII_100BT_FDX 0x020E -#define DC_CTYPE_MII_100T4 0x000F -#define DC_CTYPE_MII_100FX 0x0010 -#define DC_CTYPE_MII_100FX_FDX 0x0211 -#define DC_CTYPE_DYN_PUP_AUTOSENSE 0x0800 -#define DC_CTYPE_PUP_AUTOSENSE 0x8800 -#define DC_CTYPE_NOMEDIA 0xFFFF +#define DC_CTYPE_10BT 0x0000 +#define DC_CTYPE_10BT_NWAY 0x0100 +#define DC_CTYPE_10BT_FDX 0x0204 +#define DC_CTYPE_10B2 0x0001 +#define DC_CTYPE_10B5 0x0002 +#define DC_CTYPE_100BT 0x0003 +#define DC_CTYPE_100BT_FDX 0x0205 +#define DC_CTYPE_100T4 0x0006 +#define DC_CTYPE_100FX 0x0007 +#define DC_CTYPE_100FX_FDX 0x0208 +#define DC_CTYPE_MII_10BT 0x0009 +#define DC_CTYPE_MII_10BT_FDX 0x020A +#define DC_CTYPE_MII_100BT 0x000D +#define DC_CTYPE_MII_100BT_FDX 0x020E +#define DC_CTYPE_MII_100T4 0x000F +#define DC_CTYPE_MII_100FX 0x0010 +#define DC_CTYPE_MII_100FX_FDX 0x0211 +#define DC_CTYPE_DYN_PUP_AUTOSENSE 0x0800 +#define DC_CTYPE_PUP_AUTOSENSE 0x8800 +#define DC_CTYPE_NOMEDIA 0xFFFF -#define DC_EBLOCK_SIA 0x0002 -#define DC_EBLOCK_MII 0x0003 -#define DC_EBLOCK_SYM 0x0004 -#define DC_EBLOCK_RESET 0x0005 -#define DC_EBLOCK_PHY_SHUTDOWN 0x0006 +#define DC_EBLOCK_SIA 0x0002 +#define DC_EBLOCK_MII 0x0003 +#define DC_EBLOCK_SYM 0x0004 +#define DC_EBLOCK_RESET 0x0005 +#define DC_EBLOCK_PHY_SHUTDOWN 0x0006 struct dc_leaf_hdr { - u_int16_t dc_mtype; - u_int8_t dc_mcnt; - u_int8_t dc_rsvd; + uint16_t dc_mtype; + uint8_t dc_mcnt; + uint8_t dc_rsvd; }; struct dc_eblock_hdr { - u_int8_t dc_len; - u_int8_t dc_type; + uint8_t dc_len; + uint8_t dc_type; }; struct dc_eblock_sia { struct dc_eblock_hdr dc_sia_hdr; - u_int8_t dc_sia_code; + uint8_t dc_sia_code; union { struct dc_sia_ext { /* if (dc_sia_code & DC_SIA_CODE_EXT) */ - u_int8_t dc_sia_mediaspec[6]; /* CSR13, CSR14, CSR15 */ - u_int8_t dc_sia_gpio_ctl[2]; - u_int8_t dc_sia_gpio_dat[2]; + uint8_t dc_sia_mediaspec[6]; /* CSR13, CSR14, CSR15 */ + uint8_t dc_sia_gpio_ctl[2]; + uint8_t dc_sia_gpio_dat[2]; } dc_sia_ext; struct dc_sia_noext { - u_int8_t dc_sia_gpio_ctl[2]; - u_int8_t dc_sia_gpio_dat[2]; + uint8_t dc_sia_gpio_ctl[2]; + uint8_t dc_sia_gpio_dat[2]; } dc_sia_noext; } dc_un; }; -#define DC_SIA_CODE_10BT 0x00 -#define DC_SIA_CODE_10B2 0x01 -#define DC_SIA_CODE_10B5 0x02 -#define DC_SIA_CODE_10BT_FDX 0x04 -#define DC_SIA_CODE_EXT 0x40 +#define DC_SIA_CODE_10BT 0x00 +#define DC_SIA_CODE_10B2 0x01 +#define DC_SIA_CODE_10B5 0x02 +#define DC_SIA_CODE_10BT_FDX 0x04 +#define DC_SIA_CODE_EXT 0x40 /* * Note that the first word in the gpr and reset @@ -1142,11 +1154,11 @@ struct dc_eblock_sia { */ struct dc_eblock_mii { struct dc_eblock_hdr dc_mii_hdr; - u_int8_t dc_mii_phynum; - u_int8_t dc_gpr_len; -/* u_int16_t dc_gpr_dat[n]; */ -/* u_int8_t dc_reset_len; */ -/* u_int16_t dc_reset_dat[n]; */ + uint8_t dc_mii_phynum; + uint8_t dc_gpr_len; +/* uint16_t dc_gpr_dat[n]; */ +/* uint8_t dc_reset_len; */ +/* uint16_t dc_reset_dat[n]; */ /* There are other fields after these, but we don't * care about them since they can be determined by looking * at the PHY. @@ -1155,20 +1167,20 @@ struct dc_eblock_mii { struct dc_eblock_sym { struct dc_eblock_hdr dc_sym_hdr; - u_int8_t dc_sym_code; - u_int8_t dc_sym_gpio_ctl[2]; - u_int8_t dc_sym_gpio_dat[2]; - u_int8_t dc_sym_cmd[2]; + uint8_t dc_sym_code; + uint8_t dc_sym_gpio_ctl[2]; + uint8_t dc_sym_gpio_dat[2]; + uint8_t dc_sym_cmd[2]; }; -#define DC_SYM_CODE_100BT 0x03 -#define DC_SYM_CODE_100BT_FDX 0x05 -#define DC_SYM_CODE_100T4 0x06 -#define DC_SYM_CODE_100FX 0x07 -#define DC_SYM_CODE_100FX_FDX 0x08 +#define DC_SYM_CODE_100BT 0x03 +#define DC_SYM_CODE_100BT_FDX 0x05 +#define DC_SYM_CODE_100T4 0x06 +#define DC_SYM_CODE_100FX 0x07 +#define DC_SYM_CODE_100FX_FDX 0x08 struct dc_eblock_reset { struct dc_eblock_hdr dc_reset_hdr; - u_int8_t dc_reset_len; -/* u_int16_t dc_reset_dat[n]; */ + uint8_t dc_reset_len; +/* uint16_t dc_reset_dat[n]; */ }; diff --git a/sys/dev/ppc/ppc_pci.c b/sys/dev/ppc/ppc_pci.c index ed59413ee9c3..0641dcdc77af 100644 --- a/sys/dev/ppc/ppc_pci.c +++ b/sys/dev/ppc/ppc_pci.c @@ -89,6 +89,7 @@ static struct pci_id pci_ids[] = { { 0x84031415, "Oxford Semiconductor OX12PCI840 Parallel port", 0x10 }, { 0x95131415, "Oxford Semiconductor OX16PCI954 Parallel port", 0x10 }, { 0x98059710, "NetMos NM9805 1284 Printer port", 0x10 }, + { 0x98659710, "MosChip MCS9865 1284 Printer port", 0x10 }, { 0x99019710, "MosChip MCS9901 PCIe to Peripheral Controller", 0x10 }, { 0xffff } }; diff --git a/sys/dev/usb/net/if_udav.c b/sys/dev/usb/net/if_udav.c index 94b62d8a75a3..0ab237f1e759 100644 --- a/sys/dev/usb/net/if_udav.c +++ b/sys/dev/usb/net/if_udav.c @@ -206,6 +206,10 @@ static const struct usb_device_id udav_devs[] = { {USB_VPI(USB_VENDOR_SHANTOU, USB_PRODUCT_SHANTOU_ST268, 0)}, /* Corega USB-TXC */ {USB_VPI(USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB_TXC, 0)}, + /* ShanTou AMD8515 USB NIC */ + {USB_VPI(USB_VENDOR_SHANTOU, USB_PRODUCT_SHANTOU_ADM8515, 0)}, + /* Kontron AG USB Ethernet */ + {USB_VPI(USB_VENDOR_KONTRON, USB_PRODUCT_KONTRON_DM9601, 0)}, }; static void diff --git a/sys/dev/usb/usbdevs b/sys/dev/usb/usbdevs index 1b3c3ccc038f..b7e65d7bd84f 100644 --- a/sys/dev/usb/usbdevs +++ b/sys/dev/usb/usbdevs @@ -551,6 +551,7 @@ vendor VTECH 0x0f88 VTech vendor FALCOM 0x0f94 Falcom Wireless Communications GmbH vendor RIM 0x0fca Research In Motion vendor DYNASTREAM 0x0fcf Dynastream Innovations +vendor KONTRON 0x0fe6 Kontron AG vendor QUALCOMM 0x1004 Qualcomm vendor APACER 0x1005 Apacer vendor MOTOROLA4 0x100d Motorola @@ -2008,6 +2009,9 @@ product KODAK DC290 0x0112 Digital Science DC290 product KODAK DC240 0x0120 Digital Science DC240 product KODAK DC280 0x0130 Digital Science DC280 +/* Kontron AG products */ +product KONTRON DM9601 0x8101 USB Ethernet + /* Konica Corp. Products */ product KONICA CAMERA 0x0720 Digital Color Camera @@ -2843,6 +2847,7 @@ product SENAO RT3072_5 0x9801 RT3072 /* ShanTou products */ product SHANTOU ST268 0x0268 ST268 product SHANTOU DM9601 0x9601 DM 9601 +product SHANTOU ADM8515 0x8515 ADM8515 /* Shark products */ product SHARK PA 0x0400 Pocket Adapter diff --git a/sys/fs/tmpfs/tmpfs_vnops.c b/sys/fs/tmpfs/tmpfs_vnops.c index a57c1f286ce7..3f180ba0724a 100644 --- a/sys/fs/tmpfs/tmpfs_vnops.c +++ b/sys/fs/tmpfs/tmpfs_vnops.c @@ -853,8 +853,7 @@ tmpfs_remove(struct vop_remove_args *v) tmpfs_free_dirent(tmp, de, TRUE); if (node->tn_links > 0) - node->tn_status |= TMPFS_NODE_ACCESSED | TMPFS_NODE_CHANGED | \ - TMPFS_NODE_MODIFIED; + node->tn_status |= TMPFS_NODE_ACCESSED | TMPFS_NODE_CHANGED; error = 0; out: diff --git a/sys/gdb/gdb_main.c b/sys/gdb/gdb_main.c index 233330e5b9e0..8f3c271e000c 100644 --- a/sys/gdb/gdb_main.c +++ b/sys/gdb/gdb_main.c @@ -95,7 +95,17 @@ gdb_init(void) static int gdb_trap(int type, int code) { + jmp_buf jb; struct thread *thr_iter; + void *prev_jb; + + prev_jb = kdb_jmpbuf(jb); + if (setjmp(jb) != 0) { + printf("%s bailing, hopefully back to ddb!\n", __func__); + gdb_listening = 0; + (void)kdb_jmpbuf(prev_jb); + return (1); + } gdb_listening = 0; /* @@ -291,5 +301,6 @@ gdb_trap(int type, int code) break; } } + (void)kdb_jmpbuf(prev_jb); return (0); } diff --git a/sys/gdb/gdb_packet.c b/sys/gdb/gdb_packet.c index d3e5a0ab5aec..a62cc8d16b36 100644 --- a/sys/gdb/gdb_packet.c +++ b/sys/gdb/gdb_packet.c @@ -31,6 +31,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include @@ -60,6 +61,17 @@ gdb_getc(void) do c = gdb_cur->gdb_getc(); while (c == -1); + + if (c == CTRL('C')) { + printf("Received ^C; trying to switch back to ddb.\n"); + + if (kdb_dbbe_select("ddb") != 0) + printf("The ddb backend could not be selected.\n"); + else { + printf("using longjmp, hope it works!\n"); + kdb_reenter(); + } + } return (c); } diff --git a/sys/geom/part/g_part_pc98.c b/sys/geom/part/g_part_pc98.c index b80e55b62593..e7b334195082 100644 --- a/sys/geom/part/g_part_pc98.c +++ b/sys/geom/part/g_part_pc98.c @@ -140,6 +140,20 @@ pc98_parse_type(const char *type, u_char *dp_mid, u_char *dp_sid) return (EINVAL); } +static int +pc98_set_slicename(const char *label, u_char *dp_name) +{ + int len; + + len = strlen(label); + if (len > sizeof(((struct pc98_partition *)NULL)->dp_name)) + return (EINVAL); + bzero(dp_name, sizeof(((struct pc98_partition *)NULL)->dp_name)); + strncpy(dp_name, label, len); + + return (0); +} + static void pc98_set_chs(struct g_part_table *table, uint32_t lba, u_short *cylp, u_char *hdp, u_char *secp) @@ -164,9 +178,7 @@ g_part_pc98_add(struct g_part_table *basetable, struct g_part_entry *baseentry, struct g_part_pc98_entry *entry; struct g_part_pc98_table *table; uint32_t cyl, start, size; - - if (gpp->gpp_parms & G_PART_PARM_LABEL) - return (EINVAL); + int error; cyl = basetable->gpt_heads * basetable->gpt_sectors; @@ -199,8 +211,16 @@ g_part_pc98_add(struct g_part_table *basetable, struct g_part_entry *baseentry, &entry->ent.dp_shd, &entry->ent.dp_ssect); pc98_set_chs(basetable, baseentry->gpe_end, &entry->ent.dp_ecyl, &entry->ent.dp_ehd, &entry->ent.dp_esect); - return (pc98_parse_type(gpp->gpp_type, &entry->ent.dp_mid, - &entry->ent.dp_sid)); + + error = pc98_parse_type(gpp->gpp_type, &entry->ent.dp_mid, + &entry->ent.dp_sid); + if (error) + return (error); + + if (gpp->gpp_parms & G_PART_PARM_LABEL) + return (pc98_set_slicename(gpp->gpp_label, entry->ent.dp_name)); + + return (0); } static int @@ -231,7 +251,7 @@ g_part_pc98_create(struct g_part_table *basetable, struct g_part_parms *gpp) pp = gpp->gpp_provider; cp = LIST_FIRST(&pp->consumers); - if (pp->sectorsize < SECSIZE || pp->mediasize < 2 * SECSIZE) + if (pp->sectorsize < SECSIZE || pp->mediasize < BOOTSIZE) return (ENOSPC); if (pp->sectorsize > SECSIZE) return (ENXIO); @@ -305,14 +325,20 @@ g_part_pc98_modify(struct g_part_table *basetable, struct g_part_entry *baseentry, struct g_part_parms *gpp) { struct g_part_pc98_entry *entry; - - if (gpp->gpp_parms & G_PART_PARM_LABEL) - return (EINVAL); + int error; entry = (struct g_part_pc98_entry *)baseentry; - if (gpp->gpp_parms & G_PART_PARM_TYPE) - return (pc98_parse_type(gpp->gpp_type, &entry->ent.dp_mid, - &entry->ent.dp_sid)); + + if (gpp->gpp_parms & G_PART_PARM_TYPE) { + error = pc98_parse_type(gpp->gpp_type, &entry->ent.dp_mid, + &entry->ent.dp_sid); + if (error) + return (error); + } + + if (gpp->gpp_parms & G_PART_PARM_LABEL) + return (pc98_set_slicename(gpp->gpp_label, entry->ent.dp_name)); + return (0); } diff --git a/sys/kern/subr_kdb.c b/sys/kern/subr_kdb.c index 692ecb4d4377..342c5ca1879d 100644 --- a/sys/kern/subr_kdb.c +++ b/sys/kern/subr_kdb.c @@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -108,33 +109,17 @@ const char * volatile kdb_why = KDB_WHY_UNSET; static int kdb_sysctl_available(SYSCTL_HANDLER_ARGS) { - struct kdb_dbbe *be, **iter; - char *avail, *p; - ssize_t len, sz; + struct kdb_dbbe **iter; + struct sbuf sbuf; int error; - sz = 0; + sbuf_new_for_sysctl(&sbuf, NULL, 64, req); SET_FOREACH(iter, kdb_dbbe_set) { - be = *iter; - if (be->dbbe_active == 0) - sz += strlen(be->dbbe_name) + 1; + if ((*iter)->dbbe_active == 0) + sbuf_printf(&sbuf, "%s ", (*iter)->dbbe_name); } - sz++; - avail = malloc(sz, M_TEMP, M_WAITOK); - p = avail; - *p = '\0'; - - SET_FOREACH(iter, kdb_dbbe_set) { - be = *iter; - if (be->dbbe_active == 0) { - len = snprintf(p, sz, "%s ", be->dbbe_name); - p += len; - sz -= len; - } - } - KASSERT(sz >= 0, ("%s", __func__)); - error = sysctl_handle_string(oidp, avail, 0, req); - free(avail, M_TEMP); + error = sbuf_finish(&sbuf); + sbuf_delete(&sbuf); return (error); } @@ -144,10 +129,9 @@ kdb_sysctl_current(SYSCTL_HANDLER_ARGS) char buf[16]; int error; - if (kdb_dbbe != NULL) { - strncpy(buf, kdb_dbbe->dbbe_name, sizeof(buf)); - buf[sizeof(buf) - 1] = '\0'; - } else + if (kdb_dbbe != NULL) + strlcpy(buf, kdb_dbbe->dbbe_name, sizeof(buf)); + else *buf = '\0'; error = sysctl_handle_string(oidp, buf, sizeof(buf), req); if (error != 0 || req->newptr == NULL) @@ -513,13 +497,15 @@ kdb_thr_select(struct thread *thr) int kdb_trap(int type, int code, struct trapframe *tf) { + struct kdb_dbbe *be; register_t intr; #ifdef SMP int did_stop_cpus; #endif int handled; - if (kdb_dbbe == NULL || kdb_dbbe->dbbe_trap == NULL) + be = kdb_dbbe; + if (be == NULL || be->dbbe_trap == NULL) return (0); /* We reenter the debugger through kdb_reenter(). */ @@ -543,7 +529,15 @@ kdb_trap(int type, int code, struct trapframe *tf) makectx(tf, &kdb_pcb); kdb_thr_select(curthread); - handled = kdb_dbbe->dbbe_trap(type, code); + for (;;) { + handled = be->dbbe_trap(type, code); + if (be == kdb_dbbe) + break; + be = kdb_dbbe; + if (be == NULL || be->dbbe_trap == NULL) + break; + printf("Switching to %s back-end\n", be->dbbe_name); + } kdb_active--; diff --git a/sys/kern/vfs_mount.c b/sys/kern/vfs_mount.c index cc8321a5bae1..afb4109ac738 100644 --- a/sys/kern/vfs_mount.c +++ b/sys/kern/vfs_mount.c @@ -70,7 +70,7 @@ __FBSDID("$FreeBSD$"); #define VFS_MOUNTARG_SIZE_MAX (1024 * 64) static int vfs_domount(struct thread *td, const char *fstype, - char *fspath, int fsflags, void *fsdata); + char *fspath, int fsflags, struct vfsoptlist **optlist); static void free_mntarg(struct mntarg *ma); static int usermount = 0; @@ -667,7 +667,7 @@ vfs_donmount(struct thread *td, int fsflags, struct uio *fsoptions) goto bail; } - error = vfs_domount(td, fstype, fspath, fsflags, optlist); + error = vfs_domount(td, fstype, fspath, fsflags, &optlist); bail: /* copyout the errmsg */ if (errmsg_pos != -1 && ((2 * errmsg_pos + 1) < fsoptions->uio_iovcnt) @@ -683,7 +683,7 @@ bail: } } - if (error != 0) + if (optlist != NULL) vfs_freeopts(optlist); return (error); } @@ -762,12 +762,12 @@ mount(td, uap) */ static int vfs_domount_first( - struct thread *td, /* Calling thread. */ - struct vfsconf *vfsp, /* File system type. */ - char *fspath, /* Mount path. */ - struct vnode *vp, /* Vnode to be covered. */ - int fsflags, /* Flags common to all filesystems. */ - void *fsdata /* Options local to the filesystem. */ + struct thread *td, /* Calling thread. */ + struct vfsconf *vfsp, /* File system type. */ + char *fspath, /* Mount path. */ + struct vnode *vp, /* Vnode to be covered. */ + int fsflags, /* Flags common to all filesystems. */ + struct vfsoptlist **optlist /* Options local to the filesystem. */ ) { struct vattr va; @@ -807,7 +807,7 @@ vfs_domount_first( /* Allocate and initialize the filesystem. */ mp = vfs_mount_alloc(vp, vfsp, fspath, td->td_ucred); /* XXXMAC: pass to vfs_mount_alloc? */ - mp->mnt_optnew = fsdata; + mp->mnt_optnew = *optlist; /* Set the mount level flags. */ mp->mnt_flag = (fsflags & (MNT_UPDATEMASK | MNT_ROOTFS | MNT_RDONLY)); @@ -830,6 +830,7 @@ vfs_domount_first( if (mp->mnt_opt != NULL) vfs_freeopts(mp->mnt_opt); mp->mnt_opt = mp->mnt_optnew; + *optlist = NULL; (void)VFS_STATFS(mp, &mp->mnt_stat); /* @@ -872,16 +873,16 @@ vfs_domount_first( */ static int vfs_domount_update( - struct thread *td, /* Calling thread. */ - struct vnode *vp, /* Mount point vnode. */ - int fsflags, /* Flags common to all filesystems. */ - void *fsdata /* Options local to the filesystem. */ + struct thread *td, /* Calling thread. */ + struct vnode *vp, /* Mount point vnode. */ + int fsflags, /* Flags common to all filesystems. */ + struct vfsoptlist **optlist /* Options local to the filesystem. */ ) { struct oexport_args oexport; struct export_args export; struct mount *mp; - int error, flag; + int error, export_error, flag; mtx_assert(&Giant, MA_OWNED); ASSERT_VOP_ELOCKED(vp, __func__); @@ -932,7 +933,7 @@ vfs_domount_update( if ((mp->mnt_flag & MNT_ASYNC) == 0) mp->mnt_kern_flag &= ~MNTK_ASYNC; MNT_IUNLOCK(mp); - mp->mnt_optnew = fsdata; + mp->mnt_optnew = *optlist; vfs_mergeopts(mp->mnt_optnew, mp->mnt_opt); /* @@ -942,11 +943,12 @@ vfs_domount_update( */ error = VFS_MOUNT(mp); + export_error = 0; if (error == 0) { /* Process the export option. */ if (vfs_copyopt(mp->mnt_optnew, "export", &export, sizeof(export)) == 0) { - error = vfs_export(mp, &export); + export_error = vfs_export(mp, &export); } else if (vfs_copyopt(mp->mnt_optnew, "export", &oexport, sizeof(oexport)) == 0) { export.ex_flags = oexport.ex_flags; @@ -958,7 +960,7 @@ vfs_domount_update( export.ex_masklen = oexport.ex_masklen; export.ex_indexfile = oexport.ex_indexfile; export.ex_numsecflavors = 0; - error = vfs_export(mp, &export); + export_error = vfs_export(mp, &export); } } @@ -988,6 +990,7 @@ vfs_domount_update( if (mp->mnt_opt != NULL) vfs_freeopts(mp->mnt_opt); mp->mnt_opt = mp->mnt_optnew; + *optlist = NULL; (void)VFS_STATFS(mp, &mp->mnt_stat); /* * Prevent external consumers of mount options from reading @@ -1005,7 +1008,7 @@ end: vp->v_iflag &= ~VI_MOUNT; VI_UNLOCK(vp); vrele(vp); - return (error); + return (error != 0 ? error : export_error); } /* @@ -1013,11 +1016,11 @@ end: */ static int vfs_domount( - struct thread *td, /* Calling thread. */ - const char *fstype, /* Filesystem type. */ - char *fspath, /* Mount path. */ - int fsflags, /* Flags common to all filesystems. */ - void *fsdata /* Options local to the filesystem. */ + struct thread *td, /* Calling thread. */ + const char *fstype, /* Filesystem type. */ + char *fspath, /* Mount path. */ + int fsflags, /* Flags common to all filesystems. */ + struct vfsoptlist **optlist /* Options local to the filesystem. */ ) { struct vfsconf *vfsp; @@ -1087,9 +1090,9 @@ vfs_domount( vp = nd.ni_vp; if ((fsflags & MNT_UPDATE) == 0) { error = vfs_domount_first(td, vfsp, fspath, vp, fsflags, - fsdata); + optlist); } else { - error = vfs_domount_update(td, vp, fsflags, fsdata); + error = vfs_domount_update(td, vp, fsflags, optlist); } mtx_unlock(&Giant); diff --git a/sys/netinet/sctp_sysctl.c b/sys/netinet/sctp_sysctl.c index 0150f837dcc9..1863df9e9dcd 100644 --- a/sys/netinet/sctp_sysctl.c +++ b/sys/netinet/sctp_sysctl.c @@ -566,7 +566,11 @@ sysctl_sctp_check(SYSCTL_HANDLER_ARGS) { int error; +#ifdef VIMAGE + error = vnet_sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req); +#else error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req); +#endif if (error == 0) { RANGECHK(SCTP_BASE_SYSCTL(sctp_sendspace), SCTPCTL_MAXDGRAM_MIN, SCTPCTL_MAXDGRAM_MAX); RANGECHK(SCTP_BASE_SYSCTL(sctp_recvspace), SCTPCTL_RECVSPACE_MIN, SCTPCTL_RECVSPACE_MAX); @@ -828,301 +832,298 @@ sysctl_sctp_cleartrace(SYSCTL_HANDLER_ARGS) * sysctl definitions */ -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, sendspace, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, sendspace, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_sendspace), 0, sysctl_sctp_check, "IU", SCTPCTL_MAXDGRAM_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, recvspace, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, recvspace, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_recvspace), 0, sysctl_sctp_check, "IU", SCTPCTL_RECVSPACE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, auto_asconf, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, auto_asconf, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_auto_asconf), 0, sysctl_sctp_check, "IU", SCTPCTL_AUTOASCONF_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, ecn_enable, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, ecn_enable, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_ecn_enable), 0, sysctl_sctp_check, "IU", SCTPCTL_ECN_ENABLE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, strict_sacks, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, strict_sacks, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_strict_sacks), 0, sysctl_sctp_check, "IU", SCTPCTL_STRICT_SACKS_DESC); #if !defined(SCTP_WITH_NO_CSUM) -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, loopback_nocsum, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, loopback_nocsum, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_no_csum_on_loopback), 0, sysctl_sctp_check, "IU", SCTPCTL_LOOPBACK_NOCSUM_DESC); #endif -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, strict_init, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, strict_init, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_strict_init), 0, sysctl_sctp_check, "IU", SCTPCTL_STRICT_INIT_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, peer_chkoh, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, peer_chkoh, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_peer_chunk_oh), 0, sysctl_sctp_check, "IU", SCTPCTL_PEER_CHKOH_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, maxburst, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, maxburst, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_max_burst_default), 0, sysctl_sctp_check, "IU", SCTPCTL_MAXBURST_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, fr_maxburst, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, fr_maxburst, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_fr_max_burst_default), 0, sysctl_sctp_check, "IU", SCTPCTL_FRMAXBURST_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, maxchunks, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, maxchunks, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_max_chunks_on_queue), 0, sysctl_sctp_check, "IU", SCTPCTL_MAXCHUNKS_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, tcbhashsize, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, tcbhashsize, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_hashtblsize), 0, sysctl_sctp_check, "IU", SCTPCTL_TCBHASHSIZE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, pcbhashsize, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, pcbhashsize, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_pcbtblsize), 0, sysctl_sctp_check, "IU", SCTPCTL_PCBHASHSIZE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, min_split_point, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, min_split_point, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_min_split_point), 0, sysctl_sctp_check, "IU", SCTPCTL_MIN_SPLIT_POINT_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, chunkscale, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, chunkscale, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_chunkscale), 0, sysctl_sctp_check, "IU", SCTPCTL_CHUNKSCALE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, delayed_sack_time, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, delayed_sack_time, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_delayed_sack_time_default), 0, sysctl_sctp_check, "IU", SCTPCTL_DELAYED_SACK_TIME_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, sack_freq, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, sack_freq, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_sack_freq_default), 0, sysctl_sctp_check, "IU", SCTPCTL_SACK_FREQ_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, sys_resource, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, sys_resource, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_system_free_resc_limit), 0, sysctl_sctp_check, "IU", SCTPCTL_SYS_RESOURCE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, asoc_resource, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, asoc_resource, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_asoc_free_resc_limit), 0, sysctl_sctp_check, "IU", SCTPCTL_ASOC_RESOURCE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, heartbeat_interval, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, heartbeat_interval, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_heartbeat_interval_default), 0, sysctl_sctp_check, "IU", SCTPCTL_HEARTBEAT_INTERVAL_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, pmtu_raise_time, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, pmtu_raise_time, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_pmtu_raise_time_default), 0, sysctl_sctp_check, "IU", SCTPCTL_PMTU_RAISE_TIME_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, shutdown_guard_time, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, shutdown_guard_time, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_shutdown_guard_time_default), 0, sysctl_sctp_check, "IU", SCTPCTL_SHUTDOWN_GUARD_TIME_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, secret_lifetime, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, secret_lifetime, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_secret_lifetime_default), 0, sysctl_sctp_check, "IU", SCTPCTL_SECRET_LIFETIME_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, rto_max, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, rto_max, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_rto_max_default), 0, sysctl_sctp_check, "IU", SCTPCTL_RTO_MAX_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, rto_min, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, rto_min, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_rto_min_default), 0, sysctl_sctp_check, "IU", SCTPCTL_RTO_MIN_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, rto_initial, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, rto_initial, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_rto_initial_default), 0, sysctl_sctp_check, "IU", SCTPCTL_RTO_INITIAL_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, init_rto_max, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, init_rto_max, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_init_rto_max_default), 0, sysctl_sctp_check, "IU", SCTPCTL_INIT_RTO_MAX_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, valid_cookie_life, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, valid_cookie_life, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_valid_cookie_life_default), 0, sysctl_sctp_check, "IU", SCTPCTL_VALID_COOKIE_LIFE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, init_rtx_max, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, init_rtx_max, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_init_rtx_max_default), 0, sysctl_sctp_check, "IU", SCTPCTL_INIT_RTX_MAX_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, assoc_rtx_max, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, assoc_rtx_max, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_assoc_rtx_max_default), 0, sysctl_sctp_check, "IU", SCTPCTL_ASSOC_RTX_MAX_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, path_rtx_max, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, path_rtx_max, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_path_rtx_max_default), 0, sysctl_sctp_check, "IU", SCTPCTL_PATH_RTX_MAX_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, add_more_on_output, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, add_more_on_output, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_add_more_threshold), 0, sysctl_sctp_check, "IU", SCTPCTL_ADD_MORE_ON_OUTPUT_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, outgoing_streams, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, outgoing_streams, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_nr_outgoing_streams_default), 0, sysctl_sctp_check, "IU", SCTPCTL_OUTGOING_STREAMS_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, cmt_on_off, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, cmt_on_off, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_cmt_on_off), 0, sysctl_sctp_check, "IU", SCTPCTL_CMT_ON_OFF_DESC); -/* EY */ -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, nr_sack_on_off, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, nr_sack_on_off, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_nr_sack_on_off), 0, sysctl_sctp_check, "IU", SCTPCTL_NR_SACK_ON_OFF_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, cmt_use_dac, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, cmt_use_dac, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_cmt_use_dac), 0, sysctl_sctp_check, "IU", SCTPCTL_CMT_USE_DAC_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, cmt_pf, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, cmt_pf, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_cmt_pf), 0, sysctl_sctp_check, "IU", SCTPCTL_CMT_PF_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, cwnd_maxburst, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, cwnd_maxburst, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_use_cwnd_based_maxburst), 0, sysctl_sctp_check, "IU", SCTPCTL_CWND_MAXBURST_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, early_fast_retran, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, early_fast_retran, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_early_fr), 0, sysctl_sctp_check, "IU", SCTPCTL_EARLY_FAST_RETRAN_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, early_fast_retran_msec, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, early_fast_retran_msec, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_early_fr_msec), 0, sysctl_sctp_check, "IU", SCTPCTL_EARLY_FAST_RETRAN_MSEC_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, asconf_auth_nochk, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, asconf_auth_nochk, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_asconf_auth_nochk), 0, sysctl_sctp_check, "IU", SCTPCTL_ASCONF_AUTH_NOCHK_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, auth_disable, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, auth_disable, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_auth_disable), 0, sysctl_sctp_check, "IU", SCTPCTL_AUTH_DISABLE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, nat_friendly, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, nat_friendly, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_nat_friendly), 0, sysctl_sctp_check, "IU", SCTPCTL_NAT_FRIENDLY_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, abc_l_var, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, abc_l_var, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_L2_abc_variable), 0, sysctl_sctp_check, "IU", SCTPCTL_ABC_L_VAR_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, max_chained_mbufs, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, max_chained_mbufs, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_mbuf_threshold_count), 0, sysctl_sctp_check, "IU", SCTPCTL_MAX_CHAINED_MBUFS_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, do_sctp_drain, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, do_sctp_drain, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_do_drain), 0, sysctl_sctp_check, "IU", SCTPCTL_DO_SCTP_DRAIN_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, hb_max_burst, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, hb_max_burst, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_hb_maxburst), 0, sysctl_sctp_check, "IU", SCTPCTL_HB_MAX_BURST_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, abort_at_limit, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, abort_at_limit, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_abort_if_one_2_one_hits_limit), 0, sysctl_sctp_check, "IU", SCTPCTL_ABORT_AT_LIMIT_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, strict_data_order, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, strict_data_order, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_strict_data_order), 0, sysctl_sctp_check, "IU", SCTPCTL_STRICT_DATA_ORDER_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, min_residual, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, min_residual, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_min_residual), 0, sysctl_sctp_check, "IU", SCTPCTL_MIN_RESIDUAL_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, max_retran_chunk, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, max_retran_chunk, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_max_retran_chunk), 0, sysctl_sctp_check, "IU", SCTPCTL_MAX_RETRAN_CHUNK_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, log_level, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, log_level, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_logging_level), 0, sysctl_sctp_check, "IU", SCTPCTL_LOGGING_LEVEL_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, default_cc_module, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, default_cc_module, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_default_cc_module), 0, sysctl_sctp_check, "IU", SCTPCTL_DEFAULT_CC_MODULE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, default_ss_module, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, default_ss_module, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_default_ss_module), 0, sysctl_sctp_check, "IU", SCTPCTL_DEFAULT_SS_MODULE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, default_frag_interleave, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, default_frag_interleave, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_default_frag_interleave), 0, sysctl_sctp_check, "IU", SCTPCTL_DEFAULT_FRAG_INTERLEAVE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, mobility_base, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, mobility_base, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_mobility_base), 0, sysctl_sctp_check, "IU", SCTPCTL_MOBILITY_BASE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, mobility_fasthandoff, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, mobility_fasthandoff, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_mobility_fasthandoff), 0, sysctl_sctp_check, "IU", SCTPCTL_MOBILITY_FASTHANDOFF_DESC); #if defined(SCTP_LOCAL_TRACE_BUF) -SYSCTL_STRUCT(_net_inet_sctp, OID_AUTO, log, CTLFLAG_RD, +SYSCTL_VNET_STRUCT(_net_inet_sctp, OID_AUTO, log, CTLFLAG_RD, &SCTP_BASE_SYSCTL(sctp_log), sctp_log, "SCTP logging (struct sctp_log)"); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, clear_trace, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, clear_trace, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_log), 0, sysctl_sctp_cleartrace, "IU", "Clear SCTP Logging buffer"); - - - #endif -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, udp_tunneling_for_client_enable, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, udp_tunneling_for_client_enable, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_udp_tunneling_for_client_enable), 0, sysctl_sctp_check, "IU", SCTPCTL_UDP_TUNNELING_FOR_CLIENT_ENABLE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, udp_tunneling_port, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, udp_tunneling_port, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_udp_tunneling_port), 0, sysctl_sctp_udp_tunneling_check, "IU", SCTPCTL_UDP_TUNNELING_PORT_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, enable_sack_immediately, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, enable_sack_immediately, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_enable_sack_immediately), 0, sysctl_sctp_check, "IU", SCTPCTL_SACK_IMMEDIATELY_ENABLE_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, nat_friendly_init, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, nat_friendly_init, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_inits_include_nat_friendly), 0, sysctl_sctp_check, "IU", SCTPCTL_NAT_FRIENDLY_INITS_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, vtag_time_wait, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, vtag_time_wait, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_vtag_time_wait), 0, sysctl_sctp_check, "IU", SCTPCTL_TIME_WAIT_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, buffer_splitting, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, buffer_splitting, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_buffer_splitting), 0, sysctl_sctp_check, "IU", SCTPCTL_BUFFER_SPLITTING_DESC); -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, initial_cwnd, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, initial_cwnd, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_initial_cwnd), 0, sysctl_sctp_check, "IU", SCTPCTL_INITIAL_CWND_DESC); #ifdef SCTP_DEBUG -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, debug, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, debug, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_debug_on), 0, sysctl_sctp_check, "IU", SCTPCTL_DEBUG_DESC); -#endif /* SCTP_DEBUG */ +#endif #if defined (__APPLE__) || defined(SCTP_SO_LOCK_TESTING) -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, output_unlocked, CTLTYPE_UINT | CTLFLAG_RW, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, output_unlocked, CTLTYPE_UINT | CTLFLAG_RW, &SCTP_BASE_SYSCTL(sctp_output_unlocked), 0, sysctl_sctp_check, "IU", SCTPCTL_OUTPUT_UNLOCKED_DESC); #endif + #if defined(__FreeBSD__) && defined(SMP) && defined(SCTP_USE_PERCPU_STAT) -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, stats, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, stats, CTLTYPE_STRUCT | CTLFLAG_RW, 0, 0, sysctl_stat_get, "S,sctpstat", "SCTP statistics (struct sctp_stat)"); #else -SYSCTL_STRUCT(_net_inet_sctp, OID_AUTO, stats, CTLFLAG_RW, +SYSCTL_VNET_STRUCT(_net_inet_sctp, OID_AUTO, stats, CTLFLAG_RW, &SCTP_BASE_STATS_SYSCTL, sctpstat, "SCTP statistics (struct sctp_stat)"); #endif -SYSCTL_PROC(_net_inet_sctp, OID_AUTO, assoclist, CTLTYPE_OPAQUE | CTLFLAG_RD, +SYSCTL_VNET_PROC(_net_inet_sctp, OID_AUTO, assoclist, CTLTYPE_OPAQUE | CTLFLAG_RD, 0, 0, sctp_assoclist, "S,xassoc", "List of active SCTP associations"); diff --git a/sys/pc98/pc98/machdep.c b/sys/pc98/pc98/machdep.c index 868b5fd188a2..94e5aeecfe39 100644 --- a/sys/pc98/pc98/machdep.c +++ b/sys/pc98/pc98/machdep.c @@ -2458,6 +2458,13 @@ fill_regs(struct thread *td, struct reg *regs) tp = td->td_frame; pcb = td->td_pcb; + regs->r_gs = pcb->pcb_gs; + return (fill_frame_regs(tp, regs)); +} + +int +fill_frame_regs(struct trapframe *tp, struct reg *regs) +{ regs->r_fs = tp->tf_fs; regs->r_es = tp->tf_es; regs->r_ds = tp->tf_ds; @@ -2473,7 +2480,6 @@ fill_regs(struct thread *td, struct reg *regs) regs->r_eflags = tp->tf_eflags; regs->r_esp = tp->tf_esp; regs->r_ss = tp->tf_ss; - regs->r_gs = pcb->pcb_gs; return (0); } diff --git a/sys/powerpc/aim/locore64.S b/sys/powerpc/aim/locore64.S index 234cded2c2f3..acdc8a1e7826 100644 --- a/sys/powerpc/aim/locore64.S +++ b/sys/powerpc/aim/locore64.S @@ -174,7 +174,7 @@ ASENTRY(__start) insrdi 9,8,1,0 mtmsrd 9 - bl .OF_initial_setup + bl OF_initial_setup nop lis 4,end@ha @@ -188,14 +188,14 @@ ASENTRY(__start) mr 6,20 mr 7,21 - bl .powerpc_init + bl powerpc_init nop mr %r1, %r3 li %r3, 0 std %r3, 0(%r1) - bl .mi_startup + bl mi_startup nop - b .OF_exit + b OF_exit nop /* diff --git a/sys/powerpc/aim/swtch64.S b/sys/powerpc/aim/swtch64.S index dd76e0a5b2ae..1877e8df2aab 100644 --- a/sys/powerpc/aim/swtch64.S +++ b/sys/powerpc/aim/swtch64.S @@ -121,7 +121,7 @@ ENTRY(cpu_switch) /* Save FPU context if needed */ andi. %r7, %r7, PCB_FPU beq .L1 - bl .save_fpu + bl save_fpu nop .L1: @@ -130,12 +130,12 @@ ENTRY(cpu_switch) /* Save Altivec context if needed */ andi. %r7, %r7, PCB_VEC beq .L2 - bl .save_vec + bl save_vec nop .L2: mr %r3,%r14 /* restore old thread ptr */ - bl .pmap_deactivate /* Deactivate the current pmap */ + bl pmap_deactivate /* Deactivate the current pmap */ nop addi %r1,%r1,48 @@ -161,7 +161,7 @@ blocked_loop: stdu %r1,-48(%r1) mr %r3,%r15 /* Get new thread ptr */ - bl .pmap_activate /* Activate the new address space */ + bl pmap_activate /* Activate the new address space */ nop lwz %r6, PCB_FLAGS(%r17) @@ -169,7 +169,7 @@ blocked_loop: andi. %r6, %r6, PCB_FPU beq .L3 mr %r3,%r15 /* Pass curthread to enable_fpu */ - bl .enable_fpu + bl enable_fpu nop .L3: @@ -178,7 +178,7 @@ blocked_loop: andi. %r6, %r6, PCB_VEC beq .L4 mr %r3,%r15 /* Pass curthread to enable_vec */ - bl .enable_vec + bl enable_vec nop /* thread to restore is in r3 */ @@ -276,7 +276,7 @@ ENTRY(fork_trampoline) ld %r5,CF_ARG1(%r1) stdu %r1,-48(%r1) - bl .fork_exit + bl fork_exit nop addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of trapframe to simulate FRAME_SETUP diff --git a/sys/powerpc/aim/trap_subr64.S b/sys/powerpc/aim/trap_subr64.S index db54d4b16e6c..64e4ac1d208d 100644 --- a/sys/powerpc/aim/trap_subr64.S +++ b/sys/powerpc/aim/trap_subr64.S @@ -295,14 +295,14 @@ cpu_reset: lis %r3,tocbase@ha ld %r2,tocbase@l(%r3) lis %r3,1@l - bl CNAME(.cpudep_ap_early_bootstrap) /* Set PCPU */ + bl CNAME(cpudep_ap_early_bootstrap) /* Set PCPU */ nop - bl CNAME(.pmap_cpu_bootstrap) /* Turn on virtual memory */ + bl CNAME(pmap_cpu_bootstrap) /* Turn on virtual memory */ nop - bl CNAME(.cpudep_ap_bootstrap) /* Set up PCPU and stack */ + bl CNAME(cpudep_ap_bootstrap) /* Set up PCPU and stack */ nop mr %r1,%r3 /* Use new stack */ - bl CNAME(.machdep_ap_bootstrap) /* And away! */ + bl CNAME(machdep_ap_bootstrap) /* And away! */ nop /* Should not be reached */ @@ -510,7 +510,7 @@ trapagain: lis %r3,tocbase@ha ld %r2,tocbase@l(%r3) addi %r3,%r1,48 - bl CNAME(.powerpc_interrupt) + bl CNAME(powerpc_interrupt) nop .globl CNAME(trapexit) /* backtrace code sentinel */ @@ -538,7 +538,7 @@ CNAME(trapexit): lis %r3,tocbase@ha ld %r2,tocbase@l(%r3) addi %r3,%r1,48 - bl CNAME(.ast) + bl CNAME(ast) nop .globl CNAME(asttrapexit) /* backtrace code sentinel #2 */ CNAME(asttrapexit): @@ -587,7 +587,7 @@ dbtrap: lis %r3,tocbase@ha ld %r2,tocbase@l(%r3) addi %r3,%r1,48 - bl CNAME(.db_trap_glue) + bl CNAME(db_trap_glue) nop or. %r3,%r3,%r3 bne dbleave diff --git a/sys/powerpc/include/asm.h b/sys/powerpc/include/asm.h index 90c30cbd8d1f..0c6b6a534049 100644 --- a/sys/powerpc/include/asm.h +++ b/sys/powerpc/include/asm.h @@ -37,7 +37,7 @@ #include -#ifdef PIC +#if defined(PIC) && !defined(__powerpc64__) #define PIC_PROLOGUE XXX #define PIC_EPILOGUE XXX #define PIC_PLT(x) x@plt @@ -53,11 +53,6 @@ #define PIC_GOT(x) x #endif -#ifdef __powerpc64__ -#undef PIC_PLT -#define PIC_PLT(x) __CONCAT(.,x) -#endif - #define CNAME(csym) csym #define ASMNAME(asmsym) asmsym #ifdef __powerpc64__ @@ -73,8 +68,8 @@ #define _ENTRY(x) \ .text; .align 2; .globl x; .section ".opd","aw"; \ .align 3; x: \ - .quad .x,.TOC.@tocbase,0; .previous; \ - .align 4; .globl .x; .type .x,@function; .x: + .quad .L.x,.TOC.@tocbase,0; .size x,24; .previous; \ + .align 4; .type x,@function; .L.x: #else #define _ENTRY(x) \ .text; .align 4; .globl x; .type x,@function; x: diff --git a/sys/powerpc/include/profile.h b/sys/powerpc/include/profile.h index 6c8185a8e33b..a354e38304e3 100644 --- a/sys/powerpc/include/profile.h +++ b/sys/powerpc/include/profile.h @@ -83,13 +83,12 @@ __asm( " .text \n" \ " .section \".opd\",\"aw\" \n" \ " .align 3 \n" \ "_mcount: \n" \ - " .quad ._mcount,.TOC.@tocbase,0 \n" \ + " .quad .L._mcount,.TOC.@tocbase,0\n" \ " .previous \n" \ + " .type _mcount,@function \n" \ " .align 4 \n" \ - " .globl ._mcount \n" \ - " .type ._mcount,@function \n" \ - "._mcount: \n" \ - " stdu %r1,-(288+120)(%r1) \n" \ + ".L._mcount: \n" \ + " stdu %r1,-(288+128)(%r1) \n" \ " std %r3,48(%r1) \n" \ " std %r4,56(%r1) \n" \ " std %r5,64(%r1) \n" \ @@ -103,7 +102,7 @@ __asm( " .text \n" \ " ld %r3,0(%r1) \n" \ " ld %r3,0(%r3) \n" \ " ld %r3,16(%r3) \n" \ - " bl .__mcount \n" \ + " bl __mcount \n" \ " nop \n" \ " ld %r4,112(%r1) \n" \ " mtlr %r4 \n" \ @@ -115,7 +114,7 @@ __asm( " .text \n" \ " ld %r8,88(%r1) \n" \ " ld %r9,96(%r1) \n" \ " ld %r10,104(%r1) \n" \ - " addi %r1,%r1,(288+120) \n" \ + " addi %r1,%r1,(288+128) \n" \ " blr \n"); #else diff --git a/sys/sys/cdefs.h b/sys/sys/cdefs.h index d1d48370a7ab..dbab329857ad 100644 --- a/sys/sys/cdefs.h +++ b/sys/sys/cdefs.h @@ -362,18 +362,7 @@ extern __typeof (sym) aliassym __attribute__ ((__alias__ (#sym))) #endif #ifdef __STDC__ -#ifdef __powerpc64__ #define __weak_reference(sym,alias) \ - __asm__(".weak " #alias); \ - __asm__(".equ " #alias ", " #sym); \ - __asm__(".weak ." #alias); \ - __asm__(".equ ." #alias ", ." #sym) -#else -#define __weak_reference(sym,alias) \ - __asm__(".weak " #alias); \ - __asm__(".equ " #alias ", " #sym) -#endif -#define __weak_reference_data(sym,alias)\ __asm__(".weak " #alias); \ __asm__(".equ " #alias ", " #sym) #define __warn_references(sym,msg) \ diff --git a/sys/sys/param.h b/sys/sys/param.h index 675c47108fa8..3c4e1a6febd9 100644 --- a/sys/sys/param.h +++ b/sys/sys/param.h @@ -58,7 +58,7 @@ * in the range 5 to 9. */ #undef __FreeBSD_version -#define __FreeBSD_version 900032 /* Master, propagated to newvers */ +#define __FreeBSD_version 900033 /* Master, propagated to newvers */ #ifdef _KERNEL #define P_OSREL_SIGSEGV 700004 diff --git a/sys/ufs/ufs/ufs_vnops.c b/sys/ufs/ufs/ufs_vnops.c index 084971eddfc8..34b1758d471a 100644 --- a/sys/ufs/ufs/ufs_vnops.c +++ b/sys/ufs/ufs/ufs_vnops.c @@ -1295,7 +1295,9 @@ relock: newparent = tdp->i_number; doingdirectory = 1; } - if (fvp->v_mountedhere != NULL || (tvp && tvp->v_mountedhere != NULL)) { + if ((fvp->v_type == VDIR && fvp->v_mountedhere != NULL) || + (tvp != NULL && tvp->v_type == VDIR && + tvp->v_mountedhere != NULL)) { error = EXDEV; goto unlockout; }