Second beta release of device driver for WD/SMC 80x3 and 3c503 ethernet boards
This commit is contained in:
David Greenman
parent
b1fb6468a5
commit
258445a954
@ -16,7 +16,32 @@
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/*
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* Modification history
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*
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* $Log$
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* $Log: if_ed.c,v $
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* Revision 1.7 93/06/22 04:45:01 davidg
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* (no additional changes) Second beta release
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*
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* Revision 1.6 93/06/22 04:40:35 davidg
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* minor definition fix to ed_reset()
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*
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* Revision 1.5 93/06/22 04:37:39 davidg
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* fixed some comments
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*
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* Revision 1.4 93/06/22 04:34:34 davidg
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* added support to use the LLC0 'link-level control' flag
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* to disable the tranceiver for AUI operation on 3Com boards.
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* The default for this flag can be set in the kernel config
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* file - 'flags 0x01' sets the flag (disables the tranceiver).
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*
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* Revision 1.3 93/06/17 03:57:28 davidg
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* fixed some printf's
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*
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* Revision 1.2 93/06/17 03:26:49 davidg
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* fixed 3c503 code to determine 8/16bit board
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* changed attach printf to work with Interim-0.1.5 and NetBSD
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*
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* Revision 1.1 93/06/14 22:21:24 davidg
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* Beta release of device driver for SMC/WD80x3 and 3C503 ethernet boards.
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*
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*
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*/
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@ -432,46 +457,45 @@ ed_probe(isa_dev)
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* Reset NIC and ASIC
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*/
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outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST);
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/*
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* Verify that reset bit was set
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*/
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if ((inb(sc->asic_addr + ED_3COM_CR) & ED_3COM_CR_RST) == 0)
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return (0);
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/*
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* Wait for a while, then un-reset it
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*/
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DELAY(5000);
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outb(sc->asic_addr + ED_3COM_CR, 0);
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/*
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* Verify that the bit cleared
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*/
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if (inb(sc->asic_addr + ED_3COM_CR) & ED_3COM_CR_RST)
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return (0);
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/*
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* Wait a bit for the NIC to recover from the reset
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*/
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DELAY(5000);
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/*
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* The 3Com ASIC defaults to rather strange settings for the CR after
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* a reset - it's important to set it so that the NIC I/O
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* registers are mapped. The above setting of it to '0' only
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* resets the reset condition - the CR is *not* set to zeros.
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*/
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outb(sc->asic_addr + ED_3COM_CR, 0);
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/*
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* Determine if this is an 8bit or 16bit board
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*/
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/* XXX - either this code is broken...or the hardware is... */
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/* it always comes up 8bit */
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/*
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* select page 0 registers
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*/
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outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP);
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/*
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* Attempt to clear WTS bit. If it doesn't clear, then this is a
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* 16bit board.
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*/
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outb(sc->nic_addr + ED_P0_DCR, 0);
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/*
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* select page 2 registers
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*/
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outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP);
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/*
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* The 3c503 forces the WTS bit to a one if this is a 16bit board
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*/
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@ -480,13 +504,10 @@ ed_probe(isa_dev)
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else
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memwidth = 8;
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#if 0
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printf(" (%dbit)",memwidth);
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#endif
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/*
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* select page 0 registers
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*/
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outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP);
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outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2|ED_CR_STP);
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sc->txb_cnt = 1;
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@ -524,7 +545,7 @@ printf(" (%dbit)",memwidth);
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outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5);
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break;
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default:
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printf("ed0: Invalid irq configuration\n");
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printf("ed%d: Invalid irq configuration\n", isa_dev->id_unit);
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return(0);
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}
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@ -557,13 +578,19 @@ printf(" (%dbit)",memwidth);
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sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i);
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/*
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* Unmap PROM - select NIC registers
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* Unmap PROM - select NIC registers. Tranceiver remains disabled at
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* this point. It's enabled in ed_init so that the attach code
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* is given a chance to set the default based on a compile-time
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* config option
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*/
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outb(sc->asic_addr + ED_3COM_CR, 0);
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/*
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* Zero memory and verify that it is clear
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*/
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#if 0
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printf("Starting write\n");
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for (i = 0; i < 8192; ++i)
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bzero(sc->smem_start, 8192);
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printf("Done.\n");
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#endif
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#if 0
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{ char test_buf[1024];
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printf("starting write\n");
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@ -576,6 +603,9 @@ printf("done.\n");
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}
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#endif
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/*
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* Zero memory and verify that it is clear
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*/
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bzero(sc->smem_start, memsize);
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for (i = 0; i < memsize; ++i)
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@ -612,7 +642,6 @@ ed_attach(isa_dev)
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ifp->if_unit = isa_dev->id_unit;
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ifp->if_name = "ed" ;
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ifp->if_mtu = ETHERMTU;
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS ;
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ifp->if_init = ed_init;
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ifp->if_output = ether_output;
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ifp->if_start = ed_start;
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@ -620,6 +649,16 @@ ed_attach(isa_dev)
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ifp->if_reset = ed_reset;
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ifp->if_watchdog = ed_watchdog;
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/*
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* Set default state for LLC0 flag (used to disable the tranceiver
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* for AUI operation), based on compile-time config option.
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*/
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if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER)
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ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS
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| IFF_LLC0);
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else
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ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS);
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if_attach(ifp);
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#if NBPFILTER > 0
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@ -635,11 +674,11 @@ ed_attach(isa_dev)
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ifa = ifa->ifa_next;
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/*
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* If we find an AF_LINK type entry, we well fill in the hardware addr
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* If we find an AF_LINK type entry we fill in the hardware address
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*/
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if ((ifa != 0) && (ifa->ifa_addr != 0)) {
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/*
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* Fill in the link level address for this interface
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* Fill in the link-level address for this interface
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*/
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sdl = (struct sockaddr_dl *)ifa->ifa_addr;
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sdl->sdl_type = IFT_ETHER;
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@ -651,15 +690,17 @@ ed_attach(isa_dev)
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/*
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* Print additional info when attached
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*/
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printf(" enet %s type %s", ether_sprintf(sc->arpcom.ac_enaddr),
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sc->type_str);
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printf("ed%d: address %s, type %s (%dbit) %s\n", isa_dev->id_unit,
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ether_sprintf(sc->arpcom.ac_enaddr), sc->type_str,
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sc->memwidth, ((sc->vendor == ED_VENDOR_3COM) &&
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(ifp->if_flags & IFF_LLC0)) ? "tranceiver disabled" : "");
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}
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/*
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* Reset interface.
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*/
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int
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ed_reset(unit, uban)
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ed_reset(unit)
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int unit;
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{
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int s;
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@ -839,6 +880,16 @@ ed_init(unit)
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*/
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outb(sc->nic_addr + ED_P0_TCR, 0);
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/*
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* If this is a 3Com board, the tranceiver must be software enabled
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* (there is no settable hardware default).
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*/
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if ((sc->vendor == ED_VENDOR_3COM) && (ifp->if_flags & IFF_LLC0)) {
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outb(sc->asic_addr + ED_3COM_CR, 0);
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} else {
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outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
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}
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/*
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* Set 'running' flag, and clear output active flag.
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*/
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@ -1221,6 +1272,10 @@ edintr(unit)
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*/
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if (isr & ED_ISR_RXE) {
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++sc->arpcom.ac_if.if_ierrors;
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#ifdef ED_DEBUG
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printf("ed%d: receive error %x\n", unit,
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inb(sc->nic_addr + ED_P0_RSR));
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#endif
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}
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/*
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@ -1421,14 +1476,26 @@ ed_ioctl(ifp, command, data)
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*/
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outb(sc->nic_addr + ED_P0_RCR,
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ED_RCR_PRO|ED_RCR_AM|ED_RCR_AB);
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} else
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} else {
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/*
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* XXX - for multicasts to work, we would need to
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* rewrite the multicast hashing array with the
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* proper hash (would have been destroyed above).
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*/
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outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB);
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}
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#endif
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/*
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* An unfortunate hack to provide the (required) software control
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* of the tranceiver for 3Com boards. The LLC0 flag disables
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* the tranceiver if set.
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*/
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if ((sc->vendor == ED_VENDOR_3COM) && (ifp->if_flags & IFF_LLC0)) {
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outb(sc->asic_addr + ED_3COM_CR, 0);
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} else {
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outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
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}
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break;
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default:
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@ -546,6 +546,14 @@ struct ed_ring {
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#define ED_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
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#define ED_VENDOR_3COM 0x01 /* 3Com */
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/*
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* Compile-time config flags
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*/
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/*
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* this sets the default for enabling/disablng the tranceiver
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*/
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#define ED_FLAGS_DISABLE_TRANCEIVER 0x01
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/*
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* Definitions for Western digital/SMC WD80x3 series ASIC
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*/
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@ -16,7 +16,32 @@
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/*
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* Modification history
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*
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* $Log$
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* $Log: if_ed.c,v $
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* Revision 1.7 93/06/22 04:45:01 davidg
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* (no additional changes) Second beta release
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*
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* Revision 1.6 93/06/22 04:40:35 davidg
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* minor definition fix to ed_reset()
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*
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* Revision 1.5 93/06/22 04:37:39 davidg
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* fixed some comments
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*
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* Revision 1.4 93/06/22 04:34:34 davidg
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* added support to use the LLC0 'link-level control' flag
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* to disable the tranceiver for AUI operation on 3Com boards.
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* The default for this flag can be set in the kernel config
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* file - 'flags 0x01' sets the flag (disables the tranceiver).
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*
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* Revision 1.3 93/06/17 03:57:28 davidg
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* fixed some printf's
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*
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* Revision 1.2 93/06/17 03:26:49 davidg
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* fixed 3c503 code to determine 8/16bit board
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* changed attach printf to work with Interim-0.1.5 and NetBSD
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*
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* Revision 1.1 93/06/14 22:21:24 davidg
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* Beta release of device driver for SMC/WD80x3 and 3C503 ethernet boards.
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*
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*
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*/
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@ -432,46 +457,45 @@ ed_probe(isa_dev)
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* Reset NIC and ASIC
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*/
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outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST);
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/*
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* Verify that reset bit was set
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*/
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if ((inb(sc->asic_addr + ED_3COM_CR) & ED_3COM_CR_RST) == 0)
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return (0);
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/*
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* Wait for a while, then un-reset it
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*/
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DELAY(5000);
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outb(sc->asic_addr + ED_3COM_CR, 0);
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/*
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* Verify that the bit cleared
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*/
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if (inb(sc->asic_addr + ED_3COM_CR) & ED_3COM_CR_RST)
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return (0);
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/*
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* Wait a bit for the NIC to recover from the reset
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*/
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DELAY(5000);
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/*
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* The 3Com ASIC defaults to rather strange settings for the CR after
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* a reset - it's important to set it so that the NIC I/O
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* registers are mapped. The above setting of it to '0' only
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* resets the reset condition - the CR is *not* set to zeros.
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*/
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outb(sc->asic_addr + ED_3COM_CR, 0);
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/*
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* Determine if this is an 8bit or 16bit board
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*/
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/* XXX - either this code is broken...or the hardware is... */
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/* it always comes up 8bit */
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/*
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* select page 0 registers
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*/
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outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP);
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/*
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* Attempt to clear WTS bit. If it doesn't clear, then this is a
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* 16bit board.
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*/
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outb(sc->nic_addr + ED_P0_DCR, 0);
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/*
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* select page 2 registers
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*/
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outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP);
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/*
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* The 3c503 forces the WTS bit to a one if this is a 16bit board
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*/
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@ -480,13 +504,10 @@ ed_probe(isa_dev)
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else
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memwidth = 8;
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#if 0
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printf(" (%dbit)",memwidth);
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#endif
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/*
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* select page 0 registers
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*/
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outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP);
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outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2|ED_CR_STP);
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sc->txb_cnt = 1;
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@ -524,7 +545,7 @@ printf(" (%dbit)",memwidth);
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outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5);
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break;
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default:
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printf("ed0: Invalid irq configuration\n");
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printf("ed%d: Invalid irq configuration\n", isa_dev->id_unit);
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return(0);
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}
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@ -557,13 +578,19 @@ printf(" (%dbit)",memwidth);
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sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i);
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/*
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* Unmap PROM - select NIC registers
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* Unmap PROM - select NIC registers. Tranceiver remains disabled at
|
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* this point. It's enabled in ed_init so that the attach code
|
||||
* is given a chance to set the default based on a compile-time
|
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* config option
|
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*/
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outb(sc->asic_addr + ED_3COM_CR, 0);
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/*
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* Zero memory and verify that it is clear
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*/
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#if 0
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printf("Starting write\n");
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for (i = 0; i < 8192; ++i)
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bzero(sc->smem_start, 8192);
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printf("Done.\n");
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#endif
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#if 0
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{ char test_buf[1024];
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printf("starting write\n");
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@ -576,6 +603,9 @@ printf("done.\n");
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}
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#endif
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/*
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* Zero memory and verify that it is clear
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*/
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bzero(sc->smem_start, memsize);
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for (i = 0; i < memsize; ++i)
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@ -612,7 +642,6 @@ ed_attach(isa_dev)
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ifp->if_unit = isa_dev->id_unit;
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ifp->if_name = "ed" ;
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ifp->if_mtu = ETHERMTU;
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS ;
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ifp->if_init = ed_init;
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ifp->if_output = ether_output;
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ifp->if_start = ed_start;
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@ -620,6 +649,16 @@ ed_attach(isa_dev)
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ifp->if_reset = ed_reset;
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ifp->if_watchdog = ed_watchdog;
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/*
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* Set default state for LLC0 flag (used to disable the tranceiver
|
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* for AUI operation), based on compile-time config option.
|
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*/
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if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER)
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ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS
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| IFF_LLC0);
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else
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ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS);
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if_attach(ifp);
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#if NBPFILTER > 0
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@ -635,11 +674,11 @@ ed_attach(isa_dev)
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ifa = ifa->ifa_next;
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/*
|
||||
* If we find an AF_LINK type entry, we well fill in the hardware addr
|
||||
* If we find an AF_LINK type entry we fill in the hardware address
|
||||
*/
|
||||
if ((ifa != 0) && (ifa->ifa_addr != 0)) {
|
||||
/*
|
||||
* Fill in the link level address for this interface
|
||||
* Fill in the link-level address for this interface
|
||||
*/
|
||||
sdl = (struct sockaddr_dl *)ifa->ifa_addr;
|
||||
sdl->sdl_type = IFT_ETHER;
|
||||
@ -651,15 +690,17 @@ ed_attach(isa_dev)
|
||||
/*
|
||||
* Print additional info when attached
|
||||
*/
|
||||
printf(" enet %s type %s", ether_sprintf(sc->arpcom.ac_enaddr),
|
||||
sc->type_str);
|
||||
printf("ed%d: address %s, type %s (%dbit) %s\n", isa_dev->id_unit,
|
||||
ether_sprintf(sc->arpcom.ac_enaddr), sc->type_str,
|
||||
sc->memwidth, ((sc->vendor == ED_VENDOR_3COM) &&
|
||||
(ifp->if_flags & IFF_LLC0)) ? "tranceiver disabled" : "");
|
||||
}
|
||||
|
||||
/*
|
||||
* Reset interface.
|
||||
*/
|
||||
int
|
||||
ed_reset(unit, uban)
|
||||
ed_reset(unit)
|
||||
int unit;
|
||||
{
|
||||
int s;
|
||||
@ -839,6 +880,16 @@ ed_init(unit)
|
||||
*/
|
||||
outb(sc->nic_addr + ED_P0_TCR, 0);
|
||||
|
||||
/*
|
||||
* If this is a 3Com board, the tranceiver must be software enabled
|
||||
* (there is no settable hardware default).
|
||||
*/
|
||||
if ((sc->vendor == ED_VENDOR_3COM) && (ifp->if_flags & IFF_LLC0)) {
|
||||
outb(sc->asic_addr + ED_3COM_CR, 0);
|
||||
} else {
|
||||
outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Set 'running' flag, and clear output active flag.
|
||||
*/
|
||||
@ -1221,6 +1272,10 @@ edintr(unit)
|
||||
*/
|
||||
if (isr & ED_ISR_RXE) {
|
||||
++sc->arpcom.ac_if.if_ierrors;
|
||||
#ifdef ED_DEBUG
|
||||
printf("ed%d: receive error %x\n", unit,
|
||||
inb(sc->nic_addr + ED_P0_RSR));
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1421,14 +1476,26 @@ ed_ioctl(ifp, command, data)
|
||||
*/
|
||||
outb(sc->nic_addr + ED_P0_RCR,
|
||||
ED_RCR_PRO|ED_RCR_AM|ED_RCR_AB);
|
||||
} else
|
||||
} else {
|
||||
/*
|
||||
* XXX - for multicasts to work, we would need to
|
||||
* rewrite the multicast hashing array with the
|
||||
* proper hash (would have been destroyed above).
|
||||
*/
|
||||
outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB);
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
* An unfortunate hack to provide the (required) software control
|
||||
* of the tranceiver for 3Com boards. The LLC0 flag disables
|
||||
* the tranceiver if set.
|
||||
*/
|
||||
if ((sc->vendor == ED_VENDOR_3COM) && (ifp->if_flags & IFF_LLC0)) {
|
||||
outb(sc->asic_addr + ED_3COM_CR, 0);
|
||||
} else {
|
||||
outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
@ -546,6 +546,14 @@ struct ed_ring {
|
||||
#define ED_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
|
||||
#define ED_VENDOR_3COM 0x01 /* 3Com */
|
||||
|
||||
/*
|
||||
* Compile-time config flags
|
||||
*/
|
||||
/*
|
||||
* this sets the default for enabling/disablng the tranceiver
|
||||
*/
|
||||
#define ED_FLAGS_DISABLE_TRANCEIVER 0x01
|
||||
|
||||
/*
|
||||
* Definitions for Western digital/SMC WD80x3 series ASIC
|
||||
*/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user