Add Allwinner A64 padconf settings.
Reviewed by: andrew, manu
This commit is contained in:
parent
eefa8817b0
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25cd5941be
160
sys/arm/allwinner/a64/a64_padconf.c
Normal file
160
sys/arm/allwinner/a64/a64_padconf.c
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/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/types.h>
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#include <arm/allwinner/allwinner_pinctrl.h>
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#include "opt_soc.h"
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#ifdef SOC_ALLWINNER_A64
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static const struct allwinner_pins a64_pins[] = {
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{ "PB0", 1, 0, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", NULL, "eint" } },
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{ "PB1", 1, 1, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", "sim", "eint" } },
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{ "PB2", 1, 2, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", "sim", "eint" } },
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{ "PB3", 1, 3, { "gpio_in", "gpio_out", "uart2", "i2s0", "jtag", "sim", "eint" } },
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{ "PB4", 1, 4, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "eint" } },
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{ "PB5", 1, 5, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "eint" } },
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{ "PB6", 1, 6, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "eint" } },
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{ "PB7", 1, 7, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "eint" } },
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{ "PB8", 1, 8, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL, "eint" } },
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{ "PB9", 1, 9, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL, "eint" } },
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{ "PC0", 2, 0, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
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{ "PC1", 2, 1, { "gpio_in", "gpio_out", "nand", "mmc2", "spi0" } },
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{ "PC2", 2, 2, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
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{ "PC3", 2, 3, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
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{ "PC4", 2, 4, { "gpio_in", "gpio_out", "nand" } },
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{ "PC5", 2, 5, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC6", 2, 6, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC7", 2, 7, { "gpio_in", "gpio_out", "nand" } },
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{ "PC8", 2, 8, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC9", 2, 9, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC10", 2, 10, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC11", 2, 11, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC12", 2, 12, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC13", 2, 13, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC14", 2, 14, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC15", 2, 15, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PC16", 2, 16, { "gpio_in", "gpio_out", "nand", "mmc2" } },
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{ "PD0", 3, 0, { "gpio_in", "gpio_out", "lcd", "uart3", "spi1", "ccir" } },
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{ "PD1", 3, 1, { "gpio_in", "gpio_out", "lcd", "uart3", "spi1", "ccir" } },
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{ "PD2", 3, 2, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } },
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{ "PD3", 3, 3, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } },
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{ "PD4", 3, 4, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } },
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{ "PD5", 3, 5, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } },
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{ "PD6", 3, 6, { "gpio_in", "gpio_out", "lcd", NULL, NULL, "ccir" } },
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{ "PD7", 3, 7, { "gpio_in", "gpio_out", "lcd", NULL, NULL, "ccir" } },
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{ "PD8", 3, 8, { "gpio_in", "gpio_out", "lcd", NULL, "emac", "ccir" } },
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{ "PD9", 3, 9, { "gpio_in", "gpio_out", "lcd", NULL, "emac", "ccir" } },
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{ "PD10", 3, 10, { "gpio_in", "gpio_out", "lcd", NULL, "emac" } },
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{ "PD11", 3, 11, { "gpio_in", "gpio_out", "lcd", NULL, "emac" } },
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{ "PD12", 3, 12, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
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{ "PD13", 3, 13, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
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{ "PD14", 3, 14, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
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{ "PD15", 3, 15, { "gpio_in", "gpio_out", "lcd", "lvds", "emac", "ccir" } },
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{ "PD16", 3, 16, { "gpio_in", "gpio_out", "lcd", "lvds", "emac", "ccir" } },
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{ "PD17", 3, 17, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
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{ "PD18", 3, 18, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
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{ "PD19", 3, 19, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
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{ "PD20", 3, 20, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
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{ "PD21", 3, 21, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
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{ "PD22", 3, 22, { "gpio_in", "gpio_out", "pwm0", NULL, "emac" } },
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{ "PD23", 3, 23, { "gpio_in", "gpio_out", NULL, NULL, "emac" } },
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{ "PD24", 3, 24, { "gpio_in", "gpio_out" } },
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{ "PE0", 4, 0, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE1", 4, 1, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE2", 4, 2, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE3", 4, 3, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE4", 4, 4, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE5", 4, 5, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE6", 4, 6, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE7", 4, 7, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE8", 4, 8, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE9", 4, 9, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE10", 4, 10, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE11", 4, 11, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
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{ "PE12", 4, 12, { "gpio_in", "gpio_out", "csi" } },
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{ "PE13", 4, 13, { "gpio_in", "gpio_out", "csi" } },
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{ "PE14", 4, 14, { "gpio_in", "gpio_out", "pll_lock", "twi2" } },
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{ "PE15", 4, 15, { "gpio_in", "gpio_out", NULL, "twi2" } },
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{ "PE16", 4, 16, { "gpio_in", "gpio_out" } },
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{ "PE17", 4, 17, { "gpio_in", "gpio_out" } },
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{ "PF0", 5, 0, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
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{ "PF1", 5, 1, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
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{ "PF2", 5, 2, { "gpio_in", "gpio_out", "mmc0", "uart0" } },
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{ "PF3", 5, 3, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
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{ "PF4", 5, 4, { "gpio_in", "gpio_out", "mmc0", "uart0" } },
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{ "PF5", 5, 5, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
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{ "PF6", 5, 6, { "gpio_in", "gpio_out" } },
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{ "PG0", 6, 0, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } },
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{ "PG1", 6, 1, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } },
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{ "PG2", 6, 2, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } },
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{ "PG3", 6, 3, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } },
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{ "PG4", 6, 4, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } },
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{ "PG5", 6, 5, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } },
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{ "PG6", 6, 6, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "eint" } },
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{ "PG7", 6, 7, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "eint" } },
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{ "PG8", 6, 8, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "eint" } },
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{ "PG9", 6, 9, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "eint" } },
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{ "PG10", 6, 10, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "eint" } },
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{ "PG11", 6, 11, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "eint" } },
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{ "PG12", 6, 12, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "eint" } },
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{ "PG13", 6, 13, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "eint" } },
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{ "PH0", 7, 0, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "eint" } },
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{ "PH1", 7, 1, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "eint" } },
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{ "PH2", 7, 2, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "eint" } },
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{ "PH3", 7, 3, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "eint" } },
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{ "PH4", 7, 4, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "eint" } },
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{ "PH5", 7, 5, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "eint" } },
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{ "PH6", 7, 6, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "eint" } },
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{ "PH7", 7, 7, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "eint" } },
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{ "PH8", 7, 8, { "gpio_in", "gpio_out", "owa", NULL, NULL, NULL, "eint" } },
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{ "PH9", 7, 9, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "eint" } },
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{ "PH10", 7, 10, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL, "eint" } },
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{ "PH11", 7, 11, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL, "eint" } },
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};
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const struct allwinner_padconf a64_padconf = {
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.npins = nitems(a64_pins),
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.pins = a64_pins,
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};
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#endif /* !SOC_ALLWINNER_A64 */
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64
sys/arm/allwinner/a64/a64_r_padconf.c
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64
sys/arm/allwinner/a64/a64_r_padconf.c
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@ -0,0 +1,64 @@
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/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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||||
* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/types.h>
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#include <arm/allwinner/allwinner_pinctrl.h>
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#include "opt_soc.h"
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#ifdef SOC_ALLWINNER_A64
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static const struct allwinner_pins a64_r_pins[] = {
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{ "PL0", 0, 0, { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL, NULL, "eint" } },
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{ "PL1", 0, 1, { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL, NULL, "eint" } },
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{ "PL2", 0, 2, { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, "eint" } },
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{ "PL3", 0, 3, { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, "eint" } },
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{ "PL4", 0, 4, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "eint" } },
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{ "PL5", 0, 5, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "eint" } },
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{ "PL6", 0, 6, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "eint" } },
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{ "PL7", 0, 7, { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "eint" } },
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{ "PL8", 0, 8, { "gpio_in", "gpio_out", "s_i2c", NULL, NULL, NULL, "eint" } },
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{ "PL9", 0, 9, { "gpio_in", "gpio_out", "s_i2c", NULL, NULL, NULL, "eint" } },
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{ "PL10", 0, 10, { "gpio_in", "gpio_out", "s_pwm", NULL, NULL, NULL, "eint" } },
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{ "PL11", 0, 11, { "gpio_in", "gpio_out", "s_cir", NULL, NULL, NULL, "eint" } },
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{ "PL12", 0, 12, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "eint" } },
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};
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const struct allwinner_padconf a64_r_padconf = {
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.npins = nitems(a64_r_pins),
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.pins = a64_r_pins,
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};
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#endif /* !SOC_ALLWINNER_A64 */
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