Atomic operation acquire barriers also need to be isync on 64-bit systems.

This commit is contained in:
Nathan Whitehorn 2012-05-24 22:14:39 +00:00
parent 7097794901
commit 270dc329b7

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@ -52,7 +52,7 @@
#define rmb() __asm __volatile("lwsync" : : : "memory")
#define wmb() __asm __volatile("lwsync" : : : "memory")
#define __ATOMIC_REL() __asm __volatile("lwsync" : : : "memory")
#define __ATOMIC_ACQ() __asm __volatile("lwsync" : : : "memory")
#define __ATOMIC_ACQ() __asm __volatile("isync" : : : "memory")
#else
#define mb() __asm __volatile("sync" : : : "memory")
#define rmb() __asm __volatile("sync" : : : "memory")