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Merge ^/head r304955 through r304964.

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This commit is contained in:
Dimitry Andric 2016-08-28 19:48:08 +00:00
commit 294f369701
13 changed files with 248 additions and 46 deletions
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6
contrib/ipfilter/opts.h
View File

@ -12,7 +12,11 @@
#define __OPTS_H__
#ifndef SOLARIS
#define SOLARIS (defined(sun) && (defined(__svr4__) || defined(__SVR4)))
# if defined(sun) && (defined(__svr4__) || defined(__SVR4))
# define SOLARIS 1
# else
# define SOLARIS 0
# endif
#endif
#define OPT_REMOVE 0x000001
#define OPT_DEBUG 0x000002

10
sys/contrib/ipfilter/netinet/ip_compat.h
View File

@ -32,10 +32,12 @@
# define __KERNEL__
#endif
#if defined(sun) && (defined(__svr4__) || defined(__SVR4))
# define SOLARIS 1
#else
# define SOLARIS 0
#ifndef SOLARIS
# if defined(sun) && (defined(__svr4__) || defined(__SVR4))
# define SOLARIS 1
# else
# define SOLARIS 0
# endif
#endif

6
sys/contrib/ipfilter/netinet/ip_fil.h
View File

@ -29,7 +29,11 @@
#endif
#ifndef SOLARIS
# define SOLARIS (defined(sun) && (defined(__svr4__) || defined(__SVR4)))
# if defined(sun) && (defined(__svr4__) || defined(__SVR4))
# define SOLARIS 1
# else
# define SOLARIS 0
# endif
#endif
#ifndef __P

6
sys/contrib/ipfilter/netinet/ip_log.c
View File

@ -19,7 +19,11 @@
# include <osreldate.h>
#endif
#ifndef SOLARIS
# define SOLARIS (defined(sun) && (defined(__svr4__) || defined(__SVR4)))
# if defined(sun) && (defined(__svr4__) || defined(__SVR4))
# define SOLARIS 1
# else
# define SOLARIS 0
# endif
#endif
#include <sys/errno.h>
#include <sys/types.h>

8
sys/contrib/ipfilter/netinet/ip_nat.h
View File

@ -13,8 +13,12 @@
#ifndef __IP_NAT_H__
#define __IP_NAT_H__
#ifndef SOLARIS
#define SOLARIS (defined(sun) && (defined(__svr4__) || defined(__SVR4)))
#ifndef SOLARIS
# if defined(sun) && (defined(__svr4__) || defined(__SVR4))
# define SOLARIS 1
# else
# define SOLARIS 0
# endif
#endif
#if defined(__STDC__) || defined(__GNUC__) || defined(_AIX51)

8
sys/contrib/ipfilter/netinet/ip_proxy.h
View File

@ -12,8 +12,12 @@
#ifndef __IP_PROXY_H__
#define __IP_PROXY_H__
#ifndef SOLARIS
#define SOLARIS (defined(sun) && (defined(__svr4__) || defined(__SVR4)))
#ifndef SOLARIS
# if defined(sun) && (defined(__svr4__) || defined(__SVR4))
# define SOLARIS 1
# else
# define SOLARIS 0
# endif
#endif
#if defined(__STDC__) || defined(__GNUC__) || defined(_AIX51)

36
sys/ddb/db_expr.c
View File

@ -57,7 +57,8 @@ db_term(db_expr_t *valuep)
if (!db_value_of_name(db_tok_string, valuep) &&
!db_value_of_name_pcpu(db_tok_string, valuep) &&
!db_value_of_name_vnet(db_tok_string, valuep)) {
db_error("Symbol not found\n");
db_printf("Symbol '%s' not found\n", db_tok_string);
db_error(NULL);
/*NOTREACHED*/
}
return (true);
@ -89,12 +90,14 @@ db_term(db_expr_t *valuep)
}
if (t == tLPAREN) {
if (!db_expression(valuep)) {
db_error("Syntax error\n");
db_printf("Expression syntax error after '%c'\n", '(');
db_error(NULL);
/*NOTREACHED*/
}
t = db_read_token();
if (t != tRPAREN) {
db_error("Syntax error\n");
db_printf("Expression syntax error -- expected '%c'\n", ')');
db_error(NULL);
/*NOTREACHED*/
}
return (true);
@ -164,7 +167,9 @@ db_mult_expr(db_expr_t *valuep)
while (t == tSTAR || t == tSLASH || t == tPCT || t == tHASH ||
t == tBIT_AND ) {
if (!db_term(&rhs)) {
db_printf("Expression syntax error after '%c'\n", '!');
db_printf("Expression syntax error after '%c'\n",
t == tSTAR ? '*' : t == tSLASH ? '/' : t == tPCT ? '%' :
t == tHASH ? '#' : '&');
db_error(NULL);
/*NOTREACHED*/
}
@ -177,7 +182,7 @@ db_mult_expr(db_expr_t *valuep)
break;
default:
if (rhs == 0) {
db_error("Divide by 0\n");
db_error("Division by 0\n");
/*NOTREACHED*/
}
if (t == tSLASH)
@ -199,7 +204,6 @@ db_add_expr(db_expr_t *valuep)
{
db_expr_t lhs, rhs;
int t;
char c;
if (!db_mult_expr(&lhs))
return (false);
@ -207,8 +211,8 @@ db_add_expr(db_expr_t *valuep)
t = db_read_token();
while (t == tPLUS || t == tMINUS || t == tBIT_OR) {
if (!db_mult_expr(&rhs)) {
c = db_tok_string[0];
db_printf("Expression syntax error after '%c'\n", c);
db_printf("Expression syntax error after '%c'\n",
t == tPLUS ? '+' : t == tMINUS ? '-' : '|');
db_error(NULL);
/*NOTREACHED*/
}
@ -243,11 +247,14 @@ db_shift_expr(db_expr_t *valuep)
t = db_read_token();
while (t == tSHIFT_L || t == tSHIFT_R) {
if (!db_add_expr(&rhs)) {
db_error("Syntax error\n");
db_printf("Expression syntax error after '%s'\n",
t == tSHIFT_L ? "<<" : ">>");
db_error(NULL);
/*NOTREACHED*/
}
if (rhs < 0) {
db_error("Negative shift amount\n");
db_printf("Negative shift amount %jd\n", (intmax_t)rhs);
db_error(NULL);
/*NOTREACHED*/
}
if (t == tSHIFT_L)
@ -269,7 +276,6 @@ db_logical_relation_expr(
{
db_expr_t lhs, rhs;
int t;
char op[3];
if (!db_shift_expr(&lhs))
return (false);
@ -277,11 +283,11 @@ db_logical_relation_expr(
t = db_read_token();
while (t == tLOG_EQ || t == tLOG_NOT_EQ || t == tGREATER ||
t == tGREATER_EQ || t == tLESS || t == tLESS_EQ) {
op[0] = db_tok_string[0];
op[1] = db_tok_string[1];
op[2] = 0;
if (!db_shift_expr(&rhs)) {
db_printf("Expression syntax error after \"%s\"\n", op);
db_printf("Expression syntax error after '%s'\n",
t == tLOG_EQ ? "==" : t == tLOG_NOT_EQ ? "!=" :
t == tGREATER ? ">" : t == tGREATER_EQ ? ">=" :
t == tLESS ? "<" : "<=");
db_error(NULL);
/*NOTREACHED*/
}

37
sys/dev/bhnd/bcma/bcma.c
View File

@ -492,6 +492,42 @@ bcma_free_bhnd_dinfo(device_t dev, struct bhnd_devinfo *dinfo)
bcma_free_dinfo(dev, (struct bcma_devinfo *)dinfo);
}
static int
bcma_get_core_table(device_t dev, device_t child, struct bhnd_core_info **cores,
u_int *num_cores)
{
struct bcma_softc *sc;
struct bcma_erom erom;
const struct bhnd_chipid *cid;
struct resource *r;
int error;
int rid;
sc = device_get_softc(dev);
/* Map the EROM table. */
cid = BHND_BUS_GET_CHIPID(dev, dev);
rid = 0;
r = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, cid->enum_addr,
cid->enum_addr + BCMA_EROM_TABLE_SIZE, BCMA_EROM_TABLE_SIZE,
RF_ACTIVE);
if (r == NULL) {
device_printf(dev, "failed to allocate EROM resource\n");
return (ENXIO);
}
/* Enumerate all declared cores */
if ((error = bcma_erom_open(&erom, r, BCMA_EROM_TABLE_START)))
goto cleanup;
error = bcma_erom_get_core_info(&erom, cores, num_cores);
cleanup:
bus_release_resource(dev, SYS_RES_MEMORY, rid, r);
return (error);
}
/**
* Scan a device enumeration ROM table, adding all valid discovered cores to
* the bus.
@ -577,6 +613,7 @@ static device_method_t bcma_methods[] = {
DEVMETHOD(bhnd_bus_find_hostb_device, bcma_find_hostb_device),
DEVMETHOD(bhnd_bus_alloc_devinfo, bcma_alloc_bhnd_dinfo),
DEVMETHOD(bhnd_bus_free_devinfo, bcma_free_bhnd_dinfo),
DEVMETHOD(bhnd_bus_get_core_table, bcma_get_core_table),
DEVMETHOD(bhnd_bus_reset_core, bcma_reset_core),
DEVMETHOD(bhnd_bus_suspend_core, bcma_suspend_core),
DEVMETHOD(bhnd_bus_read_config, bcma_read_config),

26
sys/dev/bhnd/bhnd.h
View File

@ -424,6 +424,32 @@ bhnd_get_chipid(device_t dev) {
return (BHND_BUS_GET_CHIPID(device_get_parent(dev), dev));
};
/**
* Get a list of all cores discoverable on the bhnd bus.
*
* Enumerates all cores discoverable on @p dev, returning the list in
* @p cores and the count in @p num_cores.
*
* The memory allocated for the list should be freed using
* `free(*cores, M_BHND)`. @p cores and @p num_cores are not changed
* when an error is returned.
*
* @param dev A bhnd bus child device.
* @param[out] cores The table of core descriptors.
* @param[out] num_cores The number of core descriptors in @p cores.
*
* @retval 0 success
* @retval non-zero if an error occurs enumerating @p dev, a regular UNIX
* error code should be returned.
*/
static inline int
bhnd_get_core_table(device_t dev, struct bhnd_core_info **cores,
u_int *num_cores)
{
return (BHND_BUS_GET_CORE_TABLE(device_get_parent(dev), dev, cores,
num_cores));
}
/**
* If supported by the chipset, return the clock source for the given clock.
*

33
sys/dev/bhnd/bhnd_bus_if.m
View File

@ -56,6 +56,13 @@ CODE {
panic("bhnd_bus_get_chipid unimplemented");
}
static int
bhnd_bus_null_get_core_table(device_t dev, device_t child,
struct bhnd_core_info **cores, u_int *num_cores)
{
panic("bhnd_bus_get_core_table unimplemented");
}
static bhnd_attach_type
bhnd_bus_null_get_attach_type(device_t dev, device_t child)
{
@ -270,6 +277,32 @@ METHOD const struct bhnd_chipid * get_chipid {
device_t child;
} DEFAULT bhnd_bus_null_get_chipid;
/**
* Get a list of all cores discoverable on @p dev.
*
* Enumerates all cores discoverable on @p dev, returning the list in
* @p cores and the count in @p num_cores.
*
* The memory allocated for the list should be freed using
* `free(*cores, M_BHND)`. @p cores and @p num_cores are not changed
* when an error is returned.
*
* @param dev The bhnd bus device.
* @param child The requesting bhnd bus child.
* @param[out] cores The table of core descriptors.
* @param[out] num_cores The number of core descriptors in @p cores.
*
* @retval 0 success
* @retval non-zero if an error occurs enumerating @p dev, a regular UNIX
* error code should be returned.
*/
METHOD int get_core_table {
device_t dev;
device_t child;
struct bhnd_core_info **cores;
u_int *num_cores;
} DEFAULT bhnd_bus_null_get_core_table;
/**
* Return the BHND attachment type of the parent bus.
*

71
sys/dev/bhnd/siba/siba.c
View File

@ -504,6 +504,76 @@ siba_free_bhnd_dinfo(device_t dev, struct bhnd_devinfo *dinfo)
siba_free_dinfo(dev, (struct siba_devinfo *)dinfo);
}
static int
siba_get_core_table(device_t dev, device_t child, struct bhnd_core_info **cores,
u_int *num_cores)
{
const struct bhnd_chipid *chipid;
struct bhnd_core_info *table;
struct bhnd_resource *r;
int error;
int rid;
/* Fetch the core count from our chip identification */
chipid = BHND_BUS_GET_CHIPID(dev, dev);
/* Allocate our local core table */
table = malloc(sizeof(*table) * chipid->ncores, M_BHND, M_NOWAIT);
if (table == NULL)
return (ENOMEM);
/* Enumerate all cores. */
for (u_int i = 0; i < chipid->ncores; i++) {
struct siba_core_id cid;
uint32_t idhigh, idlow;
/* Map the core's register block */
rid = 0;
r = bhnd_alloc_resource(dev, SYS_RES_MEMORY, &rid,
SIBA_CORE_ADDR(i), SIBA_CORE_ADDR(i) + SIBA_CORE_SIZE - 1,
SIBA_CORE_SIZE, RF_ACTIVE);
if (r == NULL) {
error = ENXIO;
goto failed;
}
/* Read the core info */
idhigh = bhnd_bus_read_4(r, SB0_REG_ABS(SIBA_CFG0_IDHIGH));
idlow = bhnd_bus_read_4(r, SB0_REG_ABS(SIBA_CFG0_IDLOW));
cid = siba_parse_core_id(idhigh, idlow, i, 0);
table[i] = cid.core_info;
/* Determine unit number */
for (u_int j = 0; j < i; j++) {
if (table[j].vendor == table[i].vendor &&
table[j].device == table[i].device)
table[i].unit++;
}
/* Release our resource */
bhnd_release_resource(dev, SYS_RES_MEMORY, rid, r);
r = NULL;
}
/* Provide the result values (performed last to avoid modifying
* cores/num_cores if enumeration failed). */
*cores = table;
*num_cores = chipid->ncores;
return (0);
failed:
if (table != NULL)
free(table, M_BHND);
if (r != NULL)
bhnd_release_resource(dev, SYS_RES_MEMORY, rid, r);
return (error);
}
/**
* Scan the core table and add all valid discovered cores to
* the bus.
@ -696,6 +766,7 @@ static device_method_t siba_methods[] = {
/* BHND interface */
DEVMETHOD(bhnd_bus_find_hostb_device, siba_find_hostb_device),
DEVMETHOD(bhnd_bus_get_core_table, siba_get_core_table),
DEVMETHOD(bhnd_bus_alloc_devinfo, siba_alloc_bhnd_dinfo),
DEVMETHOD(bhnd_bus_free_devinfo, siba_free_bhnd_dinfo),
DEVMETHOD(bhnd_bus_reset_core, siba_reset_core),

45
sys/i386/i386/machdep.c
View File

@ -2636,20 +2636,17 @@ init386(first)
dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
vm86_initialize();
getmemsize(first);
init_param2(physmem);
/* now running on new page tables, configured,and u/iom is accessible */
/*
* Initialize the console before we print anything out.
*/
cninit();
if (metadata_missing)
printf("WARNING: loader(8) metadata is missing!\n");
/* Initialize the tss (except for the final esp0) early for vm86. */
PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
thread0.td_kstack_pages * PAGE_SIZE - 16);
PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
ltr(gsel_tss);
/* Initialize the PIC early for vm86 calls. */
#ifdef DEV_ISA
#ifdef DEV_ATPIC
#ifndef PC98
@ -2671,6 +2668,20 @@ init386(first)
#endif
#endif
vm86_initialize();
getmemsize(first);
init_param2(physmem);
/* now running on new page tables, configured,and u/iom is accessible */
/*
* Initialize the console before we print anything out.
*/
cninit();
if (metadata_missing)
printf("WARNING: loader(8) metadata is missing!\n");
#ifdef DDB
db_fetch_ksymtab(bootinfo.bi_symtab, bootinfo.bi_esymtab);
#endif
@ -2701,14 +2712,10 @@ init386(first)
}
#endif
PCPU_SET(curpcb, thread0.td_pcb);
/* make an initial tss so cpu can get interrupt stack on syscall! */
/* Move esp0 in the tss to its final place. */
/* Note: -16 is so we can grow the trapframe if we came from vm86 */
PCPU_SET(common_tss.tss_esp0, (vm_offset_t)thread0.td_pcb - 16);
PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS; /* clear busy bit */
ltr(gsel_tss);
/* make a call gate to reenter kernel with */

2
sys/modules/Makefile
View File

@ -766,7 +766,7 @@ _epic= epic
_igb= igb
.endif
.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE} == "i386"
.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
_cloudabi32= cloudabi32
.endif
.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64"