Apply lld fixes for internal errors building perl on 32-bit PowerPC
Merge commit f457863ae345 from llvm git (by Fangrui Song): [ELF] Support REL-format R_AARCH64_NONE relocation -fprofile-use=/-fprofile-sample-use= compiles may produce REL-format .rel.llvm.call-graph-profile even if the prevailing format is RELA on AArch64. Add R_AARCH64_NONE to getImplicitAddend to fix this linker error: ``` ld.lld: error: internal linker error: cannot read addend for relocation R_AARCH64_NONE PLEASE submit a bug report to https://crbug.com and run tools/clang/scripts/process_crashreports.py (only works inside Google) which will upload a report and include the crash backtrace. ``` Merge commit 53fc5d9b9a01 from llvm git (by Fangrui Song): [ELF] Support R_PPC_NONE/R_PPC64_NONE in getImplicitAddend Similar to f457863ae345d2635026501f5383e0e625869639 Merge commit 767e64fc11d7 from llvm git (by Fangrui Song): [ELF] Support some absolute/PC-relative relocation types for REL format ctfconvert seems to use REL-format `.rel.SUNW_dof` for 32-bit architectures. ``` Binary file usr/ports/lang/perl5.32/work/perl-5.32.1/dtrace_mini.o matches [alfredo.junior@dell-a ~/tmp/llvm-bug]$ readelf -r dtrace_mini.o Relocation section (.rel.SUNW_dof): r_offset r_info r_type st_value st_name 00000184 0000281a R_PPC_REL32 00000000 $dtrace1772974259.Perl_dtrace_probe_load ``` Support R_PPC_REL32 to fix `ld.lld: error: drti.c:(.SUNW_dof+0x4E4): internal linker error: cannot read addend for relocation R_PPC_REL32`. While here, add some common relocation types for AArch64, PPC, and PPC64. We perform minimum tests. Reviewed By: adalava, arichardson Differential Revision: https://reviews.llvm.org/D120535 Requested by: alfredo MFC after: 3 days
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@ -199,6 +199,13 @@ int64_t AArch64::getImplicitAddend(const uint8_t *buf, RelType type) const {
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switch (type) {
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case R_AARCH64_TLSDESC:
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return read64(buf + 8);
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case R_AARCH64_NONE:
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return 0;
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case R_AARCH64_PREL32:
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return SignExtend64<32>(read32(buf));
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case R_AARCH64_ABS64:
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case R_AARCH64_PREL64:
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return read64(buf);
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default:
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internalLinkerError(getErrorLocation(buf),
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"cannot read addend for relocation " + toString(type));
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@ -27,6 +27,7 @@ public:
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RelExpr getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const override;
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RelType getDynRel(RelType type) const override;
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int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
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void writeGotHeader(uint8_t *buf) const override;
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void writePltHeader(uint8_t *buf) const override {
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llvm_unreachable("should call writePPC32GlinkSection() instead");
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@ -274,6 +275,20 @@ RelType PPC::getDynRel(RelType type) const {
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return R_PPC_NONE;
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}
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int64_t PPC::getImplicitAddend(const uint8_t *buf, RelType type) const {
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switch (type) {
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case R_PPC_NONE:
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return 0;
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case R_PPC_ADDR32:
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case R_PPC_REL32:
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return SignExtend64<32>(read32(buf));
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default:
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internalLinkerError(getErrorLocation(buf),
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"cannot read addend for relocation " + toString(type));
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return 0;
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}
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}
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static std::pair<RelType, uint64_t> fromDTPREL(RelType type, uint64_t val) {
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uint64_t dtpBiasedVal = val - 0x8000;
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switch (type) {
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@ -369,6 +369,7 @@ public:
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RelExpr getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const override;
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RelType getDynRel(RelType type) const override;
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int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, const Symbol &sym,
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uint64_t pltEntryAddr) const override;
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@ -1067,6 +1068,22 @@ RelType PPC64::getDynRel(RelType type) const {
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return R_PPC64_NONE;
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}
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int64_t PPC64::getImplicitAddend(const uint8_t *buf, RelType type) const {
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switch (type) {
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case R_PPC64_NONE:
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return 0;
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case R_PPC64_REL32:
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return SignExtend64<32>(read32(buf));
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case R_PPC64_ADDR64:
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case R_PPC64_REL64:
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return read64(buf);
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default:
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internalLinkerError(getErrorLocation(buf),
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"cannot read addend for relocation " + toString(type));
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return 0;
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}
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}
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void PPC64::writeGotHeader(uint8_t *buf) const {
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write64(buf, getPPC64TocBase());
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}
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