remove all the SMP_INVLTLB defines, making the code default for APIC_IO.

Reviewed by:	informal discussion with Peter Wemm <peter@spinner.DIALix.COM>
This commit is contained in:
Steve Passe 1997-04-28 00:25:00 +00:00
parent 2b45006334
commit 2c5d02fff3
12 changed files with 125 additions and 343 deletions

View File

@ -22,20 +22,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
* $Id: mp_machdep.c,v 1.2 1997/04/27 21:17:24 fsmp Exp $
*/
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#if defined(APIC_IO)
#if !defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#else /* APIC_IO */
#if defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#endif /* APIC_IO */
#define FIX_MP_TABLE_WORKS_NOT
#include "opt_serial.h"
@ -60,9 +51,11 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/icu.h> /* Xinvltlb() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
#define WARMBOOT_TARGET 0
#define WARMBOOT_OFF (KERNBASE + 0x0467)
@ -310,11 +303,6 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
{
@ -1466,26 +1454,24 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
*
* XXX: Needs to handshake and wait for completion before proceding.
*/
void
smp_invltlb()
smp_invltlb(void)
{
if (smp_active) {
if (invldebug & 2)
all_but_self_ipi(ICU_OFFSET + 32);
}
if (smp_active && invltlb_ok)
all_but_self_ipi(ICU_OFFSET + XINVLTLB_OFFSET);
}
void
invlpg(u_int addr)
{
__asm __volatile("invlpg (%0)"::"r"(addr):"memory");
/* send a message to the other CPUs */
smp_invltlb();
}
@ -1493,29 +1479,13 @@ void
invltlb(void)
{
u_long temp;
/*
* This should be implemented as load_cr3(rcr3()) when load_cr3() is
* inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp) :: "memory");
/* send a message to the other CPUs */
smp_invltlb();
}
/*
* Handles recieving an "IRQ 27", the invalidate tlb IPI..
*/
void
ipi_invltlb(void)
{
u_long temp;
if (invldebug & 4) {
/*
* This should be implemented as load_cr3(rcr3()) when
* load_cr3() is inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp)
:: "memory");
}
}
#endif /* SMP_INVLTLB */

View File

@ -22,20 +22,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
* $Id: mp_machdep.c,v 1.2 1997/04/27 21:17:24 fsmp Exp $
*/
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#if defined(APIC_IO)
#if !defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#else /* APIC_IO */
#if defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#endif /* APIC_IO */
#define FIX_MP_TABLE_WORKS_NOT
#include "opt_serial.h"
@ -60,9 +51,11 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/icu.h> /* Xinvltlb() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
#define WARMBOOT_TARGET 0
#define WARMBOOT_OFF (KERNBASE + 0x0467)
@ -310,11 +303,6 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
{
@ -1466,26 +1454,24 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
*
* XXX: Needs to handshake and wait for completion before proceding.
*/
void
smp_invltlb()
smp_invltlb(void)
{
if (smp_active) {
if (invldebug & 2)
all_but_self_ipi(ICU_OFFSET + 32);
}
if (smp_active && invltlb_ok)
all_but_self_ipi(ICU_OFFSET + XINVLTLB_OFFSET);
}
void
invlpg(u_int addr)
{
__asm __volatile("invlpg (%0)"::"r"(addr):"memory");
/* send a message to the other CPUs */
smp_invltlb();
}
@ -1493,29 +1479,13 @@ void
invltlb(void)
{
u_long temp;
/*
* This should be implemented as load_cr3(rcr3()) when load_cr3() is
* inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp) :: "memory");
/* send a message to the other CPUs */
smp_invltlb();
}
/*
* Handles recieving an "IRQ 27", the invalidate tlb IPI..
*/
void
ipi_invltlb(void)
{
u_long temp;
if (invldebug & 4) {
/*
* This should be implemented as load_cr3(rcr3()) when
* load_cr3() is inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp)
:: "memory");
}
}
#endif /* SMP_INVLTLB */

View File

@ -30,7 +30,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: cpufunc.h,v 1.63 1997/04/26 11:45:36 peter Exp $
* $Id: cpufunc.h,v 1.64 1997/04/26 20:04:18 peter Exp $
*/
/*
@ -46,7 +46,6 @@
#ifdef KERNEL
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#endif
#ifdef __GNUC__
@ -207,7 +206,8 @@ invd(void)
__asm __volatile("invd");
}
#if defined(SMP) && defined(SMP_INVLTLB) && defined(KERNEL)
#ifdef KERNEL
#ifdef SMP
/*
* When using APIC IPI's, the inlining cost is prohibitive..
@ -215,7 +215,7 @@ invd(void)
void invlpg __P((u_int addr));
void invltlb __P((void));
#else
#else /* !SMP */
static __inline void
invlpg(u_int addr)
@ -234,7 +234,9 @@ invltlb(void)
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
: : "memory");
}
#endif /* SMP && SMP_INVLTLB && KERNEL */
#endif /* SMP */
#endif /* KERNEL */
static __inline u_short
inw(u_int port)

View File

@ -22,20 +22,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
* $Id: mp_machdep.c,v 1.2 1997/04/27 21:17:24 fsmp Exp $
*/
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#if defined(APIC_IO)
#if !defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#else /* APIC_IO */
#if defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#endif /* APIC_IO */
#define FIX_MP_TABLE_WORKS_NOT
#include "opt_serial.h"
@ -60,9 +51,11 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/icu.h> /* Xinvltlb() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
#define WARMBOOT_TARGET 0
#define WARMBOOT_OFF (KERNBASE + 0x0467)
@ -310,11 +303,6 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
{
@ -1466,26 +1454,24 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
*
* XXX: Needs to handshake and wait for completion before proceding.
*/
void
smp_invltlb()
smp_invltlb(void)
{
if (smp_active) {
if (invldebug & 2)
all_but_self_ipi(ICU_OFFSET + 32);
}
if (smp_active && invltlb_ok)
all_but_self_ipi(ICU_OFFSET + XINVLTLB_OFFSET);
}
void
invlpg(u_int addr)
{
__asm __volatile("invlpg (%0)"::"r"(addr):"memory");
/* send a message to the other CPUs */
smp_invltlb();
}
@ -1493,29 +1479,13 @@ void
invltlb(void)
{
u_long temp;
/*
* This should be implemented as load_cr3(rcr3()) when load_cr3() is
* inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp) :: "memory");
/* send a message to the other CPUs */
smp_invltlb();
}
/*
* Handles recieving an "IRQ 27", the invalidate tlb IPI..
*/
void
ipi_invltlb(void)
{
u_long temp;
if (invldebug & 4) {
/*
* This should be implemented as load_cr3(rcr3()) when
* load_cr3() is inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp)
:: "memory");
}
}
#endif /* SMP_INVLTLB */

View File

@ -6,7 +6,7 @@
* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
* ----------------------------------------------------------------------------
*
* $Id: smp.h,v 1.29 1997/04/26 08:11:50 peter Exp $
* $Id: smp.h,v 1.1 1997/04/26 11:45:44 peter Exp $
*
*/
@ -16,7 +16,6 @@
#ifdef KERNEL
#include "opt_smp.h"
#include "opt_smp_invltlb.h" /* aiee! (for cpufunc.h!) */
#if defined(SMP) && !defined(NCPU)
# define NCPU 2
@ -73,10 +72,7 @@ int apic_trigger __P((int, int));
int apic_polarity __P((int, int));
void configure_local_apic __P((void));
void init_secondary __P((void));
#ifdef SMP_INVLTLB
void ipi_invltlb __P((void));
void smp_invltlb __P((void));
#endif
/* global data in mpapic.c */
extern volatile u_int* apic_base;
@ -105,7 +101,7 @@ void u_sleep __P((int));
/* global data in init_smp.c */
extern int smp_active;
extern int invldebug;
extern int invltlb_ok;
/* in pmap.c FIXME: belongs in pmap.h??? */
void pmap_bootstrap_apics __P((void));

View File

@ -22,20 +22,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
* $Id: mp_machdep.c,v 1.2 1997/04/27 21:17:24 fsmp Exp $
*/
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#if defined(APIC_IO)
#if !defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#else /* APIC_IO */
#if defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#endif /* APIC_IO */
#define FIX_MP_TABLE_WORKS_NOT
#include "opt_serial.h"
@ -60,9 +51,11 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/icu.h> /* Xinvltlb() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
#define WARMBOOT_TARGET 0
#define WARMBOOT_OFF (KERNBASE + 0x0467)
@ -310,11 +303,6 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
{
@ -1466,26 +1454,24 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
*
* XXX: Needs to handshake and wait for completion before proceding.
*/
void
smp_invltlb()
smp_invltlb(void)
{
if (smp_active) {
if (invldebug & 2)
all_but_self_ipi(ICU_OFFSET + 32);
}
if (smp_active && invltlb_ok)
all_but_self_ipi(ICU_OFFSET + XINVLTLB_OFFSET);
}
void
invlpg(u_int addr)
{
__asm __volatile("invlpg (%0)"::"r"(addr):"memory");
/* send a message to the other CPUs */
smp_invltlb();
}
@ -1493,29 +1479,13 @@ void
invltlb(void)
{
u_long temp;
/*
* This should be implemented as load_cr3(rcr3()) when load_cr3() is
* inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp) :: "memory");
/* send a message to the other CPUs */
smp_invltlb();
}
/*
* Handles recieving an "IRQ 27", the invalidate tlb IPI..
*/
void
ipi_invltlb(void)
{
u_long temp;
if (invldebug & 4) {
/*
* This should be implemented as load_cr3(rcr3()) when
* load_cr3() is inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp)
:: "memory");
}
}
#endif /* SMP_INVLTLB */

View File

@ -22,20 +22,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
* $Id: mp_machdep.c,v 1.2 1997/04/27 21:17:24 fsmp Exp $
*/
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#if defined(APIC_IO)
#if !defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#else /* APIC_IO */
#if defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#endif /* APIC_IO */
#define FIX_MP_TABLE_WORKS_NOT
#include "opt_serial.h"
@ -60,9 +51,11 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/icu.h> /* Xinvltlb() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
#define WARMBOOT_TARGET 0
#define WARMBOOT_OFF (KERNBASE + 0x0467)
@ -310,11 +303,6 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
{
@ -1466,26 +1454,24 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
*
* XXX: Needs to handshake and wait for completion before proceding.
*/
void
smp_invltlb()
smp_invltlb(void)
{
if (smp_active) {
if (invldebug & 2)
all_but_self_ipi(ICU_OFFSET + 32);
}
if (smp_active && invltlb_ok)
all_but_self_ipi(ICU_OFFSET + XINVLTLB_OFFSET);
}
void
invlpg(u_int addr)
{
__asm __volatile("invlpg (%0)"::"r"(addr):"memory");
/* send a message to the other CPUs */
smp_invltlb();
}
@ -1493,29 +1479,13 @@ void
invltlb(void)
{
u_long temp;
/*
* This should be implemented as load_cr3(rcr3()) when load_cr3() is
* inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp) :: "memory");
/* send a message to the other CPUs */
smp_invltlb();
}
/*
* Handles recieving an "IRQ 27", the invalidate tlb IPI..
*/
void
ipi_invltlb(void)
{
u_long temp;
if (invldebug & 4) {
/*
* This should be implemented as load_cr3(rcr3()) when
* load_cr3() is inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp)
:: "memory");
}
}
#endif /* SMP_INVLTLB */

View File

@ -30,7 +30,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: cpufunc.h,v 1.63 1997/04/26 11:45:36 peter Exp $
* $Id: cpufunc.h,v 1.64 1997/04/26 20:04:18 peter Exp $
*/
/*
@ -46,7 +46,6 @@
#ifdef KERNEL
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#endif
#ifdef __GNUC__
@ -207,7 +206,8 @@ invd(void)
__asm __volatile("invd");
}
#if defined(SMP) && defined(SMP_INVLTLB) && defined(KERNEL)
#ifdef KERNEL
#ifdef SMP
/*
* When using APIC IPI's, the inlining cost is prohibitive..
@ -215,7 +215,7 @@ invd(void)
void invlpg __P((u_int addr));
void invltlb __P((void));
#else
#else /* !SMP */
static __inline void
invlpg(u_int addr)
@ -234,7 +234,9 @@ invltlb(void)
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
: : "memory");
}
#endif /* SMP && SMP_INVLTLB && KERNEL */
#endif /* SMP */
#endif /* KERNEL */
static __inline u_short
inw(u_int port)

View File

@ -22,20 +22,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
* $Id: mp_machdep.c,v 1.2 1997/04/27 21:17:24 fsmp Exp $
*/
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#if defined(APIC_IO)
#if !defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#else /* APIC_IO */
#if defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#endif /* APIC_IO */
#define FIX_MP_TABLE_WORKS_NOT
#include "opt_serial.h"
@ -60,9 +51,11 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/icu.h> /* Xinvltlb() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
#define WARMBOOT_TARGET 0
#define WARMBOOT_OFF (KERNBASE + 0x0467)
@ -310,11 +303,6 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
{
@ -1466,26 +1454,24 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
*
* XXX: Needs to handshake and wait for completion before proceding.
*/
void
smp_invltlb()
smp_invltlb(void)
{
if (smp_active) {
if (invldebug & 2)
all_but_self_ipi(ICU_OFFSET + 32);
}
if (smp_active && invltlb_ok)
all_but_self_ipi(ICU_OFFSET + XINVLTLB_OFFSET);
}
void
invlpg(u_int addr)
{
__asm __volatile("invlpg (%0)"::"r"(addr):"memory");
/* send a message to the other CPUs */
smp_invltlb();
}
@ -1493,29 +1479,13 @@ void
invltlb(void)
{
u_long temp;
/*
* This should be implemented as load_cr3(rcr3()) when load_cr3() is
* inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp) :: "memory");
/* send a message to the other CPUs */
smp_invltlb();
}
/*
* Handles recieving an "IRQ 27", the invalidate tlb IPI..
*/
void
ipi_invltlb(void)
{
u_long temp;
if (invldebug & 4) {
/*
* This should be implemented as load_cr3(rcr3()) when
* load_cr3() is inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp)
:: "memory");
}
}
#endif /* SMP_INVLTLB */

View File

@ -6,7 +6,7 @@
* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
* ----------------------------------------------------------------------------
*
* $Id: smp.h,v 1.29 1997/04/26 08:11:50 peter Exp $
* $Id: smp.h,v 1.1 1997/04/26 11:45:44 peter Exp $
*
*/
@ -16,7 +16,6 @@
#ifdef KERNEL
#include "opt_smp.h"
#include "opt_smp_invltlb.h" /* aiee! (for cpufunc.h!) */
#if defined(SMP) && !defined(NCPU)
# define NCPU 2
@ -73,10 +72,7 @@ int apic_trigger __P((int, int));
int apic_polarity __P((int, int));
void configure_local_apic __P((void));
void init_secondary __P((void));
#ifdef SMP_INVLTLB
void ipi_invltlb __P((void));
void smp_invltlb __P((void));
#endif
/* global data in mpapic.c */
extern volatile u_int* apic_base;
@ -105,7 +101,7 @@ void u_sleep __P((int));
/* global data in init_smp.c */
extern int smp_active;
extern int invldebug;
extern int invltlb_ok;
/* in pmap.c FIXME: belongs in pmap.h??? */
void pmap_bootstrap_apics __P((void));

View File

@ -22,20 +22,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
* $Id: mp_machdep.c,v 1.2 1997/04/27 21:17:24 fsmp Exp $
*/
#include "opt_smp.h"
#include "opt_smp_invltlb.h"
#if defined(APIC_IO)
#if !defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#else /* APIC_IO */
#if defined(SMP_INVLTLB)
#error you must define BOTH APIC_IO and SMP_INVLTLB or NEITHER
#endif
#endif /* APIC_IO */
#define FIX_MP_TABLE_WORKS_NOT
#include "opt_serial.h"
@ -60,9 +51,11 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/icu.h> /* Xinvltlb() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
#define WARMBOOT_TARGET 0
#define WARMBOOT_OFF (KERNBASE + 0x0467)
@ -310,11 +303,6 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
{
@ -1466,26 +1454,24 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
*
* XXX: Needs to handshake and wait for completion before proceding.
*/
void
smp_invltlb()
smp_invltlb(void)
{
if (smp_active) {
if (invldebug & 2)
all_but_self_ipi(ICU_OFFSET + 32);
}
if (smp_active && invltlb_ok)
all_but_self_ipi(ICU_OFFSET + XINVLTLB_OFFSET);
}
void
invlpg(u_int addr)
{
__asm __volatile("invlpg (%0)"::"r"(addr):"memory");
/* send a message to the other CPUs */
smp_invltlb();
}
@ -1493,29 +1479,13 @@ void
invltlb(void)
{
u_long temp;
/*
* This should be implemented as load_cr3(rcr3()) when load_cr3() is
* inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp) :: "memory");
/* send a message to the other CPUs */
smp_invltlb();
}
/*
* Handles recieving an "IRQ 27", the invalidate tlb IPI..
*/
void
ipi_invltlb(void)
{
u_long temp;
if (invldebug & 4) {
/*
* This should be implemented as load_cr3(rcr3()) when
* load_cr3() is inlined.
*/
__asm __volatile("movl %%cr3, %0; movl %0, %%cr3":"=r"(temp)
:: "memory");
}
}
#endif /* SMP_INVLTLB */

View File

@ -6,7 +6,7 @@
* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
* ----------------------------------------------------------------------------
*
* $Id: smp.h,v 1.29 1997/04/26 08:11:50 peter Exp $
* $Id: smp.h,v 1.1 1997/04/26 11:45:44 peter Exp $
*
*/
@ -16,7 +16,6 @@
#ifdef KERNEL
#include "opt_smp.h"
#include "opt_smp_invltlb.h" /* aiee! (for cpufunc.h!) */
#if defined(SMP) && !defined(NCPU)
# define NCPU 2
@ -73,10 +72,7 @@ int apic_trigger __P((int, int));
int apic_polarity __P((int, int));
void configure_local_apic __P((void));
void init_secondary __P((void));
#ifdef SMP_INVLTLB
void ipi_invltlb __P((void));
void smp_invltlb __P((void));
#endif
/* global data in mpapic.c */
extern volatile u_int* apic_base;
@ -105,7 +101,7 @@ void u_sleep __P((int));
/* global data in init_smp.c */
extern int smp_active;
extern int invldebug;
extern int invltlb_ok;
/* in pmap.c FIXME: belongs in pmap.h??? */
void pmap_bootstrap_apics __P((void));