Account for IPI_PREEMPT. We don't want to call sched_preempt() with
interrupts disabled or with td_intr_nesting_level non-zero.
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a73665b028
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2cddc3d722
@ -138,10 +138,10 @@ interrupt(struct trapframe *tf)
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u_int vector;
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int count;
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uint8_t inta;
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ia64_set_fpsr(IA64_FPSR_DEFAULT);
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td = curthread;
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atomic_add_int(&td->td_intr_nesting_level, 1);
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vector = tf->tf_special.ifa;
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@ -195,7 +195,7 @@ interrupt(struct trapframe *tf)
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adjust_ticks++;
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count++;
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}
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ia64_set_itm(itc + ia64_clock_reload - adj);
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ia64_set_itm(ia64_get_itc() + ia64_clock_reload - adj);
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if (count > 0) {
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adjust_lost += count - 1;
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if (delta > (ia64_clock_reload >> 3)) {
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@ -229,7 +229,9 @@ interrupt(struct trapframe *tf)
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} else if (vector == ipi_vector[IPI_RENDEZVOUS]) {
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rdvs[PCPU_GET(cpuid)]++;
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CTR1(KTR_SMP, "IPI_RENDEZVOUS, cpuid=%d", PCPU_GET(cpuid));
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enable_intr();
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smp_rendezvous_action();
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disable_intr();
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} else if (vector == ipi_vector[IPI_STOP]) {
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cpumask_t mybit = PCPU_GET(cpumask);
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@ -244,11 +246,17 @@ interrupt(struct trapframe *tf)
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mp_ipi_test++;
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} else if (vector == ipi_vector[IPI_PREEMPT]) {
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CTR1(KTR_SMP, "IPI_PREEMPT, cpuid=%d", PCPU_GET(cpuid));
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__asm __volatile("mov cr.eoi = r0;; srlz.d");
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enable_intr();
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sched_preempt(curthread);
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disable_intr();
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goto stray;
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#endif
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} else {
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ints[PCPU_GET(cpuid)]++;
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atomic_add_int(&td->td_intr_nesting_level, 1);
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ia64_dispatch_intr(tf, vector);
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atomic_subtract_int(&td->td_intr_nesting_level, 1);
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}
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__asm __volatile("mov cr.eoi = r0;; srlz.d");
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@ -257,8 +265,6 @@ interrupt(struct trapframe *tf)
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goto next;
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stray:
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atomic_subtract_int(&td->td_intr_nesting_level, 1);
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if (TRAPF_USERMODE(tf)) {
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enable_intr();
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userret(td, tf);
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