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MFp4:

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Stop using our local UART_IPEND_* and instead use the global SER_INT_*
as defined in <sys/serial.h>.
This commit is contained in:
Marcel Moolenaar 2006-02-24 02:42:26 +00:00
parent 6fcbf91d09
commit 2d5118050a
7 changed files with 37 additions and 52 deletions

15
sys/dev/uart/uart_bus.h

@ -42,21 +42,6 @@
#define UART_FLUSH_RECEIVER UART_DRAIN_RECEIVER
#define UART_FLUSH_TRANSMITTER UART_DRAIN_TRANSMITTER
/*
* Interrupt sources (in priority order). See also uart_core.c
* Note that the low order 16 bits are used to pass modem signals
* from the hardware interrupt handler to the software interrupt
* handler.
*/
#define UART_IPEND_OVERRUN 0x010000
#define UART_IPEND_BREAK 0x020000
#define UART_IPEND_RXREADY 0x040000
#define UART_IPEND_SIGCHG 0x080000
#define UART_IPEND_TXIDLE 0x100000
#define UART_IPEND_MASK 0x1f0000
#define UART_IPEND_SIGMASK 0x00ffff
/* Received character status bits. */
#define UART_STAT_BREAK 0x0100
#define UART_STAT_FRAMERR 0x0200

22
sys/dev/uart/uart_core.c

@ -90,7 +90,7 @@ uart_intr_break(struct uart_softc *sc)
}
#endif
if (sc->sc_opened)
atomic_set_32(&sc->sc_ttypend, UART_IPEND_BREAK);
atomic_set_32(&sc->sc_ttypend, SER_INT_BREAK);
}
/*
@ -116,7 +116,7 @@ uart_intr_overrun(struct uart_softc *sc)
UART_RECEIVE(sc);
if (uart_rx_put(sc, UART_STAT_OVERRUN))
sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
atomic_set_32(&sc->sc_ttypend, UART_IPEND_RXREADY);
atomic_set_32(&sc->sc_ttypend, SER_INT_RXREADY);
}
UART_FLUSH(sc, UART_FLUSH_RECEIVER);
}
@ -142,7 +142,7 @@ uart_intr_rxready(struct uart_softc *sc)
}
#endif
if (sc->sc_opened)
atomic_set_32(&sc->sc_ttypend, UART_IPEND_RXREADY);
atomic_set_32(&sc->sc_ttypend, SER_INT_RXREADY);
else
sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */
}
@ -172,8 +172,8 @@ uart_intr_sigchg(struct uart_softc *sc)
do {
old = sc->sc_ttypend;
new = old & ~UART_SIGMASK_STATE;
new |= sig & UART_IPEND_SIGMASK;
new |= UART_IPEND_SIGCHG;
new |= sig & SER_INT_SIGMASK;
new |= SER_INT_SIGCHG;
} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
}
@ -185,7 +185,7 @@ uart_intr_txidle(struct uart_softc *sc)
{
if (sc->sc_txbusy) {
sc->sc_txbusy = 0;
atomic_set_32(&sc->sc_ttypend, UART_IPEND_TXIDLE);
atomic_set_32(&sc->sc_ttypend, SER_INT_TXIDLE);
}
}
@ -202,15 +202,15 @@ uart_intr(void *arg)
ipend = UART_IPEND(sc);
if (ipend == 0)
break;
if (ipend & UART_IPEND_OVERRUN)
if (ipend & SER_INT_OVERRUN)
uart_intr_overrun(sc);
if (ipend & UART_IPEND_BREAK)
if (ipend & SER_INT_BREAK)
uart_intr_break(sc);
if (ipend & UART_IPEND_RXREADY)
if (ipend & SER_INT_RXREADY)
uart_intr_rxready(sc);
if (ipend & UART_IPEND_SIGCHG)
if (ipend & SER_INT_SIGCHG)
uart_intr_sigchg(sc);
if (ipend & UART_IPEND_TXIDLE)
if (ipend & SER_INT_TXIDLE)
uart_intr_txidle(sc);
} while (1);

10
sys/dev/uart/uart_dev_ns8250.c

@ -556,17 +556,17 @@ ns8250_bus_ipend(struct uart_softc *sc)
lsr = uart_getreg(bas, REG_LSR);
mtx_unlock_spin(&sc->sc_hwmtx);
if (lsr & LSR_OE)
ipend |= UART_IPEND_OVERRUN;
ipend |= SER_INT_OVERRUN;
if (lsr & LSR_BI)
ipend |= UART_IPEND_BREAK;
ipend |= SER_INT_BREAK;
if (lsr & LSR_RXRDY)
ipend |= UART_IPEND_RXREADY;
ipend |= SER_INT_RXREADY;
} else {
mtx_unlock_spin(&sc->sc_hwmtx);
if (iir & IIR_TXRDY)
ipend |= UART_IPEND_TXIDLE;
ipend |= SER_INT_TXIDLE;
else
ipend |= UART_IPEND_SIGCHG;
ipend |= SER_INT_SIGCHG;
}
return ((sc->sc_leaving) ? 0 : ipend);
}

10
sys/dev/uart/uart_dev_sab82532.c

@ -546,15 +546,15 @@ sab82532_bus_ipend(struct uart_softc *sc)
ipend = 0;
if (isr1 & SAB_ISR1_BRKT)
ipend |= UART_IPEND_BREAK;
ipend |= SER_INT_BREAK;
if (isr0 & SAB_ISR0_RFO)
ipend |= UART_IPEND_OVERRUN;
ipend |= SER_INT_OVERRUN;
if (isr0 & (SAB_ISR0_TCD|SAB_ISR0_RPF))
ipend |= UART_IPEND_RXREADY;
ipend |= SER_INT_RXREADY;
if ((isr0 & SAB_ISR0_CDSC) || (isr1 & SAB_ISR1_CSC))
ipend |= UART_IPEND_SIGCHG;
ipend |= SER_INT_SIGCHG;
if (isr1 & SAB_ISR1_ALLS)
ipend |= UART_IPEND_TXIDLE;
ipend |= SER_INT_TXIDLE;
return (ipend);
}

16
sys/dev/uart/uart_dev_z8530.c

@ -305,7 +305,7 @@ z8530_bus_attach(struct uart_softc *sc)
z8530->tpc = z8530_setup(bas, 9600, 8, 1, UART_PARITY_NONE);
z8530->tpc &= ~(TPC_DTR|TPC_RTS);
}
z8530->txidle = 1; /* Report UART_IPEND_TXIDLE. */
z8530->txidle = 1; /* Report SER_INT_TXIDLE. */
sc->sc_rxfifosz = 3;
sc->sc_txfifosz = 1;
@ -418,14 +418,14 @@ z8530_bus_ipend(struct uart_softc *sc)
}
if (ip & IP_RIA)
ipend |= UART_IPEND_RXREADY;
ipend |= SER_INT_RXREADY;
if (ip & IP_TIA) {
uart_setreg(bas, REG_CTRL, CR_RSTTXI);
uart_barrier(bas);
if (z8530->txidle) {
ipend |= UART_IPEND_TXIDLE;
z8530->txidle = 0; /* Mask UART_IPEND_TXIDLE. */
ipend |= SER_INT_TXIDLE;
z8530->txidle = 0; /* Mask SER_INT_TXIDLE. */
}
}
@ -434,18 +434,18 @@ z8530_bus_ipend(struct uart_softc *sc)
uart_barrier(bas);
bes = uart_getmreg(bas, RR_BES);
if (bes & BES_BRK)
ipend |= UART_IPEND_BREAK;
ipend |= SER_INT_BREAK;
sig = sc->sc_hwsig;
SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
if (sig & UART_SIGMASK_DELTA)
ipend |= UART_IPEND_SIGCHG;
ipend |= SER_INT_SIGCHG;
src = uart_getmreg(bas, RR_SRC);
if (src & SRC_OVR) {
uart_setreg(bas, REG_CTRL, CR_RSTERR);
uart_barrier(bas);
ipend |= UART_IPEND_OVERRUN;
ipend |= SER_INT_OVERRUN;
}
}
@ -586,7 +586,7 @@ z8530_bus_transmit(struct uart_softc *sc)
uart_setreg(bas, REG_DATA, sc->sc_txbuf[0]);
uart_barrier(bas);
sc->sc_txbusy = 1;
z8530->txidle = 1; /* Report UART_IPEND_TXIDLE again. */
z8530->txidle = 1; /* Report SER_INT_TXIDLE again. */
mtx_unlock_spin(&sc->sc_hwmtx);
return (0);
}

4
sys/dev/uart/uart_kbd_sun.c

@ -274,10 +274,10 @@ sunkbd_uart_intr(void *arg)
return;
pend = atomic_readandclear_32(&sc->sc_uart->sc_ttypend);
if (!(pend & UART_IPEND_MASK))
if (!(pend & SER_INT_MASK))
return;
if (pend & UART_IPEND_RXREADY) {
if (pend & SER_INT_RXREADY) {
if (KBD_IS_ACTIVE(&sc->sc_kbd) && KBD_IS_BUSY(&sc->sc_kbd)) {
sc->sc_kbd.kb_callback.kc_func(&sc->sc_kbd,
KBDIO_KEYINPUT, sc->sc_kbd.kb_callback.kc_arg);

12
sys/dev/uart/uart_tty.c

@ -307,12 +307,12 @@ uart_tty_intr(void *arg)
return;
pend = atomic_readandclear_32(&sc->sc_ttypend);
if (!(pend & UART_IPEND_MASK))
if (!(pend & SER_INT_MASK))
return;
tp = sc->sc_u.u_tty.tp;
if (pend & UART_IPEND_RXREADY) {
if (pend & SER_INT_RXREADY) {
while (!uart_rx_empty(sc) && !(tp->t_state & TS_TBLOCK)) {
xc = uart_rx_get(sc);
c = xc & 0xff;
@ -324,13 +324,13 @@ uart_tty_intr(void *arg)
}
}
if (pend & UART_IPEND_BREAK) {
if (pend & SER_INT_BREAK) {
if (tp != NULL && !(tp->t_iflag & IGNBRK))
ttyld_rint(tp, 0);
}
if (pend & UART_IPEND_SIGCHG) {
sig = pend & UART_IPEND_SIGMASK;
if (pend & SER_INT_SIGCHG) {
sig = pend & SER_INT_SIGMASK;
if (sig & SER_DDCD)
ttyld_modem(tp, sig & SER_DCD);
if ((sig & SER_DCTS) && (tp->t_cflag & CCTS_OFLOW) &&
@ -343,7 +343,7 @@ uart_tty_intr(void *arg)
}
}
if (pend & UART_IPEND_TXIDLE) {
if (pend & SER_INT_TXIDLE) {
tp->t_state &= ~TS_BUSY;
ttyld_start(tp);
}