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Rename e500 prefix to match other Book-E CPU variations. CPU id tidbits for

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the new cores.

Obtained from:	Freescale, Semihalf.
This commit is contained in:
Rafal Jaworowski 2012-05-26 13:36:18 +00:00
parent 4f0962fc83
commit 2f6bd24181
3 changed files with 25 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
sys/powerpc/booke/machdep.c
View File

@ -185,8 +185,8 @@ SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
int hw_direct_map = 0; int hw_direct_map = 0;
static void cpu_e500_startup(void *); static void cpu_booke_startup(void *);
SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_e500_startup, NULL); SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_booke_startup, NULL);
void print_kernel_section_addr(void); void print_kernel_section_addr(void);
void print_kenv(void); void print_kenv(void);
@ -195,7 +195,7 @@ u_int booke_init(uint32_t, uint32_t);
extern int elf32_nxstack; extern int elf32_nxstack;
static void static void
cpu_e500_startup(void *dummy) cpu_booke_startup(void *dummy)
{ {
int indx, size; int indx, size;
@ -538,7 +538,8 @@ cpu_halt(void)
{ {
mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE)); mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
while (1); while (1)
;
} }
int int

9
sys/powerpc/booke/platform_bare.c
View File

@ -73,7 +73,7 @@ static int bare_smp_next_cpu(platform_t, struct cpuref *cpuref);
static int bare_smp_get_bsp(platform_t, struct cpuref *cpuref); static int bare_smp_get_bsp(platform_t, struct cpuref *cpuref);
static int bare_smp_start_cpu(platform_t, struct pcpu *cpu); static int bare_smp_start_cpu(platform_t, struct pcpu *cpu);
static void e500_reset(platform_t); static void booke_reset(platform_t);
static platform_method_t bare_methods[] = { static platform_method_t bare_methods[] = {
PLATFORMMETHOD(platform_probe, bare_probe), PLATFORMMETHOD(platform_probe, bare_probe),
@ -85,7 +85,7 @@ static platform_method_t bare_methods[] = {
PLATFORMMETHOD(platform_smp_get_bsp, bare_smp_get_bsp), PLATFORMMETHOD(platform_smp_get_bsp, bare_smp_get_bsp),
PLATFORMMETHOD(platform_smp_start_cpu, bare_smp_start_cpu), PLATFORMMETHOD(platform_smp_start_cpu, bare_smp_start_cpu),
PLATFORMMETHOD(platform_reset, e500_reset), PLATFORMMETHOD(platform_reset, booke_reset),
{ 0, 0 } { 0, 0 }
}; };
@ -307,7 +307,7 @@ bare_smp_start_cpu(platform_t plat, struct pcpu *pc)
} }
static void static void
e500_reset(platform_t plat) booke_reset(platform_t plat)
{ {
/* /*
@ -328,6 +328,7 @@ e500_reset(platform_t plat)
mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM); mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM);
printf("Reset failed...\n"); printf("Reset failed...\n");
while (1); while (1)
;
} }

22
sys/powerpc/powerpc/cpu.c
View File

@ -75,13 +75,13 @@
#include <machine/spr.h> #include <machine/spr.h>
static void cpu_6xx_setup(int cpuid, uint16_t vers); static void cpu_6xx_setup(int cpuid, uint16_t vers);
static void cpu_e500_setup(int cpuid, uint16_t vers);
static void cpu_970_setup(int cpuid, uint16_t vers); static void cpu_970_setup(int cpuid, uint16_t vers);
static void cpu_booke_setup(int cpuid, uint16_t vers);
int powerpc_pow_enabled; int powerpc_pow_enabled;
void (*cpu_idle_hook)(void) = NULL; void (*cpu_idle_hook)(void) = NULL;
static void cpu_idle_60x(void); static void cpu_idle_60x(void);
static void cpu_idle_e500(void); static void cpu_idle_booke(void);
struct cputab { struct cputab {
const char *name; const char *name;
@ -146,9 +146,13 @@ static const struct cputab models[] = {
{ "Motorola PowerPC 8245", MPC8245, REVFMT_MAJMIN, { "Motorola PowerPC 8245", MPC8245, REVFMT_MAJMIN,
PPC_FEATURE_HAS_FPU, cpu_6xx_setup }, PPC_FEATURE_HAS_FPU, cpu_6xx_setup },
{ "Freescale e500v1 core", FSL_E500v1, REVFMT_MAJMIN, { "Freescale e500v1 core", FSL_E500v1, REVFMT_MAJMIN,
0, cpu_e500_setup }, 0, cpu_booke_setup },
{ "Freescale e500v2 core", FSL_E500v2, REVFMT_MAJMIN, { "Freescale e500v2 core", FSL_E500v2, REVFMT_MAJMIN,
0, cpu_e500_setup }, 0, cpu_booke_setup },
{ "Freescale e500mc core", FSL_E500mc, REVFMT_MAJMIN,
0, cpu_booke_setup },
{ "Freescale e5500 core", FSL_E5500, REVFMT_MAJMIN,
0, cpu_booke_setup },
{ "IBM Cell Broadband Engine", IBMCELLBE, REVFMT_MAJMIN, { "IBM Cell Broadband Engine", IBMCELLBE, REVFMT_MAJMIN,
PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU,
NULL}, NULL},
@ -191,6 +195,8 @@ cpu_setup(u_int cpuid)
break; break;
case FSL_E500v1: case FSL_E500v1:
case FSL_E500v2: case FSL_E500v2:
case FSL_E500mc:
case FSL_E5500:
maj = (pvr >> 4) & 0xf; maj = (pvr >> 4) & 0xf;
min = (pvr >> 0) & 0xf; min = (pvr >> 0) & 0xf;
break; break;
@ -438,7 +444,7 @@ cpu_6xx_print_cacheinfo(u_int cpuid, uint16_t vers)
} }
static void static void
cpu_e500_setup(int cpuid, uint16_t vers) cpu_booke_setup(int cpuid, uint16_t vers)
{ {
register_t hid0; register_t hid0;
@ -453,7 +459,7 @@ cpu_e500_setup(int cpuid, uint16_t vers)
printf("cpu%d: HID0 %b\n", cpuid, (int)hid0, HID0_E500_BITMASK); printf("cpu%d: HID0 %b\n", cpuid, (int)hid0, HID0_E500_BITMASK);
if (cpu_idle_hook == NULL) if (cpu_idle_hook == NULL)
cpu_idle_hook = cpu_idle_e500; cpu_idle_hook = cpu_idle_booke;
} }
static void static void
@ -519,6 +525,7 @@ cpu_idle(int busy)
CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
busy, curcpu); busy, curcpu);
if (cpu_idle_hook != NULL) { if (cpu_idle_hook != NULL) {
if (!busy) { if (!busy) {
critical_enter(); critical_enter();
@ -530,6 +537,7 @@ cpu_idle(int busy)
critical_exit(); critical_exit();
} }
} }
CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
busy, curcpu); busy, curcpu);
} }
@ -576,7 +584,7 @@ cpu_idle_60x(void)
} }
static void static void
cpu_idle_e500(void) cpu_idle_booke(void)
{ {
register_t msr; register_t msr;