From 3062870897fe65fe202bc30fbe9864985df2e115 Mon Sep 17 00:00:00 2001 From: Conrad Meyer Date: Wed, 18 Nov 2015 22:20:13 +0000 Subject: [PATCH] ntb_hw: Add tunable to disable write-combining The tunable 'hw.ntb.enable_writecombine' may be set to zero to administratively disable write combining the mapped NTB region. Sponsored by: EMC / Isilon Storage Division --- sys/dev/ntb/ntb_hw/ntb_hw.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/sys/dev/ntb/ntb_hw/ntb_hw.c b/sys/dev/ntb/ntb_hw/ntb_hw.c index 740cb2b0b071..d0702f80e8ed 100644 --- a/sys/dev/ntb/ntb_hw/ntb_hw.c +++ b/sys/dev/ntb/ntb_hw/ntb_hw.c @@ -326,6 +326,10 @@ SYSCTL_UINT(_hw_ntb, OID_AUTO, debug_level, CTLFLAG_RWTUN, } \ } while (0) +static unsigned g_ntb_enable_wc = 1; +SYSCTL_UINT(_hw_ntb, OID_AUTO, enable_writecombine, CTLFLAG_RDTUN, + &g_ntb_enable_wc, 0, "Set to 1 to map memory windows write combining"); + static struct ntb_hw_info pci_ids[] = { /* XXX: PS/SS IDs left out until they are supported. */ { 0x0C4E8086, "BWD Atom Processor S1200 Non-Transparent Bridge B2B", @@ -766,10 +770,13 @@ map_memory_window_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar) save_bar_parameters(bar); } + print_map_success(ntb, bar, "mw"); + if (g_ntb_enable_wc == 0) + return (0); + /* Mark bar region as write combining to improve performance. */ rc = pmap_change_attr((vm_offset_t)bar->vbase, bar->size, VM_MEMATTR_WRITE_COMBINING); - print_map_success(ntb, bar, "mw"); if (rc == 0) device_printf(ntb->device, "Marked BAR%d v:[%p-%p] p:[%p-%p] as "