From 31318f0793044de2c9bb912e38abbd55c3b584a6 Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Thu, 23 Jun 2016 01:14:33 +0000 Subject: [PATCH] [BHND/bcma] Add implementation of BHND_BUS_RESET_CORE function for BCMA This patch addes missing implementation of BHND_BUS_RESET_CORE function for BCMA. The reset procedure is very simple: enable reset mode, stop clocking, enable clocking & force clock gating, disable reset mode, stop clock gating. Tested: * (michael) Tested on ASUS RT-N53 for enabling/reset USB core Submitted by: Michael Zhilin Approved by: re (gjb) --- sys/dev/bhnd/bcma/bcma.c | 29 +++++++++++++++++++++++++++-- sys/dev/bhnd/bhnd_core.h | 10 +++++++++- sys/dev/bhnd/bhndb/bhndb.c | 6 ++++-- 3 files changed, 40 insertions(+), 5 deletions(-) diff --git a/sys/dev/bhnd/bcma/bcma.c b/sys/dev/bhnd/bcma/bcma.c index b9bfbad5e411..932c64b36510 100644 --- a/sys/dev/bhnd/bcma/bcma.c +++ b/sys/dev/bhnd/bcma/bcma.c @@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$"); #include "bcma_eromreg.h" #include "bcma_eromvar.h" +#include int bcma_probe(device_t dev) @@ -218,9 +219,33 @@ bcma_reset_core(device_t dev, device_t child, uint16_t flags) if (dinfo->res_agent == NULL) return (ENODEV); - // TODO - perform reset + /* Start reset */ + bhnd_bus_write_4(dinfo->res_agent, BHND_RESET_CF, BHND_RESET_CF_ENABLE); + bhnd_bus_read_4(dinfo->res_agent, BHND_RESET_CF); + DELAY(10); - return (ENXIO); + /* Disable clock */ + bhnd_bus_write_4(dinfo->res_agent, BHND_CF, flags); + bhnd_bus_read_4(dinfo->res_agent, BHND_CF); + DELAY(10); + + /* Enable clocks & force clock gating */ + bhnd_bus_write_4(dinfo->res_agent, BHND_CF, BHND_CF_CLOCK_EN | + BHND_CF_FGC | flags); + bhnd_bus_read_4(dinfo->res_agent, BHND_CF); + DELAY(10); + + /* Complete reset */ + bhnd_bus_write_4(dinfo->res_agent, BHND_RESET_CF, 0); + bhnd_bus_read_4(dinfo->res_agent, BHND_RESET_CF); + DELAY(10); + + /* Release force clock gating */ + bhnd_bus_write_4(dinfo->res_agent, BHND_CF, BHND_CF_CLOCK_EN | flags); + bhnd_bus_read_4(dinfo->res_agent, BHND_CF); + DELAY(10); + + return (0); } static int diff --git a/sys/dev/bhnd/bhnd_core.h b/sys/dev/bhnd/bhnd_core.h index 9ea955ad1c97..f635a642b5d6 100644 --- a/sys/dev/bhnd/bhnd_core.h +++ b/sys/dev/bhnd/bhnd_core.h @@ -25,19 +25,27 @@ #define _BHND_BHND_CORE_H_ /* Common core control flags */ -#define BHND_CF_BIST_EN 0x8000 /**< ??? */ +#define BHND_CF 0x0408 +#define BHND_CF_BIST_EN 0x8000 /**< built-in self test */ #define BHND_CF_PME_EN 0x4000 /**< ??? */ #define BHND_CF_CORE_BITS 0x3ffc /**< core specific flag mask */ #define BHND_CF_FGC 0x0002 /**< force clock gating */ #define BHND_CF_CLOCK_EN 0x0001 /**< enable clock */ /* Common core status flags */ +#define BHND_SF 0x0500 #define BHND_SF_BIST_DONE 0x8000 /**< ??? */ #define BHND_SF_BIST_ERROR 0x4000 /**< ??? */ #define BHND_SF_GATED_CLK 0x2000 /**< clock gated */ #define BHND_SF_DMA64 0x1000 /**< supports 64-bit DMA */ #define BHND_SF_CORE_BITS 0x0fff /**< core-specific status mask */ +/*Reset core control flags */ +#define BHND_RESET_CF 0x0800 +#define BHND_RESET_CF_ENABLE 0x0001 + +#define BHND_RESET_SF 0x0804 + /* * A register that is common to all cores to * communicate w/PMU regarding clock control. diff --git a/sys/dev/bhnd/bhndb/bhndb.c b/sys/dev/bhnd/bhndb/bhndb.c index 7668dca57988..f969943ddf3b 100644 --- a/sys/dev/bhnd/bhndb/bhndb.c +++ b/sys/dev/bhnd/bhndb/bhndb.c @@ -62,7 +62,7 @@ __FBSDID("$FreeBSD$"); #include "bhndb_private.h" /* Debugging flags */ -static u_long bhndb_debug = 0; +static u_long bhndb_debug = -1; TUNABLE_ULONG("hw.bhndb.debug", &bhndb_debug); enum { @@ -596,8 +596,10 @@ bhndb_generic_init_full_config(device_t dev, device_t child, hostb = NULL; /* Fetch the full set of bhnd-attached cores */ - if ((error = device_get_children(sc->bus_dev, &devs, &ndevs))) + if ((error = device_get_children(sc->bus_dev, &devs, &ndevs))) { + device_printf(sc->dev, "unable to get children\n"); return (error); + } /* Find our host bridge device */ hostb = BHNDB_FIND_HOSTB_DEVICE(dev, child);