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bhyve: add wrapper for debug printf statements

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Add printf() wrapper to use CR/CRLF terminators depending on whether
stdio is mapped to a tty open in raw mode.
Try to use the wrapper everywhere.
For now we leave the custom DPRINTF/WPRINTF defined by device
models, but we may remove them in the future.

Reviewed by:	grehan, jhb
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D22657
This commit is contained in:
Vincenzo Maffione 2020-01-08 22:55:22 +00:00
parent a5910414d4
commit 332eff95e3
34 changed files with 667 additions and 588 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
usr.sbin/bhyve/audio.c
View File

@ -92,7 +92,7 @@ audio_init(const char *dev_name, uint8_t dir)
if (strlen(dev_name) < sizeof(aud->dev_name))
memcpy(aud->dev_name, dev_name, strlen(dev_name) + 1);
else {
DPRINTF("dev_name too big\n\r");
DPRINTF("dev_name too big");
free(aud);
return NULL;
}
@ -101,7 +101,7 @@ audio_init(const char *dev_name, uint8_t dir)
aud->fd = open(aud->dev_name, aud->dir ? O_WRONLY : O_RDONLY, 0);
if (aud->fd == -1) {
DPRINTF("Failed to open dev: %s, errno: %d\n\r",
DPRINTF("Failed to open dev: %s, errno: %d",
aud->dev_name, errno);
free(aud);
return (NULL);
@ -137,7 +137,7 @@ audio_set_params(struct audio *aud, struct audio_params *params)
assert(params);
if ((audio_fd = aud->fd) < 0) {
DPRINTF("Incorrect audio device descriptor for %s\n\r",
DPRINTF("Incorrect audio device descriptor for %s",
aud->dev_name);
return (-1);
}
@ -146,7 +146,7 @@ audio_set_params(struct audio *aud, struct audio_params *params)
if (aud->inited) {
err = ioctl(audio_fd, SNDCTL_DSP_RESET, NULL);
if (err == -1) {
DPRINTF("Failed to reset fd: %d, errno: %d\n\r",
DPRINTF("Failed to reset fd: %d, errno: %d",
aud->fd, errno);
return (-1);
}
@ -157,14 +157,14 @@ audio_set_params(struct audio *aud, struct audio_params *params)
format = params->format;
err = ioctl(audio_fd, SNDCTL_DSP_SETFMT, &format);
if (err == -1) {
DPRINTF("Fail to set fmt: 0x%x errno: %d\n\r",
DPRINTF("Fail to set fmt: 0x%x errno: %d",
params->format, errno);
return -1;
}
/* The device does not support the requested audio format */
if (format != params->format) {
DPRINTF("Mismatch format: 0x%x params->format: 0x%x\n\r",
DPRINTF("Mismatch format: 0x%x params->format: 0x%x",
format, params->format);
return -1;
}
@ -173,14 +173,14 @@ audio_set_params(struct audio *aud, struct audio_params *params)
channels = params->channels;
err = ioctl(audio_fd, SNDCTL_DSP_CHANNELS, &channels);
if (err == -1) {
DPRINTF("Fail to set channels: %d errno: %d\n\r",
DPRINTF("Fail to set channels: %d errno: %d",
params->channels, errno);
return -1;
}
/* The device does not support the requested no. of channels */
if (channels != params->channels) {
DPRINTF("Mismatch channels: %d params->channels: %d\n\r",
DPRINTF("Mismatch channels: %d params->channels: %d",
channels, params->channels);
return -1;
}
@ -189,14 +189,14 @@ audio_set_params(struct audio *aud, struct audio_params *params)
rate = params->rate;
err = ioctl(audio_fd, SNDCTL_DSP_SPEED, &rate);
if (err == -1) {
DPRINTF("Fail to set speed: %d errno: %d\n\r",
DPRINTF("Fail to set speed: %d errno: %d",
params->rate, errno);
return -1;
}
/* The device does not support the requested rate / speed */
if (rate != params->rate) {
DPRINTF("Mismatch rate: %d params->rate: %d\n\r",
DPRINTF("Mismatch rate: %d params->rate: %d",
rate, params->rate);
return -1;
}
@ -205,10 +205,10 @@ audio_set_params(struct audio *aud, struct audio_params *params)
err = ioctl(audio_fd, aud->dir ? SNDCTL_DSP_GETOSPACE :
SNDCTL_DSP_GETISPACE, &info);
if (err == -1) {
DPRINTF("Fail to get audio buf info errno: %d\n\r", errno);
DPRINTF("Fail to get audio buf info errno: %d", errno);
return -1;
}
DPRINTF("fragstotal: 0x%x fragsize: 0x%x\n\r",
DPRINTF("fragstotal: 0x%x fragsize: 0x%x",
info.fragstotal, info.fragsize);
#endif
return 0;
@ -237,7 +237,7 @@ audio_playback(struct audio *aud, const void *buf, size_t count)
while (total < count) {
len = write(audio_fd, buf + total, count - total);
if (len == -1) {
DPRINTF("Fail to write to fd: %d, errno: %d\n\r",
DPRINTF("Fail to write to fd: %d, errno: %d",
audio_fd, errno);
return -1;
}
@ -273,7 +273,7 @@ audio_record(struct audio *aud, void *buf, size_t count)
while (total < count) {
len = read(audio_fd, buf + total, count - total);
if (len == -1) {
DPRINTF("Fail to write to fd: %d, errno: %d\n\r",
DPRINTF("Fail to write to fd: %d, errno: %d",
audio_fd, errno);
return -1;
}

2
usr.sbin/bhyve/bhyverun.c
View File

@ -167,6 +167,8 @@ uint16_t cores, maxcpus, sockets, threads;
char *guest_uuid_str;
int raw_stdio = 0;
static int gdb_port = 0;
static int guest_vmexit_on_hlt, guest_vmexit_on_pause;
static int virtio_msix = 1;

9
usr.sbin/bhyve/block_if.c
View File

@ -59,6 +59,7 @@ __FBSDID("$FreeBSD$");
#include <machine/atomic.h>
#include "bhyverun.h"
#include "debug.h"
#include "mevent.h"
#include "block_if.h"
@ -442,7 +443,7 @@ blockif_open(const char *optstr, const char *ident)
else if (sscanf(cp, "sectorsize=%d", &ssopt) == 1)
pssopt = ssopt;
else {
fprintf(stderr, "Invalid device option \"%s\"\n", cp);
EPRINTLN("Invalid device option \"%s\"", cp);
goto err;
}
}
@ -514,7 +515,7 @@ blockif_open(const char *optstr, const char *ident)
if (ssopt != 0) {
if (!powerof2(ssopt) || !powerof2(pssopt) || ssopt < 512 ||
ssopt > pssopt) {
fprintf(stderr, "Invalid sector size %d/%d\n",
EPRINTLN("Invalid sector size %d/%d",
ssopt, pssopt);
goto err;
}
@ -528,8 +529,8 @@ blockif_open(const char *optstr, const char *ident)
*/
if (S_ISCHR(sbuf.st_mode)) {
if (ssopt < sectsz || (ssopt % sectsz) != 0) {
fprintf(stderr, "Sector size %d incompatible "
"with underlying device sector size %d\n",
EPRINTLN("Sector size %d incompatible "
"with underlying device sector size %d",
ssopt, sectsz);
goto err;
}

15
usr.sbin/bhyve/bootrom.c
View File

@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$");
#include <vmmapi.h>
#include "bhyverun.h"
#include "bootrom.h"
#include "debug.h"
#define MAX_BOOTROM_SIZE (16 * 1024 * 1024) /* 16 MB */
@ -60,13 +61,13 @@ bootrom_init(struct vmctx *ctx, const char *romfile)
rv = -1;
fd = open(romfile, O_RDONLY);
if (fd < 0) {
fprintf(stderr, "Error opening bootrom \"%s\": %s\n",
EPRINTLN("Error opening bootrom \"%s\": %s",
romfile, strerror(errno));
goto done;
}
if (fstat(fd, &sbuf) < 0) {
fprintf(stderr, "Could not fstat bootrom file \"%s\": %s\n",
EPRINTLN("Could not fstat bootrom file \"%s\": %s",
romfile, strerror(errno));
goto done;
}
@ -76,13 +77,13 @@ bootrom_init(struct vmctx *ctx, const char *romfile)
* MMIO space (e.g. APIC, HPET, MSI).
*/
if (sbuf.st_size > MAX_BOOTROM_SIZE || sbuf.st_size < PAGE_SIZE) {
fprintf(stderr, "Invalid bootrom size %ld\n", sbuf.st_size);
EPRINTLN("Invalid bootrom size %ld", sbuf.st_size);
goto done;
}
if (sbuf.st_size & PAGE_MASK) {
fprintf(stderr, "Bootrom size %ld is not a multiple of the "
"page size\n", sbuf.st_size);
EPRINTLN("Bootrom size %ld is not a multiple of the "
"page size", sbuf.st_size);
goto done;
}
@ -100,8 +101,8 @@ bootrom_init(struct vmctx *ctx, const char *romfile)
for (i = 0; i < sbuf.st_size / PAGE_SIZE; i++) {
rlen = read(fd, ptr + i * PAGE_SIZE, PAGE_SIZE);
if (rlen != PAGE_SIZE) {
fprintf(stderr, "Incomplete read of page %d of bootrom "
"file %s: %ld bytes\n", i, romfile, rlen);
EPRINTLN("Incomplete read of page %d of bootrom "
"file %s: %ld bytes", i, romfile, rlen);
goto done;
}
}

2
usr.sbin/bhyve/consport.c
View File

@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$");
#include "inout.h"
#include "pci_lpc.h"
#include "debug.h"
#define BVM_CONSOLE_PORT 0x220
#define BVM_CONS_SIG ('b' << 8 | 'v')
@ -70,6 +71,7 @@ ttyopen(void)
cfmakeraw(&tio_new);
tcsetattr(STDIN_FILENO, TCSANOW, &tio_new);
raw_stdio = 1;
atexit(ttyclose);
}

47
usr.sbin/bhyve/debug.h Normal file
View File

@ -0,0 +1,47 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2019 Vincenzo Maffione <vmaffione@freebsd.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _DEBUG_H_
#define _DEBUG_H_
extern int raw_stdio;
#define FPRINTLN(filep, fmt, arg...) \
do { \
if (raw_stdio) \
fprintf(filep, fmt "\r\n", ##arg); \
else \
fprintf(filep, fmt "\n", ##arg); \
} while (0)
#define PRINTLN(fmt, arg...) FPRINTLN(stdout, fmt, ##arg)
#define EPRINTLN(fmt, arg...) FPRINTLN(stderr, fmt, ##arg)
#endif

44
usr.sbin/bhyve/hda_codec.c
View File

@ -400,7 +400,7 @@ hda_codec_init(struct hda_codec_inst *hci, const char *play,
if (!(play || rec))
return (-1);
DPRINTF("cad: 0x%x opts: %s\n\r", hci->cad, opts);
DPRINTF("cad: 0x%x opts: %s", hci->cad, opts);
sc = calloc(1, sizeof(*sc));
if (!sc)
@ -420,7 +420,7 @@ hda_codec_init(struct hda_codec_inst *hci, const char *play,
sc->conf_default = hda_codec_conf_default;
sc->pin_ctrl_default = hda_codec_pin_ctrl_default;
sc->verb_handlers = hda_codec_verb_handlers;
DPRINTF("HDA Codec nodes: %d\n\r", sc->no_nodes);
DPRINTF("HDA Codec nodes: %d", sc->no_nodes);
/*
* Initialize the Audio Output stream
@ -435,7 +435,7 @@ hda_codec_init(struct hda_codec_inst *hci, const char *play,
st->aud = audio_init(play, 1);
if (!st->aud) {
DPRINTF("Fail to init the output audio player\n\r");
DPRINTF("Fail to init the output audio player");
return (-1);
}
}
@ -453,7 +453,7 @@ hda_codec_init(struct hda_codec_inst *hci, const char *play,
st->aud = audio_init(rec, 0);
if (!st->aud) {
DPRINTF("Fail to init the input audio player\n\r");
DPRINTF("Fail to init the input audio player");
return (-1);
}
}
@ -488,11 +488,11 @@ hda_codec_reset(struct hda_codec_inst *hci)
st->right_mute = HDA_CODEC_SET_AMP_GAIN_MUTE_MUTE;
}
DPRINTF("cad: 0x%x\n\r", hci->cad);
DPRINTF("cad: 0x%x", hci->cad);
if (!hops->signal) {
DPRINTF("The controller ops does not implement \
the signal function\n\r");
the signal function");
return (-1);
}
@ -538,7 +538,7 @@ hda_codec_command(struct hda_codec_inst *hci, uint32_t cmd_data)
if (!hops->response) {
DPRINTF("The controller ops does not implement \
the response function\n\r");
the response function");
return (-1);
}
@ -566,11 +566,11 @@ hda_codec_command(struct hda_codec_inst *hci, uint32_t cmd_data)
if (sc->verb_handlers[nid])
res = sc->verb_handlers[nid](sc, verb, payload);
else
DPRINTF("Unknown VERB: 0x%x\n\r", verb);
DPRINTF("Unknown VERB: 0x%x", verb);
break;
}
DPRINTF("cad: 0x%x nid: 0x%x verb: 0x%x payload: 0x%x response: 0x%x\n\r",
DPRINTF("cad: 0x%x nid: 0x%x verb: 0x%x payload: 0x%x response: 0x%x",
cad, nid, verb, payload, res);
return (hops->response(hci, res, HDA_CODEC_RESPONSE_EX_SOL));
@ -595,11 +595,11 @@ hda_codec_notify(struct hda_codec_inst *hci, uint8_t run,
i = dir ? HDA_CODEC_STREAM_OUTPUT : HDA_CODEC_STREAM_INPUT;
st = &sc->streams[i];
DPRINTF("run: %d, stream: 0x%x, st->stream: 0x%x dir: %d\n\r",
DPRINTF("run: %d, stream: 0x%x, st->stream: 0x%x dir: %d",
run, stream, st->stream, dir);
if (stream != st->stream) {
DPRINTF("Stream not found\n\r");
DPRINTF("Stream not found");
return (0);
}
@ -653,7 +653,7 @@ hda_codec_parse_format(uint16_t fmt, struct audio_params *params)
params->format = AFMT_S32_LE;
break;
default:
DPRINTF("Unknown format bits: 0x%x\n\r",
DPRINTF("Unknown format bits: 0x%x",
fmt & HDA_CODEC_FMT_BITS_MASK);
return (-1);
}
@ -719,7 +719,7 @@ hda_codec_audio_output_do_setup(void *arg)
if (err)
return (-1);
DPRINTF("rate: %d, channels: %d, format: 0x%x\n\r",
DPRINTF("rate: %d, channels: %d, format: 0x%x",
params.rate, params.channels, params.format);
return (audio_set_params(aud, &params));
@ -778,7 +778,7 @@ hda_codec_audio_input_do_setup(void *arg)
if (err)
return (-1);
DPRINTF("rate: %d, channels: %d, format: 0x%x\n\r",
DPRINTF("rate: %d, channels: %d, format: 0x%x",
params.rate, params.channels, params.format);
return (audio_set_params(aud, &params));
@ -792,7 +792,7 @@ hda_codec_audio_inout_nid(struct hda_codec_stream *st, uint16_t verb,
uint8_t mute = 0;
uint8_t gain = 0;
DPRINTF("%s verb: 0x%x, payload, 0x%x\n\r", st->actx.name, verb, payload);
DPRINTF("%s verb: 0x%x, payload, 0x%x", st->actx.name, verb, payload);
switch (verb) {
case HDA_CMD_VERB_GET_CONV_FMT:
@ -804,10 +804,10 @@ hda_codec_audio_inout_nid(struct hda_codec_stream *st, uint16_t verb,
case HDA_CMD_VERB_GET_AMP_GAIN_MUTE:
if (payload & HDA_CMD_GET_AMP_GAIN_MUTE_LEFT) {
res = st->left_gain | st->left_mute;
DPRINTF("GET_AMP_GAIN_MUTE_LEFT: 0x%x\n\r", res);
DPRINTF("GET_AMP_GAIN_MUTE_LEFT: 0x%x", res);
} else {
res = st->right_gain | st->right_mute;
DPRINTF("GET_AMP_GAIN_MUTE_RIGHT: 0x%x\n\r", res);
DPRINTF("GET_AMP_GAIN_MUTE_RIGHT: 0x%x", res);
}
break;
case HDA_CMD_VERB_SET_AMP_GAIN_MUTE:
@ -818,14 +818,14 @@ hda_codec_audio_inout_nid(struct hda_codec_stream *st, uint16_t verb,
st->left_mute = mute;
st->left_gain = gain;
DPRINTF("SET_AMP_GAIN_MUTE_LEFT: \
mute: 0x%x gain: 0x%x\n\r", mute, gain);
mute: 0x%x gain: 0x%x", mute, gain);
}
if (payload & HDA_CMD_SET_AMP_GAIN_MUTE_RIGHT) {
st->right_mute = mute;
st->right_gain = gain;
DPRINTF("SET_AMP_GAIN_MUTE_RIGHT: \
mute: 0x%x gain: 0x%x\n\r", mute, gain);
mute: 0x%x gain: 0x%x", mute, gain);
}
break;
case HDA_CMD_VERB_GET_CONV_STREAM_CHAN:
@ -834,13 +834,13 @@ hda_codec_audio_inout_nid(struct hda_codec_stream *st, uint16_t verb,
case HDA_CMD_VERB_SET_CONV_STREAM_CHAN:
st->channel = payload & 0x0f;
st->stream = (payload >> 4) & 0x0f;
DPRINTF("st->channel: 0x%x st->stream: 0x%x\n\r",
DPRINTF("st->channel: 0x%x st->stream: 0x%x",
st->channel, st->stream);
if (!st->stream)
hda_audio_ctxt_stop(&st->actx);
break;
default:
DPRINTF("Unknown VERB: 0x%x\n\r", verb);
DPRINTF("Unknown VERB: 0x%x", verb);
break;
}
@ -867,7 +867,7 @@ hda_audio_ctxt_thr(void *arg)
{
struct hda_audio_ctxt *actx = arg;
DPRINTF("Start Thread: %s\n\r", actx->name);
DPRINTF("Start Thread: %s", actx->name);
pthread_mutex_lock(&actx->mtx);
while (1) {

11
usr.sbin/bhyve/mptbl.c
View File

@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$");
#include <string.h>
#include "acpi.h"
#include "debug.h"
#include "bhyverun.h"
#include "mptbl.h"
#include "pci_emul.h"
@ -312,7 +313,7 @@ mptable_build(struct vmctx *ctx, int ncpu)
startaddr = paddr_guest2host(ctx, MPTABLE_BASE, MPTABLE_MAX_LENGTH);
if (startaddr == NULL) {
fprintf(stderr, "mptable requires mapped mem\n");
EPRINTLN("mptable requires mapped mem");
return (ENOMEM);
}
@ -323,10 +324,10 @@ mptable_build(struct vmctx *ctx, int ncpu)
*/
for (bus = 1; bus <= PCI_BUSMAX; bus++) {
if (pci_bus_configured(bus)) {
fprintf(stderr, "MPtable is incompatible with "
"multiple PCI hierarchies.\r\n");
fprintf(stderr, "MPtable generation can be disabled "
"by passing the -Y option to bhyve(8).\r\n");
EPRINTLN("MPtable is incompatible with "
"multiple PCI hierarchies.");
EPRINTLN("MPtable generation can be disabled "
"by passing the -Y option to bhyve(8).");
return (EINVAL);
}
}

23
usr.sbin/bhyve/net_backends.c
View File

@ -70,6 +70,7 @@ __FBSDID("$FreeBSD$");
#include <assert.h>
#include "debug.h"
#include "iov.h"
#include "mevent.h"
#include "net_backends.h"
@ -156,7 +157,7 @@ SET_DECLARE(net_backend_set, struct net_backend);
#define VNET_HDR_LEN sizeof(struct virtio_net_rxhdr)
#define WPRINTF(params) printf params
#define WPRINTF(params) PRINTLN params
/*
* The tap backend
@ -192,7 +193,7 @@ tap_init(struct net_backend *be, const char *devname,
#endif
if (cb == NULL) {
WPRINTF(("TAP backend requires non-NULL callback\n\r"));
WPRINTF(("TAP backend requires non-NULL callback"));
return (-1);
}
@ -201,7 +202,7 @@ tap_init(struct net_backend *be, const char *devname,
be->fd = open(tbuf, O_RDWR);
if (be->fd == -1) {
WPRINTF(("open of tap device %s failed\n\r", tbuf));
WPRINTF(("open of tap device %s failed", tbuf));
goto error;
}
@ -210,7 +211,7 @@ tap_init(struct net_backend *be, const char *devname,
* notifications with the event loop
*/
if (ioctl(be->fd, FIONBIO, &opt) < 0) {
WPRINTF(("tap device O_NONBLOCK failed\n\r"));
WPRINTF(("tap device O_NONBLOCK failed"));
goto error;
}
@ -222,7 +223,7 @@ tap_init(struct net_backend *be, const char *devname,
priv->mevp = mevent_add_disabled(be->fd, EVF_READ, cb, param);
if (priv->mevp == NULL) {
WPRINTF(("Could not register event\n\r"));
WPRINTF(("Could not register event"));
goto error;
}
@ -363,7 +364,7 @@ netmap_set_vnet_hdr_len(struct net_backend *be, int vnet_hdr_len)
req.nr_arg1 = vnet_hdr_len;
err = ioctl(be->fd, NIOCREGIF, &req);
if (err) {
WPRINTF(("Unable to set vnet header length %d\n\r",
WPRINTF(("Unable to set vnet header length %d",
vnet_hdr_len));
return (err);
}
@ -420,7 +421,7 @@ netmap_init(struct net_backend *be, const char *devname,
priv->nmd = nm_open(priv->ifname, NULL, NETMAP_NO_TX_POLL, NULL);
if (priv->nmd == NULL) {
WPRINTF(("Unable to nm_open(): interface '%s', errno (%s)\n\r",
WPRINTF(("Unable to nm_open(): interface '%s', errno (%s)",
devname, strerror(errno)));
free(priv);
return (-1);
@ -435,7 +436,7 @@ netmap_init(struct net_backend *be, const char *devname,
priv->mevp = mevent_add_disabled(be->fd, EVF_READ, cb, param);
if (priv->mevp == NULL) {
WPRINTF(("Could not register event\n\r"));
WPRINTF(("Could not register event"));
return (-1);
}
@ -472,7 +473,7 @@ netmap_send(struct net_backend *be, struct iovec *iov,
ring = priv->tx;
head = ring->head;
if (head == ring->tail) {
WPRINTF(("No space, drop %zu bytes\n\r", count_iov(iov, iovcnt)));
WPRINTF(("No space, drop %zu bytes", count_iov(iov, iovcnt)));
goto txsync;
}
nm_buf = NETMAP_BUF(ring, ring->slot[head].buf_idx);
@ -513,7 +514,7 @@ netmap_send(struct net_backend *be, struct iovec *iov,
* We ran out of netmap slots while
* splitting the iovec fragments.
*/
WPRINTF(("No space, drop %zu bytes\n\r",
WPRINTF(("No space, drop %zu bytes",
count_iov(iov, iovcnt)));
goto txsync;
}
@ -585,7 +586,7 @@ netmap_recv(struct net_backend *be, struct iovec *iov, int iovcnt)
iovcnt--;
if (iovcnt == 0) {
/* No space to receive. */
WPRINTF(("Short iov, drop %zd bytes\n\r",
WPRINTF(("Short iov, drop %zd bytes",
totlen));
return (-ENOSPC);
}

3
usr.sbin/bhyve/net_utils.c
View File

@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$");
#include <string.h>
#include "bhyverun.h"
#include "debug.h"
#include "net_utils.h"
int
@ -53,7 +54,7 @@ net_parsemac(char *mac_str, uint8_t *mac_addr)
if (ea == NULL || ETHER_IS_MULTICAST(ea->octet) ||
memcmp(ea->octet, zero_addr, ETHER_ADDR_LEN) == 0) {
fprintf(stderr, "Invalid MAC %s\n", mac_str);
EPRINTLN("Invalid MAC %s", mac_str);
return (EINVAL);
} else
memcpy(mac_addr, ea->octet, ETHER_ADDR_LEN);

44
usr.sbin/bhyve/pci_ahci.c
View File

@ -240,7 +240,7 @@ ahci_generate_intr(struct pci_ahci_softc *sc, uint32_t mask)
if (p->is & p->ie)
sc->is |= (1 << i);
}
DPRINTF("%s(%08x) %08x\n\r", __func__, mask, sc->is);
DPRINTF("%s(%08x) %08x", __func__, mask, sc->is);
/* If there is nothing enabled -- clear legacy interrupt and exit. */
if (sc->is == 0 || (sc->ghc & AHCI_GHC_IE) == 0) {
@ -282,7 +282,7 @@ ahci_port_intr(struct ahci_port *p)
struct pci_devinst *pi = sc->asc_pi;
int nmsg;
DPRINTF("%s(%d) %08x/%08x %08x\n\r", __func__,
DPRINTF("%s(%d) %08x/%08x %08x", __func__,
p->port, p->is, p->ie, sc->is);
/* If there is nothing enabled -- we are done. */
@ -341,7 +341,7 @@ ahci_write_fis(struct ahci_port *p, enum sata_fis_type ft, uint8_t *fis)
irq = (fis[1] & (1 << 6)) ? AHCI_P_IX_PS : 0;
break;
default:
WPRINTF("unsupported fis type %d\n\r", ft);
WPRINTF("unsupported fis type %d", ft);
return;
}
if (fis[2] & ATA_S_ERROR) {
@ -1601,7 +1601,7 @@ handle_packet_cmd(struct ahci_port *p, int slot, uint8_t *cfis)
DPRINTF("ACMD:");
for (i = 0; i < 16; i++)
DPRINTF("%02x ", acmd[i]);
DPRINTF("\n\r");
DPRINTF("");
}
#endif
@ -1788,7 +1788,7 @@ ahci_handle_cmd(struct ahci_port *p, int slot, uint8_t *cfis)
handle_packet_cmd(p, slot, cfis);
break;
default:
WPRINTF("Unsupported cmd:%02x\n\r", cfis[2]);
WPRINTF("Unsupported cmd:%02x", cfis[2]);
ahci_write_fis_d2h(p, slot, cfis,
(ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR);
break;
@ -1818,22 +1818,22 @@ ahci_handle_slot(struct ahci_port *p, int slot)
#ifdef AHCI_DEBUG
prdt = (struct ahci_prdt_entry *)(cfis + 0x80);
DPRINTF("\n\rcfis:");
DPRINTF("cfis:");
for (i = 0; i < cfl; i++) {
if (i % 10 == 0)
DPRINTF("\n\r");
DPRINTF("");
DPRINTF("%02x ", cfis[i]);
}
DPRINTF("\n\r");
DPRINTF("");
for (i = 0; i < hdr->prdtl; i++) {
DPRINTF("%d@%08"PRIx64"\n\r", prdt->dbc & 0x3fffff, prdt->dba);
DPRINTF("%d@%08"PRIx64"", prdt->dbc & 0x3fffff, prdt->dba);
prdt++;
}
#endif
if (cfis[0] != FIS_TYPE_REGH2D) {
WPRINTF("Not a H2D FIS:%02x\n\r", cfis[0]);
WPRINTF("Not a H2D FIS:%02x", cfis[0]);
return;
}
@ -1889,7 +1889,7 @@ ata_ioreq_cb(struct blockif_req *br, int err)
uint8_t *cfis;
int slot, ncq, dsm;
DPRINTF("%s %d\n\r", __func__, err);
DPRINTF("%s %d", __func__, err);
ncq = dsm = 0;
aior = br->br_param;
@ -1949,7 +1949,7 @@ ata_ioreq_cb(struct blockif_req *br, int err)
ahci_handle_port(p);
out:
pthread_mutex_unlock(&sc->mtx);
DPRINTF("%s exit\n\r", __func__);
DPRINTF("%s exit", __func__);
}
static void
@ -1963,7 +1963,7 @@ atapi_ioreq_cb(struct blockif_req *br, int err)
uint32_t tfd;
int slot;
DPRINTF("%s %d\n\r", __func__, err);
DPRINTF("%s %d", __func__, err);
aior = br->br_param;
p = aior->io_pr;
@ -2011,7 +2011,7 @@ atapi_ioreq_cb(struct blockif_req *br, int err)
ahci_handle_port(p);
out:
pthread_mutex_unlock(&sc->mtx);
DPRINTF("%s exit\n\r", __func__);
DPRINTF("%s exit", __func__);
}
static void
@ -2048,7 +2048,7 @@ pci_ahci_port_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value)
offset = (offset - AHCI_OFFSET) % AHCI_STEP;
struct ahci_port *p = &sc->port[port];
DPRINTF("pci_ahci_port %d: write offset 0x%"PRIx64" value 0x%"PRIx64"\n\r",
DPRINTF("pci_ahci_port %d: write offset 0x%"PRIx64" value 0x%"PRIx64"",
port, offset, value);
switch (offset) {
@ -2120,7 +2120,7 @@ pci_ahci_port_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value)
case AHCI_P_TFD:
case AHCI_P_SIG:
case AHCI_P_SSTS:
WPRINTF("pci_ahci_port: read only registers 0x%"PRIx64"\n\r", offset);
WPRINTF("pci_ahci_port: read only registers 0x%"PRIx64"", offset);
break;
case AHCI_P_SCTL:
p->sctl = value;
@ -2149,7 +2149,7 @@ pci_ahci_port_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value)
static void
pci_ahci_host_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value)
{
DPRINTF("pci_ahci_host: write offset 0x%"PRIx64" value 0x%"PRIx64"\n\r",
DPRINTF("pci_ahci_host: write offset 0x%"PRIx64" value 0x%"PRIx64"",
offset, value);
switch (offset) {
@ -2157,7 +2157,7 @@ pci_ahci_host_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value)
case AHCI_PI:
case AHCI_VS:
case AHCI_CAP2:
DPRINTF("pci_ahci_host: read only registers 0x%"PRIx64"\n\r", offset);
DPRINTF("pci_ahci_host: read only registers 0x%"PRIx64"", offset);
break;
case AHCI_GHC:
if (value & AHCI_GHC_HR) {
@ -2195,7 +2195,7 @@ pci_ahci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
else if (offset < AHCI_OFFSET + sc->ports * AHCI_STEP)
pci_ahci_port_write(sc, offset, value);
else
WPRINTF("pci_ahci: unknown i/o write offset 0x%"PRIx64"\n\r", offset);
WPRINTF("pci_ahci: unknown i/o write offset 0x%"PRIx64"", offset);
pthread_mutex_unlock(&sc->mtx);
}
@ -2226,7 +2226,7 @@ pci_ahci_host_read(struct pci_ahci_softc *sc, uint64_t offset)
value = 0;
break;
}
DPRINTF("pci_ahci_host: read offset 0x%"PRIx64" value 0x%x\n\r",
DPRINTF("pci_ahci_host: read offset 0x%"PRIx64" value 0x%x",
offset, value);
return (value);
@ -2267,7 +2267,7 @@ pci_ahci_port_read(struct pci_ahci_softc *sc, uint64_t offset)
break;
}
DPRINTF("pci_ahci_port %d: read offset 0x%"PRIx64" value 0x%x\n\r",
DPRINTF("pci_ahci_port %d: read offset 0x%"PRIx64" value 0x%x",
port, offset, value);
return value;
@ -2294,7 +2294,7 @@ pci_ahci_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
value = pci_ahci_port_read(sc, offset);
else {
value = 0;
WPRINTF("pci_ahci: unknown i/o read offset 0x%"PRIx64"\n\r",
WPRINTF("pci_ahci: unknown i/o read offset 0x%"PRIx64"",
regoff);
}
value >>= 8 * (regoff & 0x3);

157
usr.sbin/bhyve/pci_e82545.c
View File

@ -63,6 +63,7 @@ __FBSDID("$FreeBSD$");
#include "mii.h"
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "mevent.h"
#include "net_utils.h"
@ -229,8 +230,8 @@ struct ck_info {
* Debug printf
*/
static int e82545_debug = 0;
#define DPRINTF(msg,params...) if (e82545_debug) fprintf(stderr, "e82545: " msg, params)
#define WPRINTF(msg,params...) fprintf(stderr, "e82545: " msg, params)
#define WPRINTF(msg,params...) PRINTLN("e82545: " msg, params)
#define DPRINTF(msg,params...) if (e82545_debug) WPRINTF(msg, params)
#define MIN(a,b) (((a)<(b))?(a):(b))
#define MAX(a,b) (((a)>(b))?(a):(b))
@ -399,21 +400,21 @@ e82545_init_eeprom(struct e82545_softc *sc)
}
checksum = NVM_SUM - checksum;
sc->eeprom_data[NVM_CHECKSUM_REG] = checksum;
DPRINTF("eeprom checksum: 0x%x\r\n", checksum);
DPRINTF("eeprom checksum: 0x%x", checksum);
}
static void
e82545_write_mdi(struct e82545_softc *sc, uint8_t reg_addr,
uint8_t phy_addr, uint32_t data)
{
DPRINTF("Write mdi reg:0x%x phy:0x%x data: 0x%x\r\n", reg_addr, phy_addr, data);
DPRINTF("Write mdi reg:0x%x phy:0x%x data: 0x%x", reg_addr, phy_addr, data);
}
static uint32_t
e82545_read_mdi(struct e82545_softc *sc, uint8_t reg_addr,
uint8_t phy_addr)
{
//DPRINTF("Read mdi reg:0x%x phy:0x%x\r\n", reg_addr, phy_addr);
//DPRINTF("Read mdi reg:0x%x phy:0x%x", reg_addr, phy_addr);
switch (reg_addr) {
case PHY_STATUS:
return (MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS |
@ -430,7 +431,7 @@ e82545_read_mdi(struct e82545_softc *sc, uint8_t reg_addr,
case PHY_ID2:
return (M88E1011_I_PHY_ID | E82545_REVISION_4) & 0xFFFF;
default:
DPRINTF("Unknown mdi read reg:0x%x phy:0x%x\r\n", reg_addr, phy_addr);
DPRINTF("Unknown mdi read reg:0x%x phy:0x%x", reg_addr, phy_addr);
return 0;
}
/* not reached */
@ -442,13 +443,13 @@ e82545_eecd_strobe(struct e82545_softc *sc)
/* Microwire state machine */
/*
DPRINTF("eeprom state machine srtobe "
"0x%x 0x%x 0x%x 0x%x\r\n",
"0x%x 0x%x 0x%x 0x%x",
sc->nvm_mode, sc->nvm_bits,
sc->nvm_opaddr, sc->nvm_data);*/
if (sc->nvm_bits == 0) {
DPRINTF("eeprom state machine not expecting data! "
"0x%x 0x%x 0x%x 0x%x\r\n",
"0x%x 0x%x 0x%x 0x%x",
sc->nvm_mode, sc->nvm_bits,
sc->nvm_opaddr, sc->nvm_data);
return;
@ -479,13 +480,13 @@ e82545_eecd_strobe(struct e82545_softc *sc)
uint16_t op = sc->nvm_opaddr & E82545_NVM_OPCODE_MASK;
uint16_t addr = sc->nvm_opaddr & E82545_NVM_ADDR_MASK;
if (op != E82545_NVM_OPCODE_WRITE) {
DPRINTF("Illegal eeprom write op 0x%x\r\n",
DPRINTF("Illegal eeprom write op 0x%x",
sc->nvm_opaddr);
} else if (addr >= E82545_NVM_EEPROM_SIZE) {
DPRINTF("Illegal eeprom write addr 0x%x\r\n",
DPRINTF("Illegal eeprom write addr 0x%x",
sc->nvm_opaddr);
} else {
DPRINTF("eeprom write eeprom[0x%x] = 0x%x\r\n",
DPRINTF("eeprom write eeprom[0x%x] = 0x%x",
addr, sc->nvm_data);
sc->eeprom_data[addr] = sc->nvm_data;
}
@ -503,7 +504,7 @@ e82545_eecd_strobe(struct e82545_softc *sc)
uint16_t op = sc->nvm_opaddr & E82545_NVM_OPCODE_MASK;
switch (op) {
case E82545_NVM_OPCODE_EWEN:
DPRINTF("eeprom write enable: 0x%x\r\n",
DPRINTF("eeprom write enable: 0x%x",
sc->nvm_opaddr);
/* back to opcode mode */
sc->nvm_opaddr = 0;
@ -518,10 +519,10 @@ e82545_eecd_strobe(struct e82545_softc *sc)
sc->nvm_bits = E82545_NVM_DATA_BITS;
if (addr < E82545_NVM_EEPROM_SIZE) {
sc->nvm_data = sc->eeprom_data[addr];
DPRINTF("eeprom read: eeprom[0x%x] = 0x%x\r\n",
DPRINTF("eeprom read: eeprom[0x%x] = 0x%x",
addr, sc->nvm_data);
} else {
DPRINTF("eeprom illegal read: 0x%x\r\n",
DPRINTF("eeprom illegal read: 0x%x",
sc->nvm_opaddr);
sc->nvm_data = 0;
}
@ -533,7 +534,7 @@ e82545_eecd_strobe(struct e82545_softc *sc)
sc->nvm_data = 0;
break;
default:
DPRINTF("eeprom unknown op: 0x%x\r\n",
DPRINTF("eeprom unknown op: 0x%x",
sc->nvm_opaddr);
/* back to opcode mode */
sc->nvm_opaddr = 0;
@ -543,7 +544,7 @@ e82545_eecd_strobe(struct e82545_softc *sc)
}
} else {
DPRINTF("eeprom state machine wrong state! "
"0x%x 0x%x 0x%x 0x%x\r\n",
"0x%x 0x%x 0x%x 0x%x",
sc->nvm_mode, sc->nvm_bits,
sc->nvm_opaddr, sc->nvm_data);
}
@ -558,7 +559,7 @@ e82545_itr_callback(int fd, enum ev_type type, void *param)
pthread_mutex_lock(&sc->esc_mtx);
new = sc->esc_ICR & sc->esc_IMS;
if (new && !sc->esc_irq_asserted) {
DPRINTF("itr callback: lintr assert %x\r\n", new);
DPRINTF("itr callback: lintr assert %x", new);
sc->esc_irq_asserted = 1;
pci_lintr_assert(sc->esc_pi);
} else {
@ -573,7 +574,7 @@ e82545_icr_assert(struct e82545_softc *sc, uint32_t bits)
{
uint32_t new;
DPRINTF("icr assert: 0x%x\r\n", bits);
DPRINTF("icr assert: 0x%x", bits);
/*
* An interrupt is only generated if bits are set that
@ -584,11 +585,11 @@ e82545_icr_assert(struct e82545_softc *sc, uint32_t bits)
sc->esc_ICR |= bits;
if (new == 0) {
DPRINTF("icr assert: masked %x, ims %x\r\n", new, sc->esc_IMS);
DPRINTF("icr assert: masked %x, ims %x", new, sc->esc_IMS);
} else if (sc->esc_mevpitr != NULL) {
DPRINTF("icr assert: throttled %x, ims %x\r\n", new, sc->esc_IMS);
DPRINTF("icr assert: throttled %x, ims %x", new, sc->esc_IMS);
} else if (!sc->esc_irq_asserted) {
DPRINTF("icr assert: lintr assert %x\r\n", new);
DPRINTF("icr assert: lintr assert %x", new);
sc->esc_irq_asserted = 1;
pci_lintr_assert(sc->esc_pi);
if (sc->esc_ITR != 0) {
@ -612,11 +613,11 @@ e82545_ims_change(struct e82545_softc *sc, uint32_t bits)
sc->esc_IMS |= bits;
if (new == 0) {
DPRINTF("ims change: masked %x, ims %x\r\n", new, sc->esc_IMS);
DPRINTF("ims change: masked %x, ims %x", new, sc->esc_IMS);
} else if (sc->esc_mevpitr != NULL) {
DPRINTF("ims change: throttled %x, ims %x\r\n", new, sc->esc_IMS);
DPRINTF("ims change: throttled %x, ims %x", new, sc->esc_IMS);
} else if (!sc->esc_irq_asserted) {
DPRINTF("ims change: lintr assert %x\r\n", new);
DPRINTF("ims change: lintr assert %x", new);
sc->esc_irq_asserted = 1;
pci_lintr_assert(sc->esc_pi);
if (sc->esc_ITR != 0) {
@ -631,7 +632,7 @@ static void
e82545_icr_deassert(struct e82545_softc *sc, uint32_t bits)
{
DPRINTF("icr deassert: 0x%x\r\n", bits);
DPRINTF("icr deassert: 0x%x", bits);
sc->esc_ICR &= ~bits;
/*
@ -639,7 +640,7 @@ e82545_icr_deassert(struct e82545_softc *sc, uint32_t bits)
* was an asserted interrupt, clear it
*/
if (sc->esc_irq_asserted && !(sc->esc_ICR & sc->esc_IMS)) {
DPRINTF("icr deassert: lintr deassert %x\r\n", bits);
DPRINTF("icr deassert: lintr deassert %x", bits);
pci_lintr_deassert(sc->esc_pi);
sc->esc_irq_asserted = 0;
}
@ -649,7 +650,7 @@ static void
e82545_intr_write(struct e82545_softc *sc, uint32_t offset, uint32_t value)
{
DPRINTF("intr_write: off %x, val %x\r\n", offset, value);
DPRINTF("intr_write: off %x, val %x", offset, value);
switch (offset) {
case E1000_ICR:
@ -683,7 +684,7 @@ e82545_intr_read(struct e82545_softc *sc, uint32_t offset)
retval = 0;
DPRINTF("intr_read: off %x\r\n", offset);
DPRINTF("intr_read: off %x", offset);
switch (offset) {
case E1000_ICR:
@ -717,7 +718,7 @@ e82545_devctl(struct e82545_softc *sc, uint32_t val)
sc->esc_CTRL = val & ~E1000_CTRL_RST;
if (val & E1000_CTRL_RST) {
DPRINTF("e1k: s/w reset, ctl %x\r\n", val);
DPRINTF("e1k: s/w reset, ctl %x", val);
e82545_reset(sc, 1);
}
/* XXX check for phy reset ? */
@ -746,7 +747,7 @@ e82545_rx_ctl(struct e82545_softc *sc, uint32_t val)
/* Save RCTL after stripping reserved bits 31:27,24,21,14,11:10,0 */
sc->esc_RCTL = val & ~0xF9204c01;
DPRINTF("rx_ctl - %s RCTL %x, val %x\r\n",
DPRINTF("rx_ctl - %s RCTL %x, val %x",
on ? "on" : "off", sc->esc_RCTL, val);
/* state change requested */
@ -836,10 +837,10 @@ e82545_rx_callback(int fd, enum ev_type type, void *param)
uint16_t *tp, tag, head;
pthread_mutex_lock(&sc->esc_mtx);
DPRINTF("rx_run: head %x, tail %x\r\n", sc->esc_RDH, sc->esc_RDT);
DPRINTF("rx_run: head %x, tail %x", sc->esc_RDH, sc->esc_RDT);
if (!sc->esc_rx_enabled || sc->esc_rx_loopback) {
DPRINTF("rx disabled (!%d || %d) -- packet(s) dropped\r\n",
DPRINTF("rx disabled (!%d || %d) -- packet(s) dropped",
sc->esc_rx_enabled, sc->esc_rx_loopback);
while (netbe_rx_discard(sc->esc_be) > 0) {
}
@ -852,7 +853,7 @@ e82545_rx_callback(int fd, enum ev_type type, void *param)
head = sc->esc_RDH;
left = (size + sc->esc_RDT - head) % size;
if (left < maxpktdesc) {
DPRINTF("rx overflow (%d < %d) -- packet(s) dropped\r\n",
DPRINTF("rx overflow (%d < %d) -- packet(s) dropped",
left, maxpktdesc);
while (netbe_rx_discard(sc->esc_be) > 0) {
}
@ -873,7 +874,7 @@ e82545_rx_callback(int fd, enum ev_type type, void *param)
}
len = netbe_recv(sc->esc_be, vec, maxpktdesc);
if (len <= 0) {
DPRINTF("netbe_recv() returned %d\r\n", len);
DPRINTF("netbe_recv() returned %d", len);
goto done;
}
@ -888,7 +889,7 @@ e82545_rx_callback(int fd, enum ev_type type, void *param)
len += ETHER_CRC_LEN;
n = (len + bufsz - 1) / bufsz;
DPRINTF("packet read %d bytes, %d segs, head %d\r\n",
DPRINTF("packet read %d bytes, %d segs, head %d",
len, n, head);
/* Apply VLAN filter. */
@ -898,9 +899,9 @@ e82545_rx_callback(int fd, enum ev_type type, void *param)
tag = ntohs(tp[1]) & 0x0fff;
if ((sc->esc_fvlan[tag >> 5] &
(1 << (tag & 0x1f))) != 0) {
DPRINTF("known VLAN %d\r\n", tag);
DPRINTF("known VLAN %d", tag);
} else {
DPRINTF("unknown VLAN %d\r\n", tag);
DPRINTF("unknown VLAN %d", tag);
n = 0;
continue;
}
@ -951,7 +952,7 @@ e82545_rx_callback(int fd, enum ev_type type, void *param)
if (cause != 0)
e82545_icr_assert(sc, cause);
done1:
DPRINTF("rx_run done: head %x, tail %x\r\n", sc->esc_RDH, sc->esc_RDT);
DPRINTF("rx_run done: head %x, tail %x", sc->esc_RDH, sc->esc_RDT);
pthread_mutex_unlock(&sc->esc_mtx);
}
@ -1037,7 +1038,7 @@ e82545_transmit_checksum(struct iovec *iov, int iovcnt, struct ck_info *ck)
uint16_t cksum;
int cklen;
DPRINTF("tx cksum: iovcnt/s/off/len %d/%d/%d/%d\r\n",
DPRINTF("tx cksum: iovcnt/s/off/len %d/%d/%d/%d",
iovcnt, ck->ck_start, ck->ck_off, ck->ck_len);
cklen = ck->ck_len ? ck->ck_len - ck->ck_start + 1 : INT_MAX;
cksum = e82545_iov_checksum(iov, iovcnt, ck->ck_start, cklen);
@ -1108,14 +1109,14 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
switch (dtype) {
case E1000_TXD_TYP_C:
DPRINTF("tx ctxt desc idx %d: %016jx "
"%08x%08x\r\n",
"%08x%08x",
head, dsc->td.buffer_addr,
dsc->td.upper.data, dsc->td.lower.data);
/* Save context and return */
sc->esc_txctx = dsc->cd;
goto done;
case E1000_TXD_TYP_L:
DPRINTF("tx legacy desc idx %d: %08x%08x\r\n",
DPRINTF("tx legacy desc idx %d: %08x%08x",
head, dsc->td.upper.data, dsc->td.lower.data);
/*
* legacy cksum start valid in first descriptor
@ -1124,7 +1125,7 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
ckinfo[0].ck_start = dsc->td.upper.fields.css;
break;
case E1000_TXD_TYP_D:
DPRINTF("tx data desc idx %d: %08x%08x\r\n",
DPRINTF("tx data desc idx %d: %08x%08x",
head, dsc->td.upper.data, dsc->td.lower.data);
ntype = dtype;
break;
@ -1134,7 +1135,7 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
} else {
/* Descriptor type must be consistent */
assert(dtype == ntype);
DPRINTF("tx next desc idx %d: %08x%08x\r\n",
DPRINTF("tx next desc idx %d: %08x%08x",
head, dsc->td.upper.data, dsc->td.lower.data);
}
@ -1201,7 +1202,7 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
}
if (iovcnt > I82545_MAX_TXSEGS) {
WPRINTF("tx too many descriptors (%d > %d) -- dropped\r\n",
WPRINTF("tx too many descriptors (%d > %d) -- dropped",
iovcnt, I82545_MAX_TXSEGS);
goto done;
}
@ -1232,7 +1233,7 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
* the Intel 82576EB (Rev 2.63) datasheet.
*/
if (hdrlen > 240) {
WPRINTF("TSO hdrlen too large: %d\r\n", hdrlen);
WPRINTF("TSO hdrlen too large: %d", hdrlen);
goto done;
}
@ -1248,7 +1249,7 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
*/
if (vlen != 0 && hdrlen < ETHER_ADDR_LEN*2) {
WPRINTF("TSO hdrlen too small for vlan insertion "
"(%d vs %d) -- dropped\r\n", hdrlen,
"(%d vs %d) -- dropped", hdrlen,
ETHER_ADDR_LEN*2);
goto done;
}
@ -1270,7 +1271,7 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
if (hdrlen < ckinfo[0].ck_start + 6 ||
hdrlen < ckinfo[0].ck_off + 2) {
WPRINTF("TSO hdrlen too small for IP fields (%d) "
"-- dropped\r\n", hdrlen);
"-- dropped", hdrlen);
goto done;
}
if (sc->esc_txctx.cmd_and_length & E1000_TXD_CMD_TCP) {
@ -1278,13 +1279,13 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
(ckinfo[1].ck_valid &&
hdrlen < ckinfo[1].ck_off + 2)) {
WPRINTF("TSO hdrlen too small for TCP fields "
"(%d) -- dropped\r\n", hdrlen);
"(%d) -- dropped", hdrlen);
goto done;
}
} else {
if (hdrlen < ckinfo[1].ck_start + 8) {
WPRINTF("TSO hdrlen too small for UDP fields "
"(%d) -- dropped\r\n", hdrlen);
"(%d) -- dropped", hdrlen);
goto done;
}
}
@ -1349,7 +1350,7 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
tcp = (sc->esc_txctx.cmd_and_length & E1000_TXD_CMD_TCP) != 0;
mss = sc->esc_txctx.tcp_seg_setup.fields.mss;
paylen = (sc->esc_txctx.cmd_and_length & 0x000fffff);
DPRINTF("tx %s segmentation offload %d+%d/%d bytes %d iovs\r\n",
DPRINTF("tx %s segmentation offload %d+%d/%d bytes %d iovs",
tcp ? "TCP" : "UDP", hdrlen, paylen, mss, iovcnt);
ipid = ntohs(*(uint16_t *)&hdr[ckinfo[0].ck_start + 4]);
tcpseq = 0;
@ -1380,7 +1381,7 @@ e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail,
} else
pvoff += nnow;
}
DPRINTF("tx segment %d %d+%d bytes %d iovs\r\n",
DPRINTF("tx segment %d %d+%d bytes %d iovs",
seg, hdrlen, now, tiovcnt);
/* Update IP header. */
@ -1447,7 +1448,7 @@ e82545_tx_run(struct e82545_softc *sc)
head = sc->esc_TDH;
tail = sc->esc_TDT;
size = sc->esc_TDLEN / 16;
DPRINTF("tx_run: head %x, rhead %x, tail %x\r\n",
DPRINTF("tx_run: head %x, rhead %x, tail %x",
sc->esc_TDH, sc->esc_TDHr, sc->esc_TDT);
pthread_mutex_unlock(&sc->esc_mtx);
@ -1471,7 +1472,7 @@ e82545_tx_run(struct e82545_softc *sc)
if (cause)
e82545_icr_assert(sc, cause);
DPRINTF("tx_run done: head %x, rhead %x, tail %x\r\n",
DPRINTF("tx_run done: head %x, rhead %x, tail %x",
sc->esc_TDH, sc->esc_TDHr, sc->esc_TDT);
}
@ -1598,10 +1599,10 @@ e82545_write_register(struct e82545_softc *sc, uint32_t offset, uint32_t value)
int ridx;
if (offset & 0x3) {
DPRINTF("Unaligned register write offset:0x%x value:0x%x\r\n", offset, value);
DPRINTF("Unaligned register write offset:0x%x value:0x%x", offset, value);
return;
}
DPRINTF("Register write: 0x%x value: 0x%x\r\n", offset, value);
DPRINTF("Register write: 0x%x value: 0x%x", offset, value);
switch (offset) {
case E1000_CTRL:
@ -1745,7 +1746,7 @@ e82545_write_register(struct e82545_softc *sc, uint32_t offset, uint32_t value)
break;
case E1000_EECD:
{
//DPRINTF("EECD write 0x%x -> 0x%x\r\n", sc->eeprom_control, value);
//DPRINTF("EECD write 0x%x -> 0x%x", sc->eeprom_control, value);
/* edge triggered low->high */
uint32_t eecd_strobe = ((sc->eeprom_control & E1000_EECD_SK) ?
0 : (value & E1000_EECD_SK));
@ -1773,7 +1774,7 @@ e82545_write_register(struct e82545_softc *sc, uint32_t offset, uint32_t value)
sc->mdi_control =
(value & ~(E1000_MDIC_ERROR|E1000_MDIC_DEST));
if ((value & E1000_MDIC_READY) != 0) {
DPRINTF("Incorrect MDIC ready bit: 0x%x\r\n", value);
DPRINTF("Incorrect MDIC ready bit: 0x%x", value);
return;
}
switch (value & E82545_MDIC_OP_MASK) {
@ -1786,7 +1787,7 @@ e82545_write_register(struct e82545_softc *sc, uint32_t offset, uint32_t value)
value & E82545_MDIC_DATA_MASK);
break;
default:
DPRINTF("Unknown MDIC op: 0x%x\r\n", value);
DPRINTF("Unknown MDIC op: 0x%x", value);
return;
}
/* TODO: barrier? */
@ -1800,7 +1801,7 @@ e82545_write_register(struct e82545_softc *sc, uint32_t offset, uint32_t value)
case E1000_STATUS:
return;
default:
DPRINTF("Unknown write register: 0x%x value:%x\r\n", offset, value);
DPRINTF("Unknown write register: 0x%x value:%x", offset, value);
return;
}
}
@ -1812,11 +1813,11 @@ e82545_read_register(struct e82545_softc *sc, uint32_t offset)
int ridx;
if (offset & 0x3) {
DPRINTF("Unaligned register read offset:0x%x\r\n", offset);
DPRINTF("Unaligned register read offset:0x%x", offset);
return 0;
}
DPRINTF("Register read: 0x%x\r\n", offset);
DPRINTF("Register read: 0x%x", offset);
switch (offset) {
case E1000_CTRL:
@ -1941,7 +1942,7 @@ e82545_read_register(struct e82545_softc *sc, uint32_t offset)
retval = sc->esc_fvlan[(offset - E1000_VFTA) >> 2];
break;
case E1000_EECD:
//DPRINTF("EECD read %x\r\n", sc->eeprom_control);
//DPRINTF("EECD read %x", sc->eeprom_control);
retval = sc->eeprom_control;
break;
case E1000_MDIC:
@ -2071,7 +2072,7 @@ e82545_read_register(struct e82545_softc *sc, uint32_t offset)
retval = 0;
break;
default:
DPRINTF("Unknown read register: 0x%x\r\n", offset);
DPRINTF("Unknown read register: 0x%x", offset);
retval = 0;
break;
}
@ -2085,7 +2086,7 @@ e82545_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
{
struct e82545_softc *sc;
//DPRINTF("Write bar:%d offset:0x%lx value:0x%lx size:%d\r\n", baridx, offset, value, size);
//DPRINTF("Write bar:%d offset:0x%lx value:0x%lx size:%d", baridx, offset, value, size);
sc = pi->pi_arg;
@ -2096,33 +2097,33 @@ e82545_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
switch (offset) {
case E82545_IOADDR:
if (size != 4) {
DPRINTF("Wrong io addr write sz:%d value:0x%lx\r\n", size, value);
DPRINTF("Wrong io addr write sz:%d value:0x%lx", size, value);
} else
sc->io_addr = (uint32_t)value;
break;
case E82545_IODATA:
if (size != 4) {
DPRINTF("Wrong io data write size:%d value:0x%lx\r\n", size, value);
DPRINTF("Wrong io data write size:%d value:0x%lx", size, value);
} else if (sc->io_addr > E82545_IO_REGISTER_MAX) {
DPRINTF("Non-register io write addr:0x%x value:0x%lx\r\n", sc->io_addr, value);
DPRINTF("Non-register io write addr:0x%x value:0x%lx", sc->io_addr, value);
} else
e82545_write_register(sc, sc->io_addr,
(uint32_t)value);
break;
default:
DPRINTF("Unknown io bar write offset:0x%lx value:0x%lx size:%d\r\n", offset, value, size);
DPRINTF("Unknown io bar write offset:0x%lx value:0x%lx size:%d", offset, value, size);
break;
}
break;
case E82545_BAR_REGISTER:
if (size != 4) {
DPRINTF("Wrong register write size:%d offset:0x%lx value:0x%lx\r\n", size, offset, value);
DPRINTF("Wrong register write size:%d offset:0x%lx value:0x%lx", size, offset, value);
} else
e82545_write_register(sc, (uint32_t)offset,
(uint32_t)value);
break;
default:
DPRINTF("Unknown write bar:%d off:0x%lx val:0x%lx size:%d\r\n",
DPRINTF("Unknown write bar:%d off:0x%lx val:0x%lx size:%d",
baridx, offset, value, size);
}
@ -2136,7 +2137,7 @@ e82545_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
struct e82545_softc *sc;
uint64_t retval;
//DPRINTF("Read bar:%d offset:0x%lx size:%d\r\n", baridx, offset, size);
//DPRINTF("Read bar:%d offset:0x%lx size:%d", baridx, offset, size);
sc = pi->pi_arg;
retval = 0;
@ -2147,35 +2148,35 @@ e82545_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
switch (offset) {
case E82545_IOADDR:
if (size != 4) {
DPRINTF("Wrong io addr read sz:%d\r\n", size);
DPRINTF("Wrong io addr read sz:%d", size);
} else
retval = sc->io_addr;
break;
case E82545_IODATA:
if (size != 4) {
DPRINTF("Wrong io data read sz:%d\r\n", size);
DPRINTF("Wrong io data read sz:%d", size);
}
if (sc->io_addr > E82545_IO_REGISTER_MAX) {
DPRINTF("Non-register io read addr:0x%x\r\n",
DPRINTF("Non-register io read addr:0x%x",
sc->io_addr);
} else
retval = e82545_read_register(sc, sc->io_addr);
break;
default:
DPRINTF("Unknown io bar read offset:0x%lx size:%d\r\n",
DPRINTF("Unknown io bar read offset:0x%lx size:%d",
offset, size);
break;
}
break;
case E82545_BAR_REGISTER:
if (size != 4) {
DPRINTF("Wrong register read size:%d offset:0x%lx\r\n",
DPRINTF("Wrong register read size:%d offset:0x%lx",
size, offset);
} else
retval = e82545_read_register(sc, (uint32_t)offset);
break;
default:
DPRINTF("Unknown read bar:%d offset:0x%lx size:%d\r\n",
DPRINTF("Unknown read bar:%d offset:0x%lx size:%d",
baridx, offset, size);
break;
}
@ -2282,7 +2283,7 @@ e82545_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
char *vtopts;
int mac_provided;
DPRINTF("Loading with options: %s\r\n", opts);
DPRINTF("Loading with options: %s", opts);
/* Setup our softc */
sc = calloc(1, sizeof(*sc));

7
usr.sbin/bhyve/pci_emul.c
View File

@ -49,6 +49,7 @@ __FBSDID("$FreeBSD$");
#include "acpi.h"
#include "bhyverun.h"
#include "debug.h"
#include "inout.h"
#include "ioapic.h"
#include "mem.h"
@ -162,7 +163,7 @@ static void
pci_parse_slot_usage(char *aopt)
{
fprintf(stderr, "Invalid PCI slot info field \"%s\"\n", aopt);
EPRINTLN("Invalid PCI slot info field \"%s\"", aopt);
}
int
@ -215,13 +216,13 @@ pci_parse_slot(char *opt)
si = &bi->slotinfo[snum];
if (si->si_funcs[fnum].fi_name != NULL) {
fprintf(stderr, "pci slot %d:%d already occupied!\n",
EPRINTLN("pci slot %d:%d already occupied!",
snum, fnum);
goto done;
}
if (pci_emul_finddev(emul) == NULL) {
fprintf(stderr, "pci slot %d:%d: unknown device \"%s\"\n",
EPRINTLN("pci slot %d:%d: unknown device \"%s\"",
snum, fnum, emul);
goto done;
}

23
usr.sbin/bhyve/pci_fbuf.c
View File

@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
#include "bhyvegc.h"
#include "bhyverun.h"
#include "debug.h"
#include "console.h"
#include "inout.h"
#include "pci_emul.h"
@ -63,7 +64,7 @@ __FBSDID("$FreeBSD$");
static int fbuf_debug = 1;
#define DEBUG_INFO 1
#define DEBUG_VERBOSE 4
#define DPRINTF(level, params) if (level <= fbuf_debug) printf params
#define DPRINTF(level, params) if (level <= fbuf_debug) PRINTLN params
#define KB (1024UL)
@ -117,9 +118,9 @@ static void
pci_fbuf_usage(char *opt)
{
fprintf(stderr, "Invalid fbuf emulation option \"%s\"\r\n", opt);
fprintf(stderr, "fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port"
"{,w=width}{,h=height}\r\n");
EPRINTLN("Invalid fbuf emulation option \"%s\"", opt);
EPRINTLN("fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port"
"{,w=width}{,h=height}");
}
static void
@ -165,13 +166,13 @@ pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
if (!sc->gc_image->vgamode && sc->memregs.width == 0 &&
sc->memregs.height == 0) {
DPRINTF(DEBUG_INFO, ("switching to VGA mode\r\n"));
DPRINTF(DEBUG_INFO, ("switching to VGA mode"));
sc->gc_image->vgamode = 1;
sc->gc_width = 0;
sc->gc_height = 0;
} else if (sc->gc_image->vgamode && sc->memregs.width != 0 &&
sc->memregs.height != 0) {
DPRINTF(DEBUG_INFO, ("switching to VESA mode\r\n"));
DPRINTF(DEBUG_INFO, ("switching to VESA mode"));
sc->gc_image->vgamode = 0;
}
}
@ -245,7 +246,7 @@ pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts)
*config++ = '\0';
DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s\r\n",
DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s",
xopts, config));
if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) {
@ -355,7 +356,7 @@ pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
struct pci_fbuf_softc *sc;
if (fbuf_sc != NULL) {
fprintf(stderr, "Only one frame buffer device is allowed.\n");
EPRINTLN("Only one frame buffer device is allowed.");
return (-1);
}
@ -395,7 +396,7 @@ pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
/* XXX until VGA rendering is enabled */
if (sc->vga_full != 0) {
fprintf(stderr, "pci_fbuf: VGA rendering not enabled");
EPRINTLN("pci_fbuf: VGA rendering not enabled");
goto done;
}
@ -404,7 +405,7 @@ pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
error = -1;
goto done;
}
DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]\r\n",
DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]",
sc->fb_base, FB_SIZE));
/*
@ -415,7 +416,7 @@ pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
*/
prot = PROT_READ | PROT_WRITE;
if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) {
fprintf(stderr, "pci_fbuf: mapseg failed - try deleting VM and restarting\n");
EPRINTLN("pci_fbuf: mapseg failed - try deleting VM and restarting");
error = -1;
goto done;
}

68
usr.sbin/bhyve/pci_hda.c
View File

@ -332,11 +332,11 @@ hda_parse_config(const char *opts, const char *key, char *val)
len = strlen(opts);
if (len >= sizeof(buf)) {
DPRINTF("Opts too big\n\r");
DPRINTF("Opts too big");
return (0);
}
DPRINTF("opts: %s\n\r", opts);
DPRINTF("opts: %s", opts);
strcpy(buf, opts);
@ -377,7 +377,7 @@ hda_init(const char *opts)
dbg = fopen("/tmp/bhyve_hda.log", "w+");
#endif
DPRINTF("opts: %s\n\r", opts);
DPRINTF("opts: %s", opts);
sc = calloc(1, sizeof(*sc));
if (!sc)
@ -393,7 +393,7 @@ hda_init(const char *opts)
if (codec) {
p = hda_parse_config(opts, "play=", play);
r = hda_parse_config(opts, "rec=", rec);
DPRINTF("play: %s rec: %s\n\r", play, rec);
DPRINTF("play: %s rec: %s", play, rec);
if (p | r) {
err = hda_codec_constructor(sc, codec, p ? \
play : NULL, r ? rec : NULL, NULL);
@ -489,7 +489,7 @@ hda_codec_constructor(struct hda_softc *sc, struct hda_codec_class *codec,
sc->codecs[sc->codecs_no++] = hci;
if (!codec->init) {
DPRINTF("This codec does not implement the init function\n\r");
DPRINTF("This codec does not implement the init function");
return (-1);
}
@ -522,13 +522,13 @@ hda_send_command(struct hda_softc *sc, uint32_t verb)
if (!hci)
return (-1);
DPRINTF("cad: 0x%x verb: 0x%x\n\r", cad, verb);
DPRINTF("cad: 0x%x verb: 0x%x", cad, verb);
codec = hci->codec;
assert(codec);
if (!codec->command) {
DPRINTF("This codec does not implement the command function\n\r");
DPRINTF("This codec does not implement the command function");
return (-1);
}
@ -592,7 +592,7 @@ hda_reset_regs(struct hda_softc *sc)
uint32_t off = 0;
uint8_t i;
DPRINTF("Reset the HDA controller registers ...\n\r");
DPRINTF("Reset the HDA controller registers ...");
memset(sc->regs, 0, sizeof(sc->regs));
@ -620,7 +620,7 @@ hda_stream_reset(struct hda_softc *sc, uint8_t stream_ind)
struct hda_stream_desc *st = &sc->streams[stream_ind];
uint32_t off = hda_get_offset_stream(stream_ind);
DPRINTF("Reset the HDA stream: 0x%x\n\r", stream_ind);
DPRINTF("Reset the HDA stream: 0x%x", stream_ind);
/* Reset the Stream Descriptor registers */
memset(sc->regs + HDA_STREAM_REGS_BASE + off, 0, HDA_STREAM_REGS_LEN);
@ -670,11 +670,11 @@ hda_stream_start(struct hda_softc *sc, uint8_t stream_ind)
bdl_vaddr = hda_dma_get_vaddr(sc, bdl_paddr,
HDA_BDL_ENTRY_LEN * bdl_cnt);
if (!bdl_vaddr) {
DPRINTF("Fail to get the guest virtual address\n\r");
DPRINTF("Fail to get the guest virtual address");
return (-1);
}
DPRINTF("stream: 0x%x bdl_cnt: 0x%x bdl_paddr: 0x%lx\n\r",
DPRINTF("stream: 0x%x bdl_cnt: 0x%x bdl_paddr: 0x%lx",
stream_ind, bdl_cnt, bdl_paddr);
st->bdl_cnt = bdl_cnt;
@ -690,7 +690,7 @@ hda_stream_start(struct hda_softc *sc, uint8_t stream_ind)
bdle_paddr = bdle_addrl | (bdle_addrh << 32);
bdle_vaddr = hda_dma_get_vaddr(sc, bdle_paddr, bdle_sz);
if (!bdle_vaddr) {
DPRINTF("Fail to get the guest virtual address\n\r");
DPRINTF("Fail to get the guest virtual address");
return (-1);
}
@ -699,14 +699,14 @@ hda_stream_start(struct hda_softc *sc, uint8_t stream_ind)
bdle_desc->len = bdle_sz;
bdle_desc->ioc = bdle->ioc;
DPRINTF("bdle: 0x%x bdle_sz: 0x%x\n\r", i, bdle_sz);
DPRINTF("bdle: 0x%x bdle_sz: 0x%x", i, bdle_sz);
}
sdctl = hda_get_reg_by_offset(sc, off + HDAC_SDCTL0);
strm = (sdctl >> 20) & 0x0f;
dir = stream_ind >= HDA_ISS_NO;
DPRINTF("strm: 0x%x, dir: 0x%x\n\r", strm, dir);
DPRINTF("strm: 0x%x, dir: 0x%x", strm, dir);
sc->stream_map[dir][strm] = stream_ind;
st->stream = strm;
@ -730,7 +730,7 @@ hda_stream_stop(struct hda_softc *sc, uint8_t stream_ind)
uint8_t strm = st->stream;
uint8_t dir = st->dir;
DPRINTF("stream: 0x%x, strm: 0x%x, dir: 0x%x\n\r", stream_ind, strm, dir);
DPRINTF("stream: 0x%x, strm: 0x%x, dir: 0x%x", stream_ind, strm, dir);
st->run = 0;
@ -771,10 +771,10 @@ hda_print_cmd_ctl_data(struct hda_codec_cmd_ctl *p)
#if DEBUG_HDA == 1
char *name = p->name;
#endif
DPRINTF("%s size: %d\n\r", name, p->size);
DPRINTF("%s dma_vaddr: %p\n\r", name, p->dma_vaddr);
DPRINTF("%s wp: 0x%x\n\r", name, p->wp);
DPRINTF("%s rp: 0x%x\n\r", name, p->rp);
DPRINTF("%s size: %d", name, p->size);
DPRINTF("%s dma_vaddr: %p", name, p->dma_vaddr);
DPRINTF("%s wp: 0x%x", name, p->wp);
DPRINTF("%s rp: 0x%x", name, p->rp);
}
static int
@ -793,7 +793,7 @@ hda_corb_start(struct hda_softc *sc)
corb->size = hda_corb_sizes[corbsize];
if (!corb->size) {
DPRINTF("Invalid corb size\n\r");
DPRINTF("Invalid corb size");
return (-1);
}
@ -801,12 +801,12 @@ hda_corb_start(struct hda_softc *sc)
corbubase = hda_get_reg_by_offset(sc, HDAC_CORBUBASE);
corbpaddr = corblbase | (corbubase << 32);
DPRINTF("CORB dma_paddr: %p\n\r", (void *)corbpaddr);
DPRINTF("CORB dma_paddr: %p", (void *)corbpaddr);
corb->dma_vaddr = hda_dma_get_vaddr(sc, corbpaddr,
HDA_CORB_ENTRY_LEN * corb->size);
if (!corb->dma_vaddr) {
DPRINTF("Fail to get the guest virtual address\n\r");
DPRINTF("Fail to get the guest virtual address");
return (-1);
}
@ -864,7 +864,7 @@ hda_rirb_start(struct hda_softc *sc)
rirb->size = hda_rirb_sizes[rirbsize];
if (!rirb->size) {
DPRINTF("Invalid rirb size\n\r");
DPRINTF("Invalid rirb size");
return (-1);
}
@ -872,12 +872,12 @@ hda_rirb_start(struct hda_softc *sc)
rirbubase = hda_get_reg_by_offset(sc, HDAC_RIRBUBASE);
rirbpaddr = rirblbase | (rirbubase << 32);
DPRINTF("RIRB dma_paddr: %p\n\r", (void *)rirbpaddr);
DPRINTF("RIRB dma_paddr: %p", (void *)rirbpaddr);
rirb->dma_vaddr = hda_dma_get_vaddr(sc, rirbpaddr,
HDA_RIRB_ENTRY_LEN * rirb->size);
if (!rirb->dma_vaddr) {
DPRINTF("Fail to get the guest virtual address\n\r");
DPRINTF("Fail to get the guest virtual address");
return (-1);
}
@ -1022,18 +1022,18 @@ hda_set_dpiblbase(struct hda_softc *sc, uint32_t offset, uint32_t old)
dpibubase = hda_get_reg_by_offset(sc, HDAC_DPIBUBASE);
dpibpaddr = dpiblbase | (dpibubase << 32);
DPRINTF("DMA Position In Buffer dma_paddr: %p\n\r",
DPRINTF("DMA Position In Buffer dma_paddr: %p",
(void *)dpibpaddr);
sc->dma_pib_vaddr = hda_dma_get_vaddr(sc, dpibpaddr,
HDA_DMA_PIB_ENTRY_LEN * HDA_IOSS_NO);
if (!sc->dma_pib_vaddr) {
DPRINTF("Fail to get the guest \
virtual address\n\r");
virtual address");
assert(0);
}
} else {
DPRINTF("DMA Position In Buffer Reset\n\r");
DPRINTF("DMA Position In Buffer Reset");
sc->dma_pib_vaddr = NULL;
}
}
@ -1046,7 +1046,7 @@ hda_set_sdctl(struct hda_softc *sc, uint32_t offset, uint32_t old)
uint32_t value = hda_get_reg_by_offset(sc, offset);
int err;
DPRINTF("stream_ind: 0x%x old: 0x%x value: 0x%x\n\r",
DPRINTF("stream_ind: 0x%x old: 0x%x value: 0x%x",
stream_ind, old, value);
if (value & HDAC_SDCTL_SRST) {
@ -1094,7 +1094,7 @@ hda_signal_state_change(struct hda_codec_inst *hci)
assert(hci);
assert(hci->hda);
DPRINTF("cad: 0x%x\n\r", hci->cad);
DPRINTF("cad: 0x%x", hci->cad);
sc = hci->hda;
sdiwake = 1 << hci->cad;
@ -1164,7 +1164,7 @@ hda_transfer(struct hda_codec_inst *hci, uint8_t stream, uint8_t dir,
assert(!(count % HDA_DMA_ACCESS_LEN));
if (!stream) {
DPRINTF("Invalid stream\n\r");
DPRINTF("Invalid stream");
return (-1);
}
@ -1180,7 +1180,7 @@ hda_transfer(struct hda_codec_inst *hci, uint8_t stream, uint8_t dir,
st = &sc->streams[stream_ind];
if (!st->run) {
DPRINTF("Stream 0x%x stopped\n\r", stream);
DPRINTF("Stream 0x%x stopped", stream);
return (-1);
}
@ -1306,7 +1306,7 @@ pci_hda_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
assert(baridx == 0);
assert(size <= 4);
DPRINTF("offset: 0x%lx value: 0x%lx\n\r", offset, value);
DPRINTF("offset: 0x%lx value: 0x%lx", offset, value);
err = hda_write(sc, offset, size, value);
assert(!err);
@ -1325,7 +1325,7 @@ pci_hda_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
value = hda_read(sc, offset);
DPRINTF("offset: 0x%lx value: 0x%lx\n\r", offset, value);
DPRINTF("offset: 0x%lx value: 0x%lx", offset, value);
return (value);
}

2
usr.sbin/bhyve/pci_hda.h
View File

@ -50,7 +50,7 @@
#if DEBUG_HDA == 1
extern FILE *dbg;
#define DPRINTF(fmt, arg...) \
do {fprintf(dbg, "%s-%d: " fmt, __func__, __LINE__, ##arg); \
do {fprintf(dbg, "%s-%d: " fmt "\n", __func__, __LINE__, ##arg); \
fflush(dbg); } while (0)
#else
#define DPRINTF(fmt, arg...)

13
usr.sbin/bhyve/pci_lpc.c
View File

@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
#include <vmmapi.h>
#include "acpi.h"
#include "debug.h"
#include "bootrom.h"
#include "inout.h"
#include "pci_emul.h"
@ -202,8 +203,8 @@ lpc_init(struct vmctx *ctx)
name = lpc_uart_names[unit];
if (uart_legacy_alloc(unit, &sc->iobase, &sc->irq) != 0) {
fprintf(stderr, "Unable to allocate resources for "
"LPC device %s\n", name);
EPRINTLN("Unable to allocate resources for "
"LPC device %s", name);
return (-1);
}
pci_irq_reserve(sc->irq);
@ -212,8 +213,8 @@ lpc_init(struct vmctx *ctx)
lpc_uart_intr_deassert, sc);
if (uart_set_backend(sc->uart_softc, sc->opts) != 0) {
fprintf(stderr, "Unable to initialize backend '%s' "
"for LPC device %s\n", sc->opts, name);
EPRINTLN("Unable to initialize backend '%s' "
"for LPC device %s", sc->opts, name);
return (-1);
}
@ -398,7 +399,7 @@ pci_lpc_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
* Do not allow more than one LPC bridge to be configured.
*/
if (lpc_bridge != NULL) {
fprintf(stderr, "Only one LPC bridge is allowed.\n");
EPRINTLN("Only one LPC bridge is allowed.");
return (-1);
}
@ -408,7 +409,7 @@ pci_lpc_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
* all legacy i/o ports behind bus 0.
*/
if (pi->pi_bus != 0) {
fprintf(stderr, "LPC bridge can be present only on bus 0.\n");
EPRINTLN("LPC bridge can be present only on bus 0.");
return (-1);
}

235
usr.sbin/bhyve/pci_nvme.c
View File

@ -78,12 +78,13 @@ __FBSDID("$FreeBSD$");
#include "bhyverun.h"
#include "block_if.h"
#include "debug.h"
#include "pci_emul.h"
static int nvme_debug = 0;
#define DPRINTF(params) if (nvme_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (nvme_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
/* defaults; can be overridden */
#define NVME_MSIX_BAR 4
@ -457,7 +458,7 @@ pci_nvme_init_logpages(struct pci_nvme_softc *sc)
static void
pci_nvme_reset_locked(struct pci_nvme_softc *sc)
{
DPRINTF(("%s\r\n", __func__));
DPRINTF(("%s", __func__));
sc->regs.cap_lo = (ZERO_BASED(sc->max_qentries) & NVME_CAP_LO_REG_MQES_MASK) |
(1 << NVME_CAP_LO_REG_CQR_SHIFT) |
@ -524,14 +525,14 @@ pci_nvme_init_controller(struct vmctx *ctx, struct pci_nvme_softc *sc)
{
uint16_t acqs, asqs;
DPRINTF(("%s\r\n", __func__));
DPRINTF(("%s", __func__));
asqs = (sc->regs.aqa & NVME_AQA_REG_ASQS_MASK) + 1;
sc->submit_queues[0].size = asqs;
sc->submit_queues[0].qbase = vm_map_gpa(ctx, sc->regs.asq,
sizeof(struct nvme_command) * asqs);
DPRINTF(("%s mapping Admin-SQ guest 0x%lx, host: %p\r\n",
DPRINTF(("%s mapping Admin-SQ guest 0x%lx, host: %p",
__func__, sc->regs.asq, sc->submit_queues[0].qbase));
acqs = ((sc->regs.aqa >> NVME_AQA_REG_ACQS_SHIFT) &
@ -539,7 +540,7 @@ pci_nvme_init_controller(struct vmctx *ctx, struct pci_nvme_softc *sc)
sc->compl_queues[0].size = acqs;
sc->compl_queues[0].qbase = vm_map_gpa(ctx, sc->regs.acq,
sizeof(struct nvme_completion) * acqs);
DPRINTF(("%s mapping Admin-CQ guest 0x%lx, host: %p\r\n",
DPRINTF(("%s mapping Admin-CQ guest 0x%lx, host: %p",
__func__, sc->regs.acq, sc->compl_queues[0].qbase));
}
@ -590,9 +591,9 @@ nvme_opc_delete_io_sq(struct pci_nvme_softc* sc, struct nvme_command* command,
{
uint16_t qid = command->cdw10 & 0xffff;
DPRINTF(("%s DELETE_IO_SQ %u\r\n", __func__, qid));
DPRINTF(("%s DELETE_IO_SQ %u", __func__, qid));
if (qid == 0 || qid > sc->num_squeues) {
WPRINTF(("%s NOT PERMITTED queue id %u / num_squeues %u\r\n",
WPRINTF(("%s NOT PERMITTED queue id %u / num_squeues %u",
__func__, qid, sc->num_squeues));
pci_nvme_status_tc(&compl->status, NVME_SCT_COMMAND_SPECIFIC,
NVME_SC_INVALID_QUEUE_IDENTIFIER);
@ -613,7 +614,7 @@ nvme_opc_create_io_sq(struct pci_nvme_softc* sc, struct nvme_command* command,
struct nvme_submission_queue *nsq;
if ((qid == 0) || (qid > sc->num_squeues)) {
WPRINTF(("%s queue index %u > num_squeues %u\r\n",
WPRINTF(("%s queue index %u > num_squeues %u",
__func__, qid, sc->num_squeues));
pci_nvme_status_tc(&compl->status,
NVME_SCT_COMMAND_SPECIFIC,
@ -629,12 +630,12 @@ nvme_opc_create_io_sq(struct pci_nvme_softc* sc, struct nvme_command* command,
nsq->cqid = (command->cdw11 >> 16) & 0xffff;
nsq->qpriority = (command->cdw11 >> 1) & 0x03;
DPRINTF(("%s sq %u size %u gaddr %p cqid %u\r\n", __func__,
DPRINTF(("%s sq %u size %u gaddr %p cqid %u", __func__,
qid, nsq->size, nsq->qbase, nsq->cqid));
pci_nvme_status_genc(&compl->status, NVME_SC_SUCCESS);
DPRINTF(("%s completed creating IOSQ qid %u\r\n",
DPRINTF(("%s completed creating IOSQ qid %u",
__func__, qid));
} else {
/*
@ -642,7 +643,7 @@ nvme_opc_create_io_sq(struct pci_nvme_softc* sc, struct nvme_command* command,
* This setting is unsupported by this emulation.
*/
WPRINTF(("%s unsupported non-contig (list-based) "
"create i/o submission queue\r\n", __func__));
"create i/o submission queue", __func__));
pci_nvme_status_genc(&compl->status, NVME_SC_INVALID_FIELD);
}
@ -655,9 +656,9 @@ nvme_opc_delete_io_cq(struct pci_nvme_softc* sc, struct nvme_command* command,
{
uint16_t qid = command->cdw10 & 0xffff;
DPRINTF(("%s DELETE_IO_CQ %u\r\n", __func__, qid));
DPRINTF(("%s DELETE_IO_CQ %u", __func__, qid));
if (qid == 0 || qid > sc->num_cqueues) {
WPRINTF(("%s queue index %u / num_cqueues %u\r\n",
WPRINTF(("%s queue index %u / num_cqueues %u",
__func__, qid, sc->num_cqueues));
pci_nvme_status_tc(&compl->status, NVME_SCT_COMMAND_SPECIFIC,
NVME_SC_INVALID_QUEUE_IDENTIFIER);
@ -678,7 +679,7 @@ nvme_opc_create_io_cq(struct pci_nvme_softc* sc, struct nvme_command* command,
struct nvme_completion_queue *ncq;
if ((qid == 0) || (qid > sc->num_cqueues)) {
WPRINTF(("%s queue index %u > num_cqueues %u\r\n",
WPRINTF(("%s queue index %u > num_cqueues %u",
__func__, qid, sc->num_cqueues));
pci_nvme_status_tc(&compl->status,
NVME_SCT_COMMAND_SPECIFIC,
@ -701,7 +702,7 @@ nvme_opc_create_io_cq(struct pci_nvme_softc* sc, struct nvme_command* command,
* Non-contig completion queue unsupported.
*/
WPRINTF(("%s unsupported non-contig (list-based) "
"create i/o completion queue\r\n",
"create i/o completion queue",
__func__));
/* 0x12 = Invalid Use of Controller Memory Buffer */
@ -718,7 +719,7 @@ nvme_opc_get_log_page(struct pci_nvme_softc* sc, struct nvme_command* command,
uint32_t logsize = (1 + ((command->cdw10 >> 16) & 0xFFF)) * 2;
uint8_t logpage = command->cdw10 & 0xFF;
DPRINTF(("%s log page %u len %u\r\n", __func__, logpage, logsize));
DPRINTF(("%s log page %u len %u", __func__, logpage, logsize));
pci_nvme_status_genc(&compl->status, NVME_SC_SUCCESS);
@ -737,7 +738,7 @@ nvme_opc_get_log_page(struct pci_nvme_softc* sc, struct nvme_command* command,
command->prp2, (uint8_t *)&sc->fw_log, logsize);
break;
default:
WPRINTF(("%s get log page %x command not supported\r\n",
WPRINTF(("%s get log page %x command not supported",
__func__, logpage));
pci_nvme_status_tc(&compl->status, NVME_SCT_COMMAND_SPECIFIC,
@ -753,7 +754,7 @@ nvme_opc_identify(struct pci_nvme_softc* sc, struct nvme_command* command,
{
void *dest;
DPRINTF(("%s identify 0x%x nsid 0x%x\r\n", __func__,
DPRINTF(("%s identify 0x%x nsid 0x%x", __func__,
command->cdw10 & 0xFF, command->nsid));
switch (command->cdw10 & 0xFF) {
@ -783,7 +784,7 @@ nvme_opc_identify(struct pci_nvme_softc* sc, struct nvme_command* command,
case 0x14:
case 0x15:
default:
DPRINTF(("%s unsupported identify command requested 0x%x\r\n",
DPRINTF(("%s unsupported identify command requested 0x%x",
__func__, command->cdw10 & 0xFF));
pci_nvme_status_genc(&compl->status, NVME_SC_INVALID_FIELD);
return (1);
@ -801,28 +802,28 @@ nvme_set_feature_queues(struct pci_nvme_softc* sc, struct nvme_command* command,
nqr = command->cdw11 & 0xFFFF;
if (nqr == 0xffff) {
WPRINTF(("%s: Illegal NSQR value %#x\r\n", __func__, nqr));
WPRINTF(("%s: Illegal NSQR value %#x", __func__, nqr));
pci_nvme_status_genc(&compl->status, NVME_SC_INVALID_FIELD);
return (-1);
}
sc->num_squeues = ONE_BASED(nqr);
if (sc->num_squeues > sc->max_queues) {
DPRINTF(("NSQR=%u is greater than max %u\r\n", sc->num_squeues,
DPRINTF(("NSQR=%u is greater than max %u", sc->num_squeues,
sc->max_queues));
sc->num_squeues = sc->max_queues;
}
nqr = (command->cdw11 >> 16) & 0xFFFF;
if (nqr == 0xffff) {
WPRINTF(("%s: Illegal NCQR value %#x\r\n", __func__, nqr));
WPRINTF(("%s: Illegal NCQR value %#x", __func__, nqr));
pci_nvme_status_genc(&compl->status, NVME_SC_INVALID_FIELD);
return (-1);
}
sc->num_cqueues = ONE_BASED(nqr);
if (sc->num_cqueues > sc->max_queues) {
DPRINTF(("NCQR=%u is greater than max %u\r\n", sc->num_cqueues,
DPRINTF(("NCQR=%u is greater than max %u", sc->num_cqueues,
sc->max_queues));
sc->num_cqueues = sc->max_queues;
}
@ -839,33 +840,33 @@ nvme_opc_set_features(struct pci_nvme_softc* sc, struct nvme_command* command,
int feature = command->cdw10 & 0xFF;
uint32_t iv;
DPRINTF(("%s feature 0x%x\r\n", __func__, feature));
DPRINTF(("%s feature 0x%x", __func__, feature));
compl->cdw0 = 0;
switch (feature) {
case NVME_FEAT_ARBITRATION:
DPRINTF((" arbitration 0x%x\r\n", command->cdw11));
DPRINTF((" arbitration 0x%x", command->cdw11));
break;
case NVME_FEAT_POWER_MANAGEMENT:
DPRINTF((" power management 0x%x\r\n", command->cdw11));
DPRINTF((" power management 0x%x", command->cdw11));
break;
case NVME_FEAT_LBA_RANGE_TYPE:
DPRINTF((" lba range 0x%x\r\n", command->cdw11));
DPRINTF((" lba range 0x%x", command->cdw11));
break;
case NVME_FEAT_TEMPERATURE_THRESHOLD:
DPRINTF((" temperature threshold 0x%x\r\n", command->cdw11));
DPRINTF((" temperature threshold 0x%x", command->cdw11));
break;
case NVME_FEAT_ERROR_RECOVERY:
DPRINTF((" error recovery 0x%x\r\n", command->cdw11));
DPRINTF((" error recovery 0x%x", command->cdw11));
break;
case NVME_FEAT_VOLATILE_WRITE_CACHE:
DPRINTF((" volatile write cache 0x%x\r\n", command->cdw11));
DPRINTF((" volatile write cache 0x%x", command->cdw11));
break;
case NVME_FEAT_NUMBER_OF_QUEUES:
nvme_set_feature_queues(sc, command, compl);
break;
case NVME_FEAT_INTERRUPT_COALESCING:
DPRINTF((" interrupt coalescing 0x%x\r\n", command->cdw11));
DPRINTF((" interrupt coalescing 0x%x", command->cdw11));
/* in uS */
sc->intr_coales_aggr_time = ((command->cdw11 >> 8) & 0xFF)*100;
@ -875,7 +876,7 @@ nvme_opc_set_features(struct pci_nvme_softc* sc, struct nvme_command* command,
case NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION:
iv = command->cdw11 & 0xFFFF;
DPRINTF((" interrupt vector configuration 0x%x\r\n",
DPRINTF((" interrupt vector configuration 0x%x",
command->cdw11));
for (uint32_t i = 0; i < sc->num_cqueues + 1; i++) {
@ -890,23 +891,23 @@ nvme_opc_set_features(struct pci_nvme_softc* sc, struct nvme_command* command,
}
break;
case NVME_FEAT_WRITE_ATOMICITY:
DPRINTF((" write atomicity 0x%x\r\n", command->cdw11));
DPRINTF((" write atomicity 0x%x", command->cdw11));
break;
case NVME_FEAT_ASYNC_EVENT_CONFIGURATION:
DPRINTF((" async event configuration 0x%x\r\n",
DPRINTF((" async event configuration 0x%x",
command->cdw11));
sc->async_ev_config = command->cdw11;
break;
case NVME_FEAT_SOFTWARE_PROGRESS_MARKER:
DPRINTF((" software progress marker 0x%x\r\n",
DPRINTF((" software progress marker 0x%x",
command->cdw11));
break;
case 0x0C:
DPRINTF((" autonomous power state transition 0x%x\r\n",
DPRINTF((" autonomous power state transition 0x%x",
command->cdw11));
break;
default:
WPRINTF(("%s invalid feature\r\n", __func__));
WPRINTF(("%s invalid feature", __func__));
pci_nvme_status_genc(&compl->status, NVME_SC_INVALID_FIELD);
return (1);
}
@ -921,22 +922,22 @@ nvme_opc_get_features(struct pci_nvme_softc* sc, struct nvme_command* command,
{
int feature = command->cdw10 & 0xFF;
DPRINTF(("%s feature 0x%x\r\n", __func__, feature));
DPRINTF(("%s feature 0x%x", __func__, feature));
compl->cdw0 = 0;
switch (feature) {
case NVME_FEAT_ARBITRATION:
DPRINTF((" arbitration\r\n"));
DPRINTF((" arbitration"));
break;
case NVME_FEAT_POWER_MANAGEMENT:
DPRINTF((" power management\r\n"));
DPRINTF((" power management"));
break;
case NVME_FEAT_LBA_RANGE_TYPE:
DPRINTF((" lba range\r\n"));
DPRINTF((" lba range"));
break;
case NVME_FEAT_TEMPERATURE_THRESHOLD:
DPRINTF((" temperature threshold\r\n"));
DPRINTF((" temperature threshold"));
switch ((command->cdw11 >> 20) & 0x3) {
case 0:
/* Over temp threshold */
@ -947,47 +948,47 @@ nvme_opc_get_features(struct pci_nvme_softc* sc, struct nvme_command* command,
compl->cdw0 = 0;
break;
default:
WPRINTF((" invalid threshold type select\r\n"));
WPRINTF((" invalid threshold type select"));
pci_nvme_status_genc(&compl->status,
NVME_SC_INVALID_FIELD);
return (1);
}
break;
case NVME_FEAT_ERROR_RECOVERY:
DPRINTF((" error recovery\r\n"));
DPRINTF((" error recovery"));
break;
case NVME_FEAT_VOLATILE_WRITE_CACHE:
DPRINTF((" volatile write cache\r\n"));
DPRINTF((" volatile write cache"));
break;
case NVME_FEAT_NUMBER_OF_QUEUES:
compl->cdw0 = NVME_FEATURE_NUM_QUEUES(sc);
DPRINTF((" number of queues (submit %u, completion %u)\r\n",
DPRINTF((" number of queues (submit %u, completion %u)",
compl->cdw0 & 0xFFFF,
(compl->cdw0 >> 16) & 0xFFFF));
break;
case NVME_FEAT_INTERRUPT_COALESCING:
DPRINTF((" interrupt coalescing\r\n"));
DPRINTF((" interrupt coalescing"));
break;
case NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION:
DPRINTF((" interrupt vector configuration\r\n"));
DPRINTF((" interrupt vector configuration"));
break;
case NVME_FEAT_WRITE_ATOMICITY:
DPRINTF((" write atomicity\r\n"));
DPRINTF((" write atomicity"));
break;
case NVME_FEAT_ASYNC_EVENT_CONFIGURATION:
DPRINTF((" async event configuration\r\n"));
DPRINTF((" async event configuration"));
sc->async_ev_config = command->cdw11;
break;
case NVME_FEAT_SOFTWARE_PROGRESS_MARKER:
DPRINTF((" software progress marker\r\n"));
DPRINTF((" software progress marker"));
break;
case 0x0C:
DPRINTF((" autonomous power state transition\r\n"));
DPRINTF((" autonomous power state transition"));
break;
default:
WPRINTF(("%s invalid feature 0x%x\r\n", __func__, feature));
WPRINTF(("%s invalid feature 0x%x", __func__, feature));
pci_nvme_status_genc(&compl->status, NVME_SC_INVALID_FIELD);
return (1);
}
@ -1000,7 +1001,7 @@ static int
nvme_opc_abort(struct pci_nvme_softc* sc, struct nvme_command* command,
struct nvme_completion* compl)
{
DPRINTF(("%s submission queue %u, command ID 0x%x\r\n", __func__,
DPRINTF(("%s submission queue %u, command ID 0x%x", __func__,
command->cdw10 & 0xFFFF, (command->cdw10 >> 16) & 0xFFFF));
/* TODO: search for the command ID and abort it */
@ -1014,7 +1015,7 @@ static int
nvme_opc_async_event_req(struct pci_nvme_softc* sc,
struct nvme_command* command, struct nvme_completion* compl)
{
DPRINTF(("%s async event request 0x%x\r\n", __func__, command->cdw11));
DPRINTF(("%s async event request 0x%x", __func__, command->cdw11));
/*
* TODO: raise events when they happen based on the Set Features cmd.
@ -1036,19 +1037,19 @@ pci_nvme_handle_admin_cmd(struct pci_nvme_softc* sc, uint64_t value)
int do_intr = 0;
uint16_t sqhead;
DPRINTF(("%s index %u\r\n", __func__, (uint32_t)value));
DPRINTF(("%s index %u", __func__, (uint32_t)value));
sq = &sc->submit_queues[0];
sqhead = atomic_load_acq_short(&sq->head);
if (atomic_testandset_int(&sq->busy, 1)) {
DPRINTF(("%s SQ busy, head %u, tail %u\r\n",
DPRINTF(("%s SQ busy, head %u, tail %u",
__func__, sqhead, sq->tail));
return;
}
DPRINTF(("sqhead %u, tail %u\r\n", sqhead, sq->tail));
DPRINTF(("sqhead %u, tail %u", sqhead, sq->tail));
while (sqhead != atomic_load_acq_short(&sq->tail)) {
cmd = &(sq->qbase)[sqhead];
@ -1057,50 +1058,50 @@ pci_nvme_handle_admin_cmd(struct pci_nvme_softc* sc, uint64_t value)
switch (cmd->opc) {
case NVME_OPC_DELETE_IO_SQ:
DPRINTF(("%s command DELETE_IO_SQ\r\n", __func__));
DPRINTF(("%s command DELETE_IO_SQ", __func__));
do_intr |= nvme_opc_delete_io_sq(sc, cmd, &compl);
break;
case NVME_OPC_CREATE_IO_SQ:
DPRINTF(("%s command CREATE_IO_SQ\r\n", __func__));
DPRINTF(("%s command CREATE_IO_SQ", __func__));
do_intr |= nvme_opc_create_io_sq(sc, cmd, &compl);
break;
case NVME_OPC_DELETE_IO_CQ:
DPRINTF(("%s command DELETE_IO_CQ\r\n", __func__));
DPRINTF(("%s command DELETE_IO_CQ", __func__));
do_intr |= nvme_opc_delete_io_cq(sc, cmd, &compl);
break;
case NVME_OPC_CREATE_IO_CQ:
DPRINTF(("%s command CREATE_IO_CQ\r\n", __func__));
DPRINTF(("%s command CREATE_IO_CQ", __func__));
do_intr |= nvme_opc_create_io_cq(sc, cmd, &compl);
break;
case NVME_OPC_GET_LOG_PAGE:
DPRINTF(("%s command GET_LOG_PAGE\r\n", __func__));
DPRINTF(("%s command GET_LOG_PAGE", __func__));
do_intr |= nvme_opc_get_log_page(sc, cmd, &compl);
break;
case NVME_OPC_IDENTIFY:
DPRINTF(("%s command IDENTIFY\r\n", __func__));
DPRINTF(("%s command IDENTIFY", __func__));
do_intr |= nvme_opc_identify(sc, cmd, &compl);
break;
case NVME_OPC_ABORT:
DPRINTF(("%s command ABORT\r\n", __func__));
DPRINTF(("%s command ABORT", __func__));
do_intr |= nvme_opc_abort(sc, cmd, &compl);
break;
case NVME_OPC_SET_FEATURES:
DPRINTF(("%s command SET_FEATURES\r\n", __func__));
DPRINTF(("%s command SET_FEATURES", __func__));
do_intr |= nvme_opc_set_features(sc, cmd, &compl);
break;
case NVME_OPC_GET_FEATURES:
DPRINTF(("%s command GET_FEATURES\r\n", __func__));
DPRINTF(("%s command GET_FEATURES", __func__));
do_intr |= nvme_opc_get_features(sc, cmd, &compl);
break;
case NVME_OPC_ASYNC_EVENT_REQUEST:
DPRINTF(("%s command ASYNC_EVENT_REQ\r\n", __func__));
DPRINTF(("%s command ASYNC_EVENT_REQ", __func__));
/* XXX dont care, unhandled for now
do_intr |= nvme_opc_async_event_req(sc, cmd, &compl);
*/
compl.status = NVME_NO_STATUS;
break;
default:
WPRINTF(("0x%x command is not implemented\r\n",
WPRINTF(("0x%x command is not implemented",
cmd->opc));
pci_nvme_status_genc(&compl.status, NVME_SC_INVALID_OPCODE);
do_intr |= 1;
@ -1127,7 +1128,7 @@ pci_nvme_handle_admin_cmd(struct pci_nvme_softc* sc, uint64_t value)
sqhead = (sqhead + 1) % sq->size;
}
DPRINTF(("setting sqhead %u\r\n", sqhead));
DPRINTF(("setting sqhead %u", sqhead));
atomic_store_short(&sq->head, sqhead);
atomic_store_int(&sq->busy, 0);
@ -1162,7 +1163,7 @@ pci_nvme_append_iov_req(struct pci_nvme_softc *sc, struct pci_nvme_ioreq *req,
if (iovidx == NVME_MAX_BLOCKIOVS) {
int err = 0;
DPRINTF(("large I/O, doing partial req\r\n"));
DPRINTF(("large I/O, doing partial req"));
iovidx = 0;
req->io_req.br_iovcnt = 0;
@ -1206,7 +1207,7 @@ pci_nvme_append_iov_req(struct pci_nvme_softc *sc, struct pci_nvme_ioreq *req,
void *gptr;
if ((lba + size) > sc->nvstore.size) {
WPRINTF(("%s write would overflow RAM\r\n", __func__));
WPRINTF(("%s write would overflow RAM", __func__));
return (-1);
}
@ -1230,7 +1231,7 @@ pci_nvme_set_completion(struct pci_nvme_softc *sc,
int do_intr = 0;
int phase;
DPRINTF(("%s sqid %d cqid %u cid %u status: 0x%x 0x%x\r\n",
DPRINTF(("%s sqid %d cqid %u cid %u status: 0x%x 0x%x",
__func__, sqid, sq->cqid, cid, NVME_STATUS_GET_SCT(status),
NVME_STATUS_GET_SC(status)));
@ -1321,7 +1322,7 @@ pci_nvme_io_done(struct blockif_req *br, int err)
struct nvme_submission_queue *sq = req->nvme_sq;
uint16_t code, status;
DPRINTF(("%s error %d %s\r\n", __func__, err, strerror(err)));
DPRINTF(("%s error %d %s", __func__, err, strerror(err)));
/* TODO return correct error */
code = err ? NVME_SC_DATA_TRANSFER_ERROR : NVME_SC_SUCCESS;
@ -1336,7 +1337,7 @@ pci_nvme_io_partial(struct blockif_req *br, int err)
{
struct pci_nvme_ioreq *req = br->br_param;
DPRINTF(("%s error %d %s\r\n", __func__, err, strerror(err)));
DPRINTF(("%s error %d %s", __func__, err, strerror(err)));
pthread_cond_signal(&req->cv);
}
@ -1354,13 +1355,13 @@ pci_nvme_handle_io_cmd(struct pci_nvme_softc* sc, uint16_t idx)
sq = &sc->submit_queues[idx];
if (atomic_testandset_int(&sq->busy, 1)) {
DPRINTF(("%s sqid %u busy\r\n", __func__, idx));
DPRINTF(("%s sqid %u busy", __func__, idx));
return;
}
sqhead = atomic_load_acq_short(&sq->head);
DPRINTF(("nvme_handle_io qid %u head %u tail %u cmdlist %p\r\n",
DPRINTF(("nvme_handle_io qid %u head %u tail %u cmdlist %p",
idx, sqhead, sq->tail, sq->qbase));
while (sqhead != atomic_load_acq_short(&sq->tail)) {
@ -1384,7 +1385,7 @@ pci_nvme_handle_io_cmd(struct pci_nvme_softc* sc, uint16_t idx)
continue;
} else if (cmd->opc == 0x08) {
/* TODO: write zeroes */
WPRINTF(("%s write zeroes lba 0x%lx blocks %u\r\n",
WPRINTF(("%s write zeroes lba 0x%lx blocks %u",
__func__, lba, cmd->cdw12 & 0xFFFF));
pci_nvme_status_genc(&status, NVME_SC_SUCCESS);
pci_nvme_set_completion(sc, sq, idx, cmd->cid, 0,
@ -1409,7 +1410,7 @@ pci_nvme_handle_io_cmd(struct pci_nvme_softc* sc, uint16_t idx)
*/
DPRINTF(("[h%u:t%u:n%u] %s starting LBA 0x%lx blocks %lu "
"(%lu-bytes)\r\n",
"(%lu-bytes)",
sqhead==0 ? sq->size-1 : sqhead-1, sq->tail, sq->size,
cmd->opc == NVME_OPC_WRITE ?
"WRITE" : "READ",
@ -1418,7 +1419,7 @@ pci_nvme_handle_io_cmd(struct pci_nvme_softc* sc, uint16_t idx)
cmd->prp1 &= ~(0x03UL);
cmd->prp2 &= ~(0x03UL);
DPRINTF((" prp1 0x%lx prp2 0x%lx\r\n", cmd->prp1, cmd->prp2));
DPRINTF((" prp1 0x%lx prp2 0x%lx", cmd->prp1, cmd->prp2));
size = bytes;
lba *= sc->nvstore.sectsz;
@ -1476,7 +1477,7 @@ pci_nvme_handle_io_cmd(struct pci_nvme_softc* sc, uint16_t idx)
i = 0;
}
if (prp_list[i] == 0) {
WPRINTF(("PRP2[%d] = 0 !!!\r\n", i));
WPRINTF(("PRP2[%d] = 0 !!!", i));
err = 1;
break;
}
@ -1522,7 +1523,7 @@ pci_nvme_handle_io_cmd(struct pci_nvme_softc* sc, uint16_t idx)
err = blockif_write(sc->nvstore.ctx, &req->io_req);
break;
default:
WPRINTF(("%s unhandled io command 0x%x\r\n",
WPRINTF(("%s unhandled io command 0x%x",
__func__, cmd->opc));
err = 1;
}
@ -1548,7 +1549,7 @@ static void
pci_nvme_handle_doorbell(struct vmctx *ctx, struct pci_nvme_softc* sc,
uint64_t idx, int is_sq, uint64_t value)
{
DPRINTF(("nvme doorbell %lu, %s, val 0x%lx\r\n",
DPRINTF(("nvme doorbell %lu, %s, val 0x%lx",
idx, is_sq ? "SQ" : "CQ", value & 0xFFFF));
if (is_sq) {
@ -1561,7 +1562,7 @@ pci_nvme_handle_doorbell(struct vmctx *ctx, struct pci_nvme_softc* sc,
/* submission queue; handle new entries in SQ */
if (idx > sc->num_squeues) {
WPRINTF(("%s SQ index %lu overflow from "
"guest (max %u)\r\n",
"guest (max %u)",
__func__, idx, sc->num_squeues));
return;
}
@ -1570,7 +1571,7 @@ pci_nvme_handle_doorbell(struct vmctx *ctx, struct pci_nvme_softc* sc,
} else {
if (idx > sc->num_cqueues) {
WPRINTF(("%s queue index %lu overflow from "
"guest (max %u)\r\n",
"guest (max %u)",
__func__, idx, sc->num_cqueues));
return;
}
@ -1586,46 +1587,46 @@ pci_nvme_bar0_reg_dumps(const char *func, uint64_t offset, int iswrite)
switch (offset) {
case NVME_CR_CAP_LOW:
DPRINTF(("%s %s NVME_CR_CAP_LOW\r\n", func, s));
DPRINTF(("%s %s NVME_CR_CAP_LOW", func, s));
break;
case NVME_CR_CAP_HI:
DPRINTF(("%s %s NVME_CR_CAP_HI\r\n", func, s));
DPRINTF(("%s %s NVME_CR_CAP_HI", func, s));
break;
case NVME_CR_VS:
DPRINTF(("%s %s NVME_CR_VS\r\n", func, s));
DPRINTF(("%s %s NVME_CR_VS", func, s));
break;
case NVME_CR_INTMS:
DPRINTF(("%s %s NVME_CR_INTMS\r\n", func, s));
DPRINTF(("%s %s NVME_CR_INTMS", func, s));
break;
case NVME_CR_INTMC:
DPRINTF(("%s %s NVME_CR_INTMC\r\n", func, s));
DPRINTF(("%s %s NVME_CR_INTMC", func, s));
break;
case NVME_CR_CC:
DPRINTF(("%s %s NVME_CR_CC\r\n", func, s));
DPRINTF(("%s %s NVME_CR_CC", func, s));
break;
case NVME_CR_CSTS:
DPRINTF(("%s %s NVME_CR_CSTS\r\n", func, s));
DPRINTF(("%s %s NVME_CR_CSTS", func, s));
break;
case NVME_CR_NSSR:
DPRINTF(("%s %s NVME_CR_NSSR\r\n", func, s));
DPRINTF(("%s %s NVME_CR_NSSR", func, s));
break;
case NVME_CR_AQA:
DPRINTF(("%s %s NVME_CR_AQA\r\n", func, s));
DPRINTF(("%s %s NVME_CR_AQA", func, s));
break;
case NVME_CR_ASQ_LOW:
DPRINTF(("%s %s NVME_CR_ASQ_LOW\r\n", func, s));
DPRINTF(("%s %s NVME_CR_ASQ_LOW", func, s));
break;
case NVME_CR_ASQ_HI:
DPRINTF(("%s %s NVME_CR_ASQ_HI\r\n", func, s));
DPRINTF(("%s %s NVME_CR_ASQ_HI", func, s));
break;
case NVME_CR_ACQ_LOW:
DPRINTF(("%s %s NVME_CR_ACQ_LOW\r\n", func, s));
DPRINTF(("%s %s NVME_CR_ACQ_LOW", func, s));
break;
case NVME_CR_ACQ_HI:
DPRINTF(("%s %s NVME_CR_ACQ_HI\r\n", func, s));
DPRINTF(("%s %s NVME_CR_ACQ_HI", func, s));
break;
default:
DPRINTF(("unknown nvme bar-0 offset 0x%lx\r\n", offset));
DPRINTF(("unknown nvme bar-0 offset 0x%lx", offset));
}
}
@ -1652,7 +1653,7 @@ pci_nvme_write_bar_0(struct vmctx *ctx, struct pci_nvme_softc* sc,
return;
}
DPRINTF(("nvme-write offset 0x%lx, size %d, value 0x%lx\r\n",
DPRINTF(("nvme-write offset 0x%lx, size %d, value 0x%lx",
offset, size, value));
if (size != 4) {
@ -1685,7 +1686,7 @@ pci_nvme_write_bar_0(struct vmctx *ctx, struct pci_nvme_softc* sc,
ccreg = (uint32_t)value;
DPRINTF(("%s NVME_CR_CC en %x css %x shn %x iosqes %u "
"iocqes %u\r\n",
"iocqes %u",
__func__,
NVME_CC_GET_EN(ccreg), NVME_CC_GET_CSS(ccreg),
NVME_CC_GET_SHN(ccreg), NVME_CC_GET_IOSQES(ccreg),
@ -1743,7 +1744,7 @@ pci_nvme_write_bar_0(struct vmctx *ctx, struct pci_nvme_softc* sc,
(value << 32);
break;
default:
DPRINTF(("%s unknown offset 0x%lx, value 0x%lx size %d\r\n",
DPRINTF(("%s unknown offset 0x%lx, value 0x%lx size %d",
__func__, offset, value, size));
}
pthread_mutex_unlock(&sc->mtx);
@ -1758,7 +1759,7 @@ pci_nvme_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
if (baridx == pci_msix_table_bar(pi) ||
baridx == pci_msix_pba_bar(pi)) {
DPRINTF(("nvme-write baridx %d, msix: off 0x%lx, size %d, "
" value 0x%lx\r\n", baridx, offset, size, value));
" value 0x%lx", baridx, offset, size, value));
pci_emul_msix_twrite(pi, offset, size, value);
return;
@ -1770,7 +1771,7 @@ pci_nvme_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
break;
default:
DPRINTF(("%s unknown baridx %d, val 0x%lx\r\n",
DPRINTF(("%s unknown baridx %d, val 0x%lx",
__func__, baridx, value));
}
}
@ -1789,7 +1790,7 @@ static uint64_t pci_nvme_read_bar_0(struct pci_nvme_softc* sc,
pthread_mutex_unlock(&sc->mtx);
} else {
value = 0;
WPRINTF(("pci_nvme: read invalid offset %ld\r\n", offset));
WPRINTF(("pci_nvme: read invalid offset %ld", offset));
}
switch (size) {
@ -1804,7 +1805,7 @@ static uint64_t pci_nvme_read_bar_0(struct pci_nvme_softc* sc,
break;
}
DPRINTF((" nvme-read offset 0x%lx, size %d -> value 0x%x\r\n",
DPRINTF((" nvme-read offset 0x%lx, size %d -> value 0x%x",
offset, size, (uint32_t)value));
return (value);
@ -1820,7 +1821,7 @@ pci_nvme_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
if (baridx == pci_msix_table_bar(pi) ||
baridx == pci_msix_pba_bar(pi)) {
DPRINTF(("nvme-read bar: %d, msix: regoff 0x%lx, size %d\r\n",
DPRINTF(("nvme-read bar: %d, msix: regoff 0x%lx, size %d",
baridx, offset, size));
return pci_emul_msix_tread(pi, offset, size);
@ -1831,7 +1832,7 @@ pci_nvme_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
return pci_nvme_read_bar_0(sc, offset, size);
default:
DPRINTF(("unknown bar %d, 0x%lx\r\n", baridx, offset));
DPRINTF(("unknown bar %d, 0x%lx", baridx, offset));
}
return (0);
@ -1907,7 +1908,7 @@ pci_nvme_parse_opts(struct pci_nvme_softc *sc, char *opts)
sc->nvstore.type = NVME_STOR_BLOCKIF;
sc->nvstore.size = blockif_size(sc->nvstore.ctx);
} else {
fprintf(stderr, "Invalid option %s\r\n", xopts);
EPRINTLN("Invalid option %s", xopts);
free(uopt);
return (-1);
}
@ -1917,7 +1918,7 @@ pci_nvme_parse_opts(struct pci_nvme_softc *sc, char *opts)
free(uopt);
if (sc->nvstore.ctx == NULL || sc->nvstore.size == 0) {
fprintf(stderr, "backing store not specified\r\n");
EPRINTLN("backing store not specified");
return (-1);
}
if (sectsz == 512 || sectsz == 4096 || sectsz == 8192)
@ -1932,11 +1933,11 @@ pci_nvme_parse_opts(struct pci_nvme_softc *sc, char *opts)
sc->max_queues = NVME_QUEUES;
if (sc->max_qentries <= 0) {
fprintf(stderr, "Invalid qsz option\r\n");
EPRINTLN("Invalid qsz option");
return (-1);
}
if (sc->ioslots <= 0) {
fprintf(stderr, "Invalid ioslots option\r\n");
EPRINTLN("Invalid ioslots option");
return (-1);
}
@ -1990,23 +1991,23 @@ pci_nvme_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
2 * sizeof(uint32_t) * (sc->max_queues + 1);
pci_membar_sz = MAX(pci_membar_sz, NVME_MMIO_SPACE_MIN);
DPRINTF(("nvme membar size: %u\r\n", pci_membar_sz));
DPRINTF(("nvme membar size: %u", pci_membar_sz));
error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM64, pci_membar_sz);
if (error) {
WPRINTF(("%s pci alloc mem bar failed\r\n", __func__));
WPRINTF(("%s pci alloc mem bar failed", __func__));
goto done;
}
error = pci_emul_add_msixcap(pi, sc->max_queues + 1, NVME_MSIX_BAR);
if (error) {
WPRINTF(("%s pci add msixcap failed\r\n", __func__));
WPRINTF(("%s pci add msixcap failed", __func__));
goto done;
}
error = pci_emul_add_pciecap(pi, PCIEM_TYPE_ROOT_INT_EP);
if (error) {
WPRINTF(("%s pci add Express capability failed\r\n", __func__));
WPRINTF(("%s pci add Express capability failed", __func__));
goto done;
}

5
usr.sbin/bhyve/pci_uart.c
View File

@ -36,6 +36,7 @@ __FBSDID("$FreeBSD$");
#include <stdio.h>
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "uart_emul.h"
@ -104,8 +105,8 @@ pci_uart_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
pi->pi_arg = sc;
if (uart_set_backend(sc, opts) != 0) {
fprintf(stderr, "Unable to initialize backend '%s' for "
"pci uart at %d:%d\n", opts, pi->pi_slot, pi->pi_func);
EPRINTLN("Unable to initialize backend '%s' for "
"pci uart at %d:%d", opts, pi->pi_slot, pi->pi_func);
return (-1);
}

13
usr.sbin/bhyve/pci_virtio_block.c
View File

@ -52,6 +52,7 @@ __FBSDID("$FreeBSD$");
#include <md5.h>
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "virtio.h"
#include "block_if.h"
@ -123,8 +124,8 @@ struct virtio_blk_hdr {
* Debug printf
*/
static int pci_vtblk_debug;
#define DPRINTF(params) if (pci_vtblk_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (pci_vtblk_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
struct pci_vtblk_ioreq {
struct blockif_req io_req;
@ -168,7 +169,7 @@ pci_vtblk_reset(void *vsc)
{
struct pci_vtblk_softc *sc = vsc;
DPRINTF(("vtblk: device reset requested !\n\r"));
DPRINTF(("vtblk: device reset requested !"));
vi_reset_dev(&sc->vbsc_vs);
}
@ -252,7 +253,7 @@ pci_vtblk_proc(struct pci_vtblk_softc *sc, struct vqueue_info *vq)
}
io->io_req.br_resid = iolen;
DPRINTF(("virtio-block: %s op, %zd bytes, %d segs, offset %ld\n\r",
DPRINTF(("virtio-block: %s op, %zd bytes, %d segs, offset %ld",
writeop ? "write" : "read/ident", iolen, i - 1,
io->io_req.br_offset));
@ -303,7 +304,7 @@ pci_vtblk_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
int i, sectsz, sts, sto;
if (opts == NULL) {
WPRINTF(("virtio-block: backing device required\n\r"));
WPRINTF(("virtio-block: backing device required"));
return (1);
}
@ -399,7 +400,7 @@ static int
pci_vtblk_cfgwrite(void *vsc, int offset, int size, uint32_t value)
{
DPRINTF(("vtblk: write to readonly reg %d\n\r", offset));
DPRINTF(("vtblk: write to readonly reg %d", offset));
return (1);
}

11
usr.sbin/bhyve/pci_virtio_console.c
View File

@ -60,6 +60,7 @@ __FBSDID("$FreeBSD$");
#include <sysexits.h>
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "virtio.h"
#include "mevent.h"
@ -85,8 +86,8 @@ __FBSDID("$FreeBSD$");
(VTCON_F_SIZE | VTCON_F_MULTIPORT | VTCON_F_EMERG_WRITE)
static int pci_vtcon_debug;
#define DPRINTF(params) if (pci_vtcon_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (pci_vtcon_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
struct pci_vtcon_softc;
struct pci_vtcon_port;
@ -187,7 +188,7 @@ pci_vtcon_reset(void *vsc)
sc = vsc;
DPRINTF(("vtcon: device reset requested!\n\r"));
DPRINTF(("vtcon: device reset requested!"));
vi_reset_dev(&sc->vsc_vs);
}
@ -498,7 +499,7 @@ pci_vtcon_control_tx(struct pci_vtcon_port *port, void *arg, struct iovec *iov,
case VTCON_PORT_READY:
if (ctrl->id >= sc->vsc_nports) {
WPRINTF(("VTCON_PORT_READY event for unknown port %d\n\r",
WPRINTF(("VTCON_PORT_READY event for unknown port %d",
ctrl->id));
return;
}
@ -663,7 +664,7 @@ pci_vtcon_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
/* create port */
if (pci_vtcon_sock_add(sc, portname, portpath) < 0) {
fprintf(stderr, "cannot create port %s: %s\n",
EPRINTLN("cannot create port %s: %s",
portname, strerror(errno));
return (1);
}

11
usr.sbin/bhyve/pci_virtio_net.c
View File

@ -53,6 +53,7 @@ __FBSDID("$FreeBSD$");
#include <pthread_np.h>
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "mevent.h"
#include "virtio.h"
@ -91,8 +92,8 @@ struct virtio_net_config {
* Debug printf
*/
static int pci_vtnet_debug;
#define DPRINTF(params) if (pci_vtnet_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (pci_vtnet_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
/*
* Per-device softc
@ -143,7 +144,7 @@ pci_vtnet_reset(void *vsc)
{
struct pci_vtnet_softc *sc = vsc;
DPRINTF(("vtnet: device reset requested !\n\r"));
DPRINTF(("vtnet: device reset requested !"));
/* Acquire the RX lock to block RX processing. */
pthread_mutex_lock(&sc->rx_mtx);
@ -427,7 +428,7 @@ static void
pci_vtnet_ping_ctlq(void *vsc, struct vqueue_info *vq)
{
DPRINTF(("vtnet: control qnotify!\n\r"));
DPRINTF(("vtnet: control qnotify!"));
}
#endif
@ -552,7 +553,7 @@ pci_vtnet_cfgwrite(void *vsc, int offset, int size, uint32_t value)
memcpy(ptr, &value, size);
} else {
/* silently ignore other writes */
DPRINTF(("vtnet: write to readonly reg %d\n\r", offset));
DPRINTF(("vtnet: write to readonly reg %d", offset));
}
return (0);

11
usr.sbin/bhyve/pci_virtio_rnd.c
View File

@ -58,6 +58,7 @@ __FBSDID("$FreeBSD$");
#include <sysexits.h>
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "virtio.h"
@ -65,8 +66,8 @@ __FBSDID("$FreeBSD$");
static int pci_vtrnd_debug;
#define DPRINTF(params) if (pci_vtrnd_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (pci_vtrnd_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
/*
* Per-device softc
@ -102,7 +103,7 @@ pci_vtrnd_reset(void *vsc)
sc = vsc;
DPRINTF(("vtrnd: device reset requested !\n\r"));
DPRINTF(("vtrnd: device reset requested !"));
vi_reset_dev(&sc->vrsc_vs);
}
@ -127,7 +128,7 @@ pci_vtrnd_notify(void *vsc, struct vqueue_info *vq)
len = read(sc->vrsc_fd, iov.iov_base, iov.iov_len);
DPRINTF(("vtrnd: vtrnd_notify(): %d\r\n", len));
DPRINTF(("vtrnd: vtrnd_notify(): %d", len));
/* Catastrophe if unable to read from /dev/random */
assert(len > 0);
@ -170,7 +171,7 @@ pci_vtrnd_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
*/
len = read(fd, &v, sizeof(v));
if (len <= 0) {
WPRINTF(("vtrnd: /dev/random not ready, read(): %d\n\r", len));
WPRINTF(("vtrnd: /dev/random not ready, read(): %d", len));
close(fd);
return (1);
}

23
usr.sbin/bhyve/pci_virtio_scsi.c
View File

@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$");
#include <camlib.h>
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "virtio.h"
#include "iov.h"
@ -86,8 +87,8 @@ __FBSDID("$FreeBSD$");
#define VIRTIO_SCSI_F_CHANGE (1 << 2)
static int pci_vtscsi_debug = 0;
#define DPRINTF(params) if (pci_vtscsi_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (pci_vtscsi_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
struct pci_vtscsi_config {
uint32_t num_queues;
@ -287,7 +288,7 @@ pci_vtscsi_proc(void *arg)
vq_endchains(q->vsq_vq, 0);
pthread_mutex_unlock(&q->vsq_qmtx);
DPRINTF(("virtio-scsi: request <idx=%d> completed\n\r",
DPRINTF(("virtio-scsi: request <idx=%d> completed",
req->vsr_idx));
free(req);
}
@ -303,7 +304,7 @@ pci_vtscsi_reset(void *vsc)
sc = vsc;
DPRINTF(("vtscsi: device reset requested\n\r"));
DPRINTF(("vtscsi: device reset requested"));
vi_reset_dev(&sc->vss_vs);
/* initialize config structure */
@ -432,13 +433,13 @@ pci_vtscsi_tmf_handle(struct pci_vtscsi_softc *sc,
struct sbuf *sb = sbuf_new_auto();
ctl_io_sbuf(io, sb);
sbuf_finish(sb);
DPRINTF(("pci_virtio_scsi: %s\n\r", sbuf_data(sb)));
DPRINTF(("pci_virtio_scsi: %s", sbuf_data(sb)));
sbuf_delete(sb);
}
err = ioctl(sc->vss_ctl_fd, CTL_IO, io);
if (err != 0)
WPRINTF(("CTL_IO: err=%d (%s)\n\r", errno, strerror(errno)));
WPRINTF(("CTL_IO: err=%d (%s)", errno, strerror(errno)));
tmf->response = io->taskio.task_status;
ctl_scsi_free_io(io);
@ -525,13 +526,13 @@ pci_vtscsi_request_handle(struct pci_vtscsi_queue *q, struct iovec *iov_in,
struct sbuf *sb = sbuf_new_auto();
ctl_io_sbuf(io, sb);
sbuf_finish(sb);
DPRINTF(("pci_virtio_scsi: %s\n\r", sbuf_data(sb)));
DPRINTF(("pci_virtio_scsi: %s", sbuf_data(sb)));
sbuf_delete(sb);
}
err = ioctl(sc->vss_ctl_fd, CTL_IO, io);
if (err != 0) {
WPRINTF(("CTL_IO: err=%d (%s)\n\r", errno, strerror(errno)));
WPRINTF(("CTL_IO: err=%d (%s)", errno, strerror(errno)));
cmd_wr->response = VIRTIO_SCSI_S_FAILURE;
} else {
cmd_wr->sense_len = MIN(io->scsiio.sense_len,
@ -627,7 +628,7 @@ pci_vtscsi_requestq_notify(void *vsc, struct vqueue_info *vq)
pthread_cond_signal(&q->vsq_cv);
pthread_mutex_unlock(&q->vsq_mtx);
DPRINTF(("virtio-scsi: request <idx=%d> enqueued\n\r", idx));
DPRINTF(("virtio-scsi: request <idx=%d> enqueued", idx));
}
}
@ -683,7 +684,7 @@ pci_vtscsi_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
} else if (strcmp(optname, "iid") == 0 && opt != NULL) {
sc->vss_iid = strtoul(opt, NULL, 10);
} else {
fprintf(stderr, "Invalid option %s\n\r", optname);
EPRINTLN("Invalid option %s", optname);
free(sc);
return (1);
}
@ -692,7 +693,7 @@ pci_vtscsi_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
sc->vss_ctl_fd = open(devname, O_RDWR);
if (sc->vss_ctl_fd < 0) {
WPRINTF(("cannot open %s: %s\n\r", devname, strerror(errno)));
WPRINTF(("cannot open %s: %s", devname, strerror(errno)));
free(sc);
return (1);
}

270
usr.sbin/bhyve/pci_xhci.c
View File

@ -54,14 +54,15 @@ __FBSDID("$FreeBSD$");
#include <xhcireg.h>
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "pci_xhci.h"
#include "usb_emul.h"
static int xhci_debug = 0;
#define DPRINTF(params) if (xhci_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (xhci_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
#define XHCI_NAME "xhci"
@ -446,19 +447,19 @@ pci_xhci_portregs_write(struct pci_xhci_softc *sc, uint64_t offset,
port = (offset - XHCI_PORTREGS_PORT0) / XHCI_PORTREGS_SETSZ;
offset = (offset - XHCI_PORTREGS_PORT0) % XHCI_PORTREGS_SETSZ;
DPRINTF(("pci_xhci: portregs wr offset 0x%lx, port %u: 0x%lx\r\n",
DPRINTF(("pci_xhci: portregs wr offset 0x%lx, port %u: 0x%lx",
offset, port, value));
assert(port >= 0);
if (port > XHCI_MAX_DEVS) {
DPRINTF(("pci_xhci: portregs_write port %d > ndevices\r\n",
DPRINTF(("pci_xhci: portregs_write port %d > ndevices",
port));
return;
}
if (XHCI_DEVINST_PTR(sc, port) == NULL) {
DPRINTF(("pci_xhci: portregs_write to unattached port %d\r\n",
DPRINTF(("pci_xhci: portregs_write to unattached port %d",
port));
}
@ -473,7 +474,7 @@ pci_xhci_portregs_write(struct pci_xhci_softc *sc, uint64_t offset,
if ((p->portsc & XHCI_PS_PP) == 0) {
WPRINTF(("pci_xhci: portregs_write to unpowered "
"port %d\r\n", port));
"port %d", port));
break;
}
@ -509,12 +510,12 @@ pci_xhci_portregs_write(struct pci_xhci_softc *sc, uint64_t offset,
/* port disable request; for USB3, don't care */
if (value & XHCI_PS_PED)
DPRINTF(("Disable port %d request\r\n", port));
DPRINTF(("Disable port %d request", port));
if (!(value & XHCI_PS_LWS))
break;
DPRINTF(("Port new PLS: %d\r\n", newpls));
DPRINTF(("Port new PLS: %d", newpls));
switch (newpls) {
case 0: /* U0 */
case 3: /* U3 */
@ -534,7 +535,7 @@ pci_xhci_portregs_write(struct pci_xhci_softc *sc, uint64_t offset,
break;
default:
DPRINTF(("Unhandled change port %d PLS %u\r\n",
DPRINTF(("Unhandled change port %d PLS %u",
port, newpls));
break;
}
@ -545,7 +546,7 @@ pci_xhci_portregs_write(struct pci_xhci_softc *sc, uint64_t offset,
break;
case 8:
/* Port link information register */
DPRINTF(("pci_xhci attempted write to PORTLI, port %d\r\n",
DPRINTF(("pci_xhci attempted write to PORTLI, port %d",
port));
break;
case 12:
@ -570,11 +571,11 @@ pci_xhci_get_dev_ctx(struct pci_xhci_softc *sc, uint32_t slot)
devctx_addr = sc->opregs.dcbaa_p->dcba[slot];
if (devctx_addr == 0) {
DPRINTF(("get_dev_ctx devctx_addr == 0\r\n"));
DPRINTF(("get_dev_ctx devctx_addr == 0"));
return (NULL);
}
DPRINTF(("pci_xhci: get dev ctx, slot %u devctx addr %016lx\r\n",
DPRINTF(("pci_xhci: get dev ctx, slot %u devctx addr %016lx",
slot, devctx_addr));
devctx = XHCI_GADDR(sc, devctx_addr & ~0x3FUL);
@ -644,7 +645,7 @@ pci_xhci_init_ep(struct pci_xhci_dev_emu *dev, int epid)
devep = &dev->eps[epid];
pstreams = XHCI_EPCTX_0_MAXP_STREAMS_GET(ep_ctx->dwEpCtx0);
if (pstreams > 0) {
DPRINTF(("init_ep %d with pstreams %d\r\n", epid, pstreams));
DPRINTF(("init_ep %d with pstreams %d", epid, pstreams));
assert(devep->ep_sctx_trbs == NULL);
devep->ep_sctx = XHCI_GADDR(dev->xsc, ep_ctx->qwEpCtx2 &
@ -659,12 +660,12 @@ pci_xhci_init_ep(struct pci_xhci_dev_emu *dev, int epid)
XHCI_SCTX_0_DCS_GET(devep->ep_sctx[i].qwSctx0);
}
} else {
DPRINTF(("init_ep %d with no pstreams\r\n", epid));
DPRINTF(("init_ep %d with no pstreams", epid));
devep->ep_ringaddr = ep_ctx->qwEpCtx2 &
XHCI_EPCTX_2_TR_DQ_PTR_MASK;
devep->ep_ccs = XHCI_EPCTX_2_DCS_GET(ep_ctx->qwEpCtx2);
devep->ep_tr = XHCI_GADDR(dev->xsc, devep->ep_ringaddr);
DPRINTF(("init_ep tr DCS %x\r\n", devep->ep_ccs));
DPRINTF(("init_ep tr DCS %x", devep->ep_ccs));
}
if (devep->ep_xfer == NULL) {
@ -680,7 +681,7 @@ pci_xhci_disable_ep(struct pci_xhci_dev_emu *dev, int epid)
struct pci_xhci_dev_ep *devep;
struct xhci_endp_ctx *ep_ctx;
DPRINTF(("pci_xhci disable_ep %d\r\n", epid));
DPRINTF(("pci_xhci disable_ep %d", epid));
dev_ctx = dev->dev_ctx;
ep_ctx = &dev_ctx->ctx_ep[epid];
@ -709,7 +710,7 @@ pci_xhci_reset_slot(struct pci_xhci_softc *sc, int slot)
dev = XHCI_SLOTDEV_PTR(sc, slot);
if (!dev) {
DPRINTF(("xhci reset unassigned slot (%d)?\r\n", slot));
DPRINTF(("xhci reset unassigned slot (%d)?", slot));
} else {
dev->dev_slotstate = XHCI_ST_DISABLED;
}
@ -735,20 +736,20 @@ pci_xhci_insert_event(struct pci_xhci_softc *sc, struct xhci_trb *evtrb,
erdp_idx = (erdp - rts->erstba_p[rts->er_deq_seg].qwEvrsTablePtr) /
sizeof(struct xhci_trb);
DPRINTF(("pci_xhci: insert event 0[%lx] 2[%x] 3[%x]\r\n"
"\terdp idx %d/seg %d, enq idx %d/seg %d, pcs %u\r\n"
"\t(erdp=0x%lx, erst=0x%lx, tblsz=%u, do_intr %d)\r\n",
evtrb->qwTrb0, evtrb->dwTrb2, evtrb->dwTrb3,
DPRINTF(("pci_xhci: insert event 0[%lx] 2[%x] 3[%x]",
evtrb->qwTrb0, evtrb->dwTrb2, evtrb->dwTrb3));
DPRINTF(("\terdp idx %d/seg %d, enq idx %d/seg %d, pcs %u",
erdp_idx, rts->er_deq_seg, rts->er_enq_idx,
rts->er_enq_seg,
rts->event_pcs, erdp, rts->erstba_p->qwEvrsTablePtr,
rts->er_enq_seg, rts->event_pcs));
DPRINTF(("\t(erdp=0x%lx, erst=0x%lx, tblsz=%u, do_intr %d)",
erdp, rts->erstba_p->qwEvrsTablePtr,
rts->erstba_p->dwEvrsTableSize, do_intr));
evtrbptr = &rts->erst_p[rts->er_enq_idx];
/* TODO: multi-segment table */
if (rts->er_events_cnt >= rts->erstba_p->dwEvrsTableSize) {
DPRINTF(("pci_xhci[%d] cannot insert event; ring full\r\n",
DPRINTF(("pci_xhci[%d] cannot insert event; ring full",
__LINE__));
err = XHCI_TRB_ERROR_EV_RING_FULL;
goto done;
@ -759,7 +760,7 @@ pci_xhci_insert_event(struct pci_xhci_softc *sc, struct xhci_trb *evtrb,
if ((evtrbptr->dwTrb3 & 0x1) == (rts->event_pcs & 0x1)) {
DPRINTF(("pci_xhci[%d] insert evt err: ring full\r\n",
DPRINTF(("pci_xhci[%d] insert evt err: ring full",
__LINE__));
errev.qwTrb0 = 0;
@ -819,7 +820,7 @@ pci_xhci_cmd_enable_slot(struct pci_xhci_softc *sc, uint32_t *slot)
}
}
DPRINTF(("pci_xhci enable slot (error=%d) slot %u\r\n",
DPRINTF(("pci_xhci enable slot (error=%d) slot %u",
cmderr != XHCI_TRB_ERROR_SUCCESS, *slot));
return (cmderr);
@ -831,7 +832,7 @@ pci_xhci_cmd_disable_slot(struct pci_xhci_softc *sc, uint32_t slot)
struct pci_xhci_dev_emu *dev;
uint32_t cmderr;
DPRINTF(("pci_xhci disable slot %u\r\n", slot));
DPRINTF(("pci_xhci disable slot %u", slot));
cmderr = XHCI_TRB_ERROR_NO_SLOTS;
if (sc->portregs == NULL)
@ -870,7 +871,7 @@ pci_xhci_cmd_reset_device(struct pci_xhci_softc *sc, uint32_t slot)
if (sc->portregs == NULL)
goto done;
DPRINTF(("pci_xhci reset device slot %u\r\n", slot));
DPRINTF(("pci_xhci reset device slot %u", slot));
dev = XHCI_SLOTDEV_PTR(sc, slot);
if (!dev || dev->dev_slotstate == XHCI_ST_DISABLED)
@ -923,19 +924,19 @@ pci_xhci_cmd_address_device(struct pci_xhci_softc *sc, uint32_t slot,
cmderr = XHCI_TRB_ERROR_SUCCESS;
DPRINTF(("pci_xhci: address device, input ctl: D 0x%08x A 0x%08x,\r\n"
" slot %08x %08x %08x %08x\r\n"
" ep0 %08x %08x %016lx %08x\r\n",
input_ctx->ctx_input.dwInCtx0, input_ctx->ctx_input.dwInCtx1,
DPRINTF(("pci_xhci: address device, input ctl: D 0x%08x A 0x%08x,",
input_ctx->ctx_input.dwInCtx0, input_ctx->ctx_input.dwInCtx1));
DPRINTF((" slot %08x %08x %08x %08x",
islot_ctx->dwSctx0, islot_ctx->dwSctx1,
islot_ctx->dwSctx2, islot_ctx->dwSctx3,
islot_ctx->dwSctx2, islot_ctx->dwSctx3));
DPRINTF((" ep0 %08x %08x %016lx %08x",
ep0_ctx->dwEpCtx0, ep0_ctx->dwEpCtx1, ep0_ctx->qwEpCtx2,
ep0_ctx->dwEpCtx4));
/* when setting address: drop-ctx=0, add-ctx=slot+ep0 */
if ((input_ctx->ctx_input.dwInCtx0 != 0) ||
(input_ctx->ctx_input.dwInCtx1 & 0x03) != 0x03) {
DPRINTF(("pci_xhci: address device, input ctl invalid\r\n"));
DPRINTF(("pci_xhci: address device, input ctl invalid"));
cmderr = XHCI_TRB_ERROR_TRB;
goto done;
}
@ -943,8 +944,8 @@ pci_xhci_cmd_address_device(struct pci_xhci_softc *sc, uint32_t slot,
/* assign address to slot */
dev_ctx = pci_xhci_get_dev_ctx(sc, slot);
DPRINTF(("pci_xhci: address device, dev ctx\r\n"
" slot %08x %08x %08x %08x\r\n",
DPRINTF(("pci_xhci: address device, dev ctx"));
DPRINTF((" slot %08x %08x %08x %08x",
dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1,
dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3));
@ -975,11 +976,11 @@ pci_xhci_cmd_address_device(struct pci_xhci_softc *sc, uint32_t slot,
dev->dev_slotstate = XHCI_ST_ADDRESSED;
DPRINTF(("pci_xhci: address device, output ctx\r\n"
" slot %08x %08x %08x %08x\r\n"
" ep0 %08x %08x %016lx %08x\r\n",
DPRINTF(("pci_xhci: address device, output ctx"));
DPRINTF((" slot %08x %08x %08x %08x",
dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1,
dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3,
dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3));
DPRINTF((" ep0 %08x %08x %016lx %08x",
ep0_ctx->dwEpCtx0, ep0_ctx->dwEpCtx1, ep0_ctx->qwEpCtx2,
ep0_ctx->dwEpCtx4));
@ -1000,13 +1001,13 @@ pci_xhci_cmd_config_ep(struct pci_xhci_softc *sc, uint32_t slot,
cmderr = XHCI_TRB_ERROR_SUCCESS;
DPRINTF(("pci_xhci config_ep slot %u\r\n", slot));
DPRINTF(("pci_xhci config_ep slot %u", slot));
dev = XHCI_SLOTDEV_PTR(sc, slot);
assert(dev != NULL);
if ((trb->dwTrb3 & XHCI_TRB_3_DCEP_BIT) != 0) {
DPRINTF(("pci_xhci config_ep - deconfigure ep slot %u\r\n",
DPRINTF(("pci_xhci config_ep - deconfigure ep slot %u",
slot));
if (dev->dev_ue->ue_stop != NULL)
dev->dev_ue->ue_stop(dev->dev_sc);
@ -1035,7 +1036,7 @@ pci_xhci_cmd_config_ep(struct pci_xhci_softc *sc, uint32_t slot,
}
if (dev->dev_slotstate < XHCI_ST_ADDRESSED) {
DPRINTF(("pci_xhci: config_ep slotstate x%x != addressed\r\n",
DPRINTF(("pci_xhci: config_ep slotstate x%x != addressed",
dev->dev_slotstate));
cmderr = XHCI_TRB_ERROR_SLOT_NOT_ON;
goto done;
@ -1057,7 +1058,7 @@ pci_xhci_cmd_config_ep(struct pci_xhci_softc *sc, uint32_t slot,
input_ctx = XHCI_GADDR(sc, trb->qwTrb0 & ~0xFUL);
dev_ctx = dev->dev_ctx;
DPRINTF(("pci_xhci: config_ep inputctx: D:x%08x A:x%08x 7:x%08x\r\n",
DPRINTF(("pci_xhci: config_ep inputctx: D:x%08x A:x%08x 7:x%08x",
input_ctx->ctx_input.dwInCtx0, input_ctx->ctx_input.dwInCtx1,
input_ctx->ctx_input.dwInCtx7));
@ -1066,7 +1067,7 @@ pci_xhci_cmd_config_ep(struct pci_xhci_softc *sc, uint32_t slot,
if (input_ctx->ctx_input.dwInCtx0 &
XHCI_INCTX_0_DROP_MASK(i)) {
DPRINTF((" config ep - dropping ep %d\r\n", i));
DPRINTF((" config ep - dropping ep %d", i));
pci_xhci_disable_ep(dev, i);
}
@ -1074,7 +1075,7 @@ pci_xhci_cmd_config_ep(struct pci_xhci_softc *sc, uint32_t slot,
XHCI_INCTX_1_ADD_MASK(i)) {
iep_ctx = &input_ctx->ctx_ep[i];
DPRINTF((" enable ep[%d] %08x %08x %016lx %08x\r\n",
DPRINTF((" enable ep[%d] %08x %08x %016lx %08x",
i, iep_ctx->dwEpCtx0, iep_ctx->dwEpCtx1,
iep_ctx->qwEpCtx2, iep_ctx->dwEpCtx4));
@ -1096,7 +1097,7 @@ pci_xhci_cmd_config_ep(struct pci_xhci_softc *sc, uint32_t slot,
dev->dev_slotstate = XHCI_ST_CONFIGURED;
DPRINTF(("EP configured; slot %u [0]=0x%08x [1]=0x%08x [2]=0x%08x "
"[3]=0x%08x\r\n",
"[3]=0x%08x",
slot, dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1,
dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3));
@ -1117,7 +1118,7 @@ pci_xhci_cmd_reset_ep(struct pci_xhci_softc *sc, uint32_t slot,
epid = XHCI_TRB_3_EP_GET(trb->dwTrb3);
DPRINTF(("pci_xhci: reset ep %u: slot %u\r\n", epid, slot));
DPRINTF(("pci_xhci: reset ep %u: slot %u", epid, slot));
cmderr = XHCI_TRB_ERROR_SUCCESS;
@ -1132,7 +1133,7 @@ pci_xhci_cmd_reset_ep(struct pci_xhci_softc *sc, uint32_t slot,
}
if (epid < 1 || epid > 31) {
DPRINTF(("pci_xhci: reset ep: invalid epid %u\r\n", epid));
DPRINTF(("pci_xhci: reset ep: invalid epid %u", epid));
cmderr = XHCI_TRB_ERROR_TRB;
goto done;
}
@ -1151,7 +1152,7 @@ pci_xhci_cmd_reset_ep(struct pci_xhci_softc *sc, uint32_t slot,
if (XHCI_EPCTX_0_MAXP_STREAMS_GET(ep_ctx->dwEpCtx0) == 0)
ep_ctx->qwEpCtx2 = devep->ep_ringaddr | devep->ep_ccs;
DPRINTF(("pci_xhci: reset ep[%u] %08x %08x %016lx %08x\r\n",
DPRINTF(("pci_xhci: reset ep[%u] %08x %08x %016lx %08x",
epid, ep_ctx->dwEpCtx0, ep_ctx->dwEpCtx1, ep_ctx->qwEpCtx2,
ep_ctx->dwEpCtx4));
@ -1182,7 +1183,7 @@ pci_xhci_find_stream(struct pci_xhci_softc *sc, struct xhci_endp_ctx *ep,
return (XHCI_TRB_ERROR_INVALID_SID);
if (XHCI_EPCTX_0_LSA_GET(ep->dwEpCtx0) == 0) {
DPRINTF(("pci_xhci: find_stream; LSA bit not set\r\n"));
DPRINTF(("pci_xhci: find_stream; LSA bit not set"));
return (XHCI_TRB_ERROR_INVALID_SID);
}
@ -1216,16 +1217,17 @@ pci_xhci_cmd_set_tr(struct pci_xhci_softc *sc, uint32_t slot,
dev = XHCI_SLOTDEV_PTR(sc, slot);
assert(dev != NULL);
DPRINTF(("pci_xhci set_tr: new-tr x%016lx, SCT %u DCS %u\r\n"
" stream-id %u, slot %u, epid %u, C %u\r\n",
DPRINTF(("pci_xhci set_tr: new-tr x%016lx, SCT %u DCS %u",
(trb->qwTrb0 & ~0xF), (uint32_t)((trb->qwTrb0 >> 1) & 0x7),
(uint32_t)(trb->qwTrb0 & 0x1), (trb->dwTrb2 >> 16) & 0xFFFF,
(uint32_t)(trb->qwTrb0 & 0x1)));
DPRINTF((" stream-id %u, slot %u, epid %u, C %u",
(trb->dwTrb2 >> 16) & 0xFFFF,
XHCI_TRB_3_SLOT_GET(trb->dwTrb3),
XHCI_TRB_3_EP_GET(trb->dwTrb3), trb->dwTrb3 & 0x1));
epid = XHCI_TRB_3_EP_GET(trb->dwTrb3);
if (epid < 1 || epid > 31) {
DPRINTF(("pci_xhci: set_tr_deq: invalid epid %u\r\n", epid));
DPRINTF(("pci_xhci: set_tr_deq: invalid epid %u", epid));
cmderr = XHCI_TRB_ERROR_TRB;
goto done;
}
@ -1241,7 +1243,7 @@ pci_xhci_cmd_set_tr(struct pci_xhci_softc *sc, uint32_t slot,
case XHCI_ST_EPCTX_ERROR:
break;
default:
DPRINTF(("pci_xhci cmd set_tr invalid state %x\r\n",
DPRINTF(("pci_xhci cmd set_tr invalid state %x",
XHCI_EPCTX_0_EPSTATE_GET(ep_ctx->dwEpCtx0)));
cmderr = XHCI_TRB_ERROR_CONTEXT_STATE;
goto done;
@ -1264,7 +1266,7 @@ pci_xhci_cmd_set_tr(struct pci_xhci_softc *sc, uint32_t slot,
}
} else {
if (streamid != 0) {
DPRINTF(("pci_xhci cmd set_tr streamid %x != 0\r\n",
DPRINTF(("pci_xhci cmd set_tr streamid %x != 0",
streamid));
}
ep_ctx->qwEpCtx2 = trb->qwTrb0 & ~0xFUL;
@ -1272,7 +1274,7 @@ pci_xhci_cmd_set_tr(struct pci_xhci_softc *sc, uint32_t slot,
devep->ep_ccs = trb->qwTrb0 & 0x1;
devep->ep_tr = XHCI_GADDR(sc, devep->ep_ringaddr);
DPRINTF(("pci_xhci set_tr first TRB:\r\n"));
DPRINTF(("pci_xhci set_tr first TRB:"));
pci_xhci_dump_trb(devep->ep_tr);
}
ep_ctx->dwEpCtx0 = (ep_ctx->dwEpCtx0 & ~0x7) | XHCI_ST_EPCTX_STOPPED;
@ -1296,19 +1298,19 @@ pci_xhci_cmd_eval_ctx(struct pci_xhci_softc *sc, uint32_t slot,
ep0_ctx = &input_ctx->ctx_ep[1];
cmderr = XHCI_TRB_ERROR_SUCCESS;
DPRINTF(("pci_xhci: eval ctx, input ctl: D 0x%08x A 0x%08x,\r\n"
" slot %08x %08x %08x %08x\r\n"
" ep0 %08x %08x %016lx %08x\r\n",
input_ctx->ctx_input.dwInCtx0, input_ctx->ctx_input.dwInCtx1,
DPRINTF(("pci_xhci: eval ctx, input ctl: D 0x%08x A 0x%08x,",
input_ctx->ctx_input.dwInCtx0, input_ctx->ctx_input.dwInCtx1));
DPRINTF((" slot %08x %08x %08x %08x",
islot_ctx->dwSctx0, islot_ctx->dwSctx1,
islot_ctx->dwSctx2, islot_ctx->dwSctx3,
islot_ctx->dwSctx2, islot_ctx->dwSctx3));
DPRINTF((" ep0 %08x %08x %016lx %08x",
ep0_ctx->dwEpCtx0, ep0_ctx->dwEpCtx1, ep0_ctx->qwEpCtx2,
ep0_ctx->dwEpCtx4));
/* this command expects drop-ctx=0 & add-ctx=slot+ep0 */
if ((input_ctx->ctx_input.dwInCtx0 != 0) ||
(input_ctx->ctx_input.dwInCtx1 & 0x03) == 0) {
DPRINTF(("pci_xhci: eval ctx, input ctl invalid\r\n"));
DPRINTF(("pci_xhci: eval ctx, input ctl invalid"));
cmderr = XHCI_TRB_ERROR_TRB;
goto done;
}
@ -1316,8 +1318,8 @@ pci_xhci_cmd_eval_ctx(struct pci_xhci_softc *sc, uint32_t slot,
/* assign address to slot; in this emulation, slot_id = address */
dev_ctx = pci_xhci_get_dev_ctx(sc, slot);
DPRINTF(("pci_xhci: eval ctx, dev ctx\r\n"
" slot %08x %08x %08x %08x\r\n",
DPRINTF(("pci_xhci: eval ctx, dev ctx"));
DPRINTF((" slot %08x %08x %08x %08x",
dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1,
dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3));
@ -1341,11 +1343,11 @@ pci_xhci_cmd_eval_ctx(struct pci_xhci_softc *sc, uint32_t slot,
ep0_ctx = &dev_ctx->ctx_ep[1];
}
DPRINTF(("pci_xhci: eval ctx, output ctx\r\n"
" slot %08x %08x %08x %08x\r\n"
" ep0 %08x %08x %016lx %08x\r\n",
DPRINTF(("pci_xhci: eval ctx, output ctx"));
DPRINTF((" slot %08x %08x %08x %08x",
dev_ctx->ctx_slot.dwSctx0, dev_ctx->ctx_slot.dwSctx1,
dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3,
dev_ctx->ctx_slot.dwSctx2, dev_ctx->ctx_slot.dwSctx3));
DPRINTF((" ep0 %08x %08x %016lx %08x",
ep0_ctx->dwEpCtx0, ep0_ctx->dwEpCtx1, ep0_ctx->qwEpCtx2,
ep0_ctx->dwEpCtx4));
@ -1382,7 +1384,7 @@ pci_xhci_complete_commands(struct pci_xhci_softc *sc)
break;
DPRINTF(("pci_xhci: cmd type 0x%x, Trb0 x%016lx dwTrb2 x%08x"
" dwTrb3 x%08x, TRB_CYCLE %u/ccs %u\r\n",
" dwTrb3 x%08x, TRB_CYCLE %u/ccs %u",
type, trb->qwTrb0, trb->dwTrb2, trb->dwTrb3,
trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT, ccs));
@ -1423,13 +1425,13 @@ pci_xhci_complete_commands(struct pci_xhci_softc *sc)
break;
case XHCI_TRB_TYPE_RESET_EP: /* 0x0E */
DPRINTF(("Reset Endpoint on slot %d\r\n", slot));
DPRINTF(("Reset Endpoint on slot %d", slot));
slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3);
cmderr = pci_xhci_cmd_reset_ep(sc, slot, trb);
break;
case XHCI_TRB_TYPE_STOP_EP: /* 0x0F */
DPRINTF(("Stop Endpoint on slot %d\r\n", slot));
DPRINTF(("Stop Endpoint on slot %d", slot));
slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3);
cmderr = pci_xhci_cmd_reset_ep(sc, slot, trb);
break;
@ -1464,7 +1466,7 @@ pci_xhci_complete_commands(struct pci_xhci_softc *sc)
break;
default:
DPRINTF(("pci_xhci: unsupported cmd %x\r\n", type));
DPRINTF(("pci_xhci: unsupported cmd %x", type));
break;
}
@ -1475,7 +1477,7 @@ pci_xhci_complete_commands(struct pci_xhci_softc *sc)
evtrb.qwTrb0 = crcr;
evtrb.dwTrb2 |= XHCI_TRB_2_ERROR_SET(cmderr);
evtrb.dwTrb3 |= XHCI_TRB_3_SLOT_SET(slot);
DPRINTF(("pci_xhci: command 0x%x result: 0x%x\r\n",
DPRINTF(("pci_xhci: command 0x%x result: 0x%x",
type, cmderr));
pci_xhci_insert_event(sc, &evtrb, 1);
}
@ -1520,7 +1522,7 @@ pci_xhci_dump_trb(struct xhci_trb *trb)
uint32_t type;
type = XHCI_TRB_3_TYPE_GET(trb->dwTrb3);
DPRINTF(("pci_xhci: trb[@%p] type x%02x %s 0:x%016lx 2:x%08x 3:x%08x\r\n",
DPRINTF(("pci_xhci: trb[@%p] type x%02x %s 0:x%016lx 2:x%08x 3:x%08x",
trb, type,
type <= XHCI_TRB_TYPE_NOOP_CMD ? trbtypes[type] : "INVALID",
trb->qwTrb0, trb->dwTrb2, trb->dwTrb3));
@ -1559,7 +1561,7 @@ pci_xhci_xfer_complete(struct pci_xhci_softc *sc, struct usb_data_xfer *xfer,
trbflags = trb->dwTrb3;
DPRINTF(("pci_xhci: xfer[%d] done?%u:%d trb %x %016lx %x "
"(err %d) IOC?%d\r\n",
"(err %d) IOC?%d",
i, xfer->data[i].processed, xfer->data[i].blen,
XHCI_TRB_3_TYPE_GET(trbflags), evtrb.qwTrb0,
trbflags, err,
@ -1595,7 +1597,7 @@ pci_xhci_xfer_complete(struct pci_xhci_softc *sc, struct usb_data_xfer *xfer,
XHCI_TRB_3_SLOT_SET(slot) | XHCI_TRB_3_EP_SET(epid);
if (XHCI_TRB_3_TYPE_GET(trbflags) == XHCI_TRB_TYPE_EVENT_DATA) {
DPRINTF(("pci_xhci EVENT_DATA edtla %u\r\n", edtla));
DPRINTF(("pci_xhci EVENT_DATA edtla %u", edtla));
evtrb.qwTrb0 = trb->qwTrb0;
evtrb.dwTrb2 = (edtla & 0xFFFFF) |
XHCI_TRB_2_ERROR_SET(err);
@ -1630,7 +1632,7 @@ pci_xhci_update_ep_ring(struct pci_xhci_softc *sc, struct pci_xhci_dev_emu *dev,
devep->ep_sctx_trbs[streamid].ccs = ccs & 0x1;
ep_ctx->qwEpCtx2 = (ep_ctx->qwEpCtx2 & ~0x1) | (ccs & 0x1);
DPRINTF(("xhci update ep-ring stream %d, addr %lx\r\n",
DPRINTF(("xhci update ep-ring stream %d, addr %lx",
streamid, devep->ep_sctx[streamid].qwSctx0));
} else {
devep->ep_ringaddr = ringaddr & ~0xFUL;
@ -1638,7 +1640,7 @@ pci_xhci_update_ep_ring(struct pci_xhci_softc *sc, struct pci_xhci_dev_emu *dev,
devep->ep_tr = XHCI_GADDR(sc, ringaddr & ~0xFUL);
ep_ctx->qwEpCtx2 = (ringaddr & ~0xFUL) | (ccs & 0x1);
DPRINTF(("xhci update ep-ring, addr %lx\r\n",
DPRINTF(("xhci update ep-ring, addr %lx",
(devep->ep_ringaddr | devep->ep_ccs)));
}
}
@ -1713,7 +1715,7 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
xfer = devep->ep_xfer;
USB_DATA_XFER_LOCK(xfer);
DPRINTF(("pci_xhci handle_transfer slot %u\r\n", slot));
DPRINTF(("pci_xhci handle_transfer slot %u", slot));
retry:
err = 0;
@ -1729,7 +1731,7 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
if (XHCI_TRB_3_TYPE_GET(trbflags) != XHCI_TRB_TYPE_LINK &&
(trbflags & XHCI_TRB_3_CYCLE_BIT) !=
(ccs & XHCI_TRB_3_CYCLE_BIT)) {
DPRINTF(("Cycle-bit changed trbflags %x, ccs %x\r\n",
DPRINTF(("Cycle-bit changed trbflags %x, ccs %x",
trbflags & XHCI_TRB_3_CYCLE_BIT, ccs));
break;
}
@ -1749,7 +1751,7 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
case XHCI_TRB_TYPE_SETUP_STAGE:
if ((trbflags & XHCI_TRB_3_IDT_BIT) == 0 ||
XHCI_TRB_2_BYTES_GET(trb->dwTrb2) != 8) {
DPRINTF(("pci_xhci: invalid setup trb\r\n"));
DPRINTF(("pci_xhci: invalid setup trb"));
err = XHCI_TRB_ERROR_TRB;
goto errout;
}
@ -1771,7 +1773,7 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
case XHCI_TRB_TYPE_ISOCH:
if (setup_trb != NULL) {
DPRINTF(("pci_xhci: trb not supposed to be in "
"ctl scope\r\n"));
"ctl scope"));
err = XHCI_TRB_ERROR_TRB;
goto errout;
}
@ -1805,7 +1807,7 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
default:
DPRINTF(("pci_xhci: handle xfer unexpected trb type "
"0x%x\r\n",
"0x%x",
XHCI_TRB_3_TYPE_GET(trbflags)));
err = XHCI_TRB_ERROR_TRB;
goto errout;
@ -1813,7 +1815,7 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
trb = pci_xhci_trb_next(sc, trb, &addr);
DPRINTF(("pci_xhci: next trb: 0x%lx\r\n", (uint64_t)trb));
DPRINTF(("pci_xhci: next trb: 0x%lx", (uint64_t)trb));
if (xfer_block) {
xfer_block->trbnext = addr;
@ -1827,14 +1829,14 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
/* handle current batch that requires interrupt on complete */
if (trbflags & XHCI_TRB_3_IOC_BIT) {
DPRINTF(("pci_xhci: trb IOC bit set\r\n"));
DPRINTF(("pci_xhci: trb IOC bit set"));
if (epid == 1)
do_retry = 1;
break;
}
}
DPRINTF(("pci_xhci[%d]: xfer->ndata %u\r\n", __LINE__, xfer->ndata));
DPRINTF(("pci_xhci[%d]: xfer->ndata %u", __LINE__, xfer->ndata));
if (epid == 1) {
err = USB_ERR_NOT_STARTED;
@ -1858,7 +1860,7 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
errout:
if (err == XHCI_TRB_ERROR_EV_RING_FULL)
DPRINTF(("pci_xhci[%d]: event ring full\r\n", __LINE__));
DPRINTF(("pci_xhci[%d]: event ring full", __LINE__));
if (!do_retry)
USB_DATA_XFER_UNLOCK(xfer);
@ -1868,7 +1870,7 @@ pci_xhci_handle_transfer(struct pci_xhci_softc *sc,
if (do_retry) {
USB_DATA_XFER_RESET(xfer);
DPRINTF(("pci_xhci[%d]: retry:continuing with next TRBs\r\n",
DPRINTF(("pci_xhci[%d]: retry:continuing with next TRBs",
__LINE__));
goto retry;
}
@ -1892,16 +1894,16 @@ pci_xhci_device_doorbell(struct pci_xhci_softc *sc, uint32_t slot,
uint64_t ringaddr;
uint32_t ccs;
DPRINTF(("pci_xhci doorbell slot %u epid %u stream %u\r\n",
DPRINTF(("pci_xhci doorbell slot %u epid %u stream %u",
slot, epid, streamid));
if (slot == 0 || slot > sc->ndevices) {
DPRINTF(("pci_xhci: invalid doorbell slot %u\r\n", slot));
DPRINTF(("pci_xhci: invalid doorbell slot %u", slot));
return;
}
if (epid == 0 || epid >= XHCI_MAX_ENDPOINTS) {
DPRINTF(("pci_xhci: invalid endpoint %u\r\n", epid));
DPRINTF(("pci_xhci: invalid endpoint %u", epid));
return;
}
@ -1915,7 +1917,7 @@ pci_xhci_device_doorbell(struct pci_xhci_softc *sc, uint32_t slot,
sctx_tr = NULL;
DPRINTF(("pci_xhci: device doorbell ep[%u] %08x %08x %016lx %08x\r\n",
DPRINTF(("pci_xhci: device doorbell ep[%u] %08x %08x %016lx %08x",
epid, ep_ctx->dwEpCtx0, ep_ctx->dwEpCtx1, ep_ctx->qwEpCtx2,
ep_ctx->dwEpCtx4));
@ -1937,38 +1939,38 @@ pci_xhci_device_doorbell(struct pci_xhci_softc *sc, uint32_t slot,
* (prime) are invalid.
*/
if (streamid == 0 || streamid == 65534 || streamid == 65535) {
DPRINTF(("pci_xhci: invalid stream %u\r\n", streamid));
DPRINTF(("pci_xhci: invalid stream %u", streamid));
return;
}
sctx = NULL;
pci_xhci_find_stream(sc, ep_ctx, streamid, &sctx);
if (sctx == NULL) {
DPRINTF(("pci_xhci: invalid stream %u\r\n", streamid));
DPRINTF(("pci_xhci: invalid stream %u", streamid));
return;
}
sctx_tr = &devep->ep_sctx_trbs[streamid];
ringaddr = sctx_tr->ringaddr;
ccs = sctx_tr->ccs;
trb = XHCI_GADDR(sc, sctx_tr->ringaddr & ~0xFUL);
DPRINTF(("doorbell, stream %u, ccs %lx, trb ccs %x\r\n",
DPRINTF(("doorbell, stream %u, ccs %lx, trb ccs %x",
streamid, ep_ctx->qwEpCtx2 & XHCI_TRB_3_CYCLE_BIT,
trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT));
} else {
if (streamid != 0) {
DPRINTF(("pci_xhci: invalid stream %u\r\n", streamid));
DPRINTF(("pci_xhci: invalid stream %u", streamid));
return;
}
ringaddr = devep->ep_ringaddr;
ccs = devep->ep_ccs;
trb = devep->ep_tr;
DPRINTF(("doorbell, ccs %lx, trb ccs %x\r\n",
DPRINTF(("doorbell, ccs %lx, trb ccs %x",
ep_ctx->qwEpCtx2 & XHCI_TRB_3_CYCLE_BIT,
trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT));
}
if (XHCI_TRB_3_TYPE_GET(trb->dwTrb3) == 0) {
DPRINTF(("pci_xhci: ring %lx trb[%lx] EP %u is RESERVED?\r\n",
DPRINTF(("pci_xhci: ring %lx trb[%lx] EP %u is RESERVED?",
ep_ctx->qwEpCtx2, devep->ep_ringaddr, epid));
return;
}
@ -1984,11 +1986,11 @@ pci_xhci_dbregs_write(struct pci_xhci_softc *sc, uint64_t offset,
offset = (offset - sc->dboff) / sizeof(uint32_t);
DPRINTF(("pci_xhci: doorbell write offset 0x%lx: 0x%lx\r\n",
DPRINTF(("pci_xhci: doorbell write offset 0x%lx: 0x%lx",
offset, value));
if (XHCI_HALTED(sc)) {
DPRINTF(("pci_xhci: controller halted\r\n"));
DPRINTF(("pci_xhci: controller halted"));
return;
}
@ -2008,11 +2010,11 @@ pci_xhci_rtsregs_write(struct pci_xhci_softc *sc, uint64_t offset,
offset -= sc->rtsoff;
if (offset == 0) {
DPRINTF(("pci_xhci attempted write to MFINDEX\r\n"));
DPRINTF(("pci_xhci attempted write to MFINDEX"));
return;
}
DPRINTF(("pci_xhci: runtime regs write offset 0x%lx: 0x%lx\r\n",
DPRINTF(("pci_xhci: runtime regs write offset 0x%lx: 0x%lx",
offset, value));
offset -= 0x20; /* start of intrreg */
@ -2059,7 +2061,7 @@ pci_xhci_rtsregs_write(struct pci_xhci_softc *sc, uint64_t offset,
rts->er_enq_idx = 0;
rts->er_events_cnt = 0;
DPRINTF(("pci_xhci: wr erstba erst (%p) ptr 0x%lx, sz %u\r\n",
DPRINTF(("pci_xhci: wr erstba erst (%p) ptr 0x%lx, sz %u",
rts->erstba_p,
rts->erstba_p->qwEvrsTablePtr,
rts->erstba_p->dwEvrsTableSize));
@ -2100,14 +2102,14 @@ pci_xhci_rtsregs_write(struct pci_xhci_softc *sc, uint64_t offset,
rts->erstba_p->dwEvrsTableSize -
(erdp_i - rts->er_enq_idx);
DPRINTF(("pci_xhci: erdp 0x%lx, events cnt %u\r\n",
DPRINTF(("pci_xhci: erdp 0x%lx, events cnt %u",
erdp, rts->er_events_cnt));
}
break;
default:
DPRINTF(("pci_xhci attempted write to RTS offset 0x%lx\r\n",
DPRINTF(("pci_xhci attempted write to RTS offset 0x%lx",
offset));
break;
}
@ -2125,7 +2127,7 @@ pci_xhci_portregs_read(struct pci_xhci_softc *sc, uint64_t offset)
port = (offset - 0x3F0) / 0x10;
if (port > XHCI_MAX_DEVS) {
DPRINTF(("pci_xhci: portregs_read port %d >= XHCI_MAX_DEVS\r\n",
DPRINTF(("pci_xhci: portregs_read port %d >= XHCI_MAX_DEVS",
port));
/* return default value for unused port */
@ -2137,7 +2139,7 @@ pci_xhci_portregs_read(struct pci_xhci_softc *sc, uint64_t offset)
p = &sc->portregs[port].portsc;
p += offset / sizeof(uint32_t);
DPRINTF(("pci_xhci: portregs read offset 0x%lx port %u -> 0x%x\r\n",
DPRINTF(("pci_xhci: portregs read offset 0x%lx port %u -> 0x%x",
offset, port, *p));
return (*p);
@ -2150,7 +2152,7 @@ pci_xhci_hostop_write(struct pci_xhci_softc *sc, uint64_t offset,
offset -= XHCI_CAPLEN;
if (offset < 0x400)
DPRINTF(("pci_xhci: hostop write offset 0x%lx: 0x%lx\r\n",
DPRINTF(("pci_xhci: hostop write offset 0x%lx: 0x%lx",
offset, value));
switch (offset) {
@ -2213,7 +2215,7 @@ pci_xhci_hostop_write(struct pci_xhci_softc *sc, uint64_t offset,
(value << 32);
sc->opregs.dcbaa_p = XHCI_GADDR(sc, sc->opregs.dcbaap & ~0x3FUL);
DPRINTF(("pci_xhci: opregs dcbaap = 0x%lx (vaddr 0x%lx)\r\n",
DPRINTF(("pci_xhci: opregs dcbaap = 0x%lx (vaddr 0x%lx)",
sc->opregs.dcbaap, (uint64_t)sc->opregs.dcbaa_p));
break;
@ -2243,7 +2245,7 @@ pci_xhci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
pthread_mutex_lock(&sc->mtx);
if (offset < XHCI_CAPLEN) /* read only registers */
WPRINTF(("pci_xhci: write RO-CAPs offset %ld\r\n", offset));
WPRINTF(("pci_xhci: write RO-CAPs offset %ld", offset));
else if (offset < sc->dboff)
pci_xhci_hostop_write(sc, offset, value);
else if (offset < sc->rtsoff)
@ -2251,7 +2253,7 @@ pci_xhci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
else if (offset < sc->regsend)
pci_xhci_rtsregs_write(sc, offset, value);
else
WPRINTF(("pci_xhci: write invalid offset %ld\r\n", offset));
WPRINTF(("pci_xhci: write invalid offset %ld", offset));
pthread_mutex_unlock(&sc->mtx);
}
@ -2299,7 +2301,7 @@ pci_xhci_hostcap_read(struct pci_xhci_softc *sc, uint64_t offset)
break;
}
DPRINTF(("pci_xhci: hostcap read offset 0x%lx -> 0x%lx\r\n",
DPRINTF(("pci_xhci: hostcap read offset 0x%lx -> 0x%lx",
offset, value));
return (value);
@ -2359,7 +2361,7 @@ pci_xhci_hostop_read(struct pci_xhci_softc *sc, uint64_t offset)
}
if (offset < 0x400)
DPRINTF(("pci_xhci: hostop read offset 0x%lx -> 0x%lx\r\n",
DPRINTF(("pci_xhci: hostop read offset 0x%lx -> 0x%lx",
offset, value));
return (value);
@ -2397,7 +2399,7 @@ pci_xhci_rtsregs_read(struct pci_xhci_softc *sc, uint64_t offset)
value = *p;
}
DPRINTF(("pci_xhci: rtsregs read offset 0x%lx -> 0x%x\r\n",
DPRINTF(("pci_xhci: rtsregs read offset 0x%lx -> 0x%x",
offset, value));
return (value);
@ -2441,11 +2443,11 @@ pci_xhci_xecp_read(struct pci_xhci_softc *sc, uint64_t offset)
case 28:
break;
default:
DPRINTF(("pci_xhci: xecp invalid offset 0x%lx\r\n", offset));
DPRINTF(("pci_xhci: xecp invalid offset 0x%lx", offset));
break;
}
DPRINTF(("pci_xhci: xecp read offset 0x%lx -> 0x%x\r\n",
DPRINTF(("pci_xhci: xecp read offset 0x%lx -> 0x%x",
offset, value));
return (value);
@ -2476,7 +2478,7 @@ pci_xhci_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
value = pci_xhci_xecp_read(sc, offset);
else {
value = 0;
WPRINTF(("pci_xhci: read invalid offset %ld\r\n", offset));
WPRINTF(("pci_xhci: read invalid offset %ld", offset));
}
pthread_mutex_unlock(&sc->mtx);
@ -2506,7 +2508,7 @@ pci_xhci_reset_port(struct pci_xhci_softc *sc, int portn, int warm)
assert(portn <= XHCI_MAX_DEVS);
DPRINTF(("xhci reset port %d\r\n", portn));
DPRINTF(("xhci reset port %d", portn));
port = XHCI_PORTREG_PTR(sc, portn);
dev = XHCI_DEVINST_PTR(sc, portn);
@ -2528,7 +2530,7 @@ pci_xhci_reset_port(struct pci_xhci_softc *sc, int portn, int warm)
error = pci_xhci_insert_event(sc, &evtrb, 1);
if (error != XHCI_TRB_ERROR_SUCCESS)
DPRINTF(("xhci reset port insert event "
"failed\r\n"));
"failed"));
}
}
}
@ -2554,10 +2556,10 @@ pci_xhci_init_port(struct pci_xhci_softc *sc, int portn)
XHCI_PS_SPEED_SET(dev->dev_ue->ue_usbspeed);
}
DPRINTF(("Init port %d 0x%x\r\n", portn, port->portsc));
DPRINTF(("Init port %d 0x%x", portn, port->portsc));
} else {
port->portsc = XHCI_PS_PLS_SET(UPS_PORT_LS_RX_DET) | XHCI_PS_PP;
DPRINTF(("Init empty port %d 0x%x\r\n", portn, port->portsc));
DPRINTF(("Init empty port %d 0x%x", portn, port->portsc));
}
}
@ -2612,12 +2614,12 @@ pci_xhci_dev_intr(struct usb_hci *hci, int epctx)
dev_ctx = dev->dev_ctx;
ep_ctx = &dev_ctx->ctx_ep[epid];
if ((ep_ctx->dwEpCtx0 & 0x7) == XHCI_ST_EPCTX_DISABLED) {
DPRINTF(("xhci device interrupt on disabled endpoint %d\r\n",
DPRINTF(("xhci device interrupt on disabled endpoint %d",
epid));
return (0);
}
DPRINTF(("xhci device interrupt on endpoint %d\r\n", epid));
DPRINTF(("xhci device interrupt on endpoint %d", epid));
pci_xhci_device_doorbell(sc, hci->hci_port, epid, 0);
@ -2629,7 +2631,7 @@ static int
pci_xhci_dev_event(struct usb_hci *hci, enum hci_usbev evid, void *param)
{
DPRINTF(("xhci device event port %d\r\n", hci->hci_port));
DPRINTF(("xhci device event port %d", hci->hci_port));
return (0);
}
@ -2639,7 +2641,7 @@ static void
pci_xhci_device_usage(char *opt)
{
fprintf(stderr, "Invalid USB emulation \"%s\"\r\n", opt);
EPRINTLN("Invalid USB emulation \"%s\"", opt);
}
static int
@ -2673,7 +2675,7 @@ pci_xhci_parse_opts(struct pci_xhci_softc *sc, char *opts)
if (usb2_port == ((sc->usb2_port_start-1) + XHCI_MAX_DEVS/2) ||
usb3_port == ((sc->usb3_port_start-1) + XHCI_MAX_DEVS/2)) {
WPRINTF(("pci_xhci max number of USB 2 or 3 "
"devices reached, max %d\r\n", XHCI_MAX_DEVS/2));
"devices reached, max %d", XHCI_MAX_DEVS/2));
usb2_port = usb3_port = -1;
goto done;
}
@ -2687,12 +2689,12 @@ pci_xhci_parse_opts(struct pci_xhci_softc *sc, char *opts)
ue = usb_emu_finddev(xopts);
if (ue == NULL) {
pci_xhci_device_usage(xopts);
DPRINTF(("pci_xhci device not found %s\r\n", xopts));
DPRINTF(("pci_xhci device not found %s", xopts));
usb2_port = usb3_port = -1;
goto done;
}
DPRINTF(("pci_xhci adding device %s, opts \"%s\"\r\n",
DPRINTF(("pci_xhci adding device %s, opts \"%s\"",
xopts, config));
dev = calloc(1, sizeof(struct pci_xhci_dev_emu));
@ -2741,7 +2743,7 @@ pci_xhci_parse_opts(struct pci_xhci_softc *sc, char *opts)
pci_xhci_init_port(sc, i);
}
} else {
WPRINTF(("pci_xhci no USB devices configured\r\n"));
WPRINTF(("pci_xhci no USB devices configured"));
sc->ndevices = 1;
}
@ -2767,7 +2769,7 @@ pci_xhci_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
int error;
if (xhci_in_use) {
WPRINTF(("pci_xhci controller already defined\r\n"));
WPRINTF(("pci_xhci controller already defined"));
return (-1);
}
xhci_in_use = 1;
@ -2811,7 +2813,7 @@ pci_xhci_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
if (sc->rtsoff & 0x1F)
sc->rtsoff = (sc->rtsoff + 0x1F) & ~0x1F;
DPRINTF(("pci_xhci dboff: 0x%x, rtsoff: 0x%x\r\n", sc->dboff,
DPRINTF(("pci_xhci dboff: 0x%x, rtsoff: 0x%x", sc->dboff,
sc->rtsoff));
sc->opregs.usbsts = XHCI_STS_HCH;
@ -2838,7 +2840,7 @@ pci_xhci_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
/* regsend + xecp registers */
pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, sc->regsend + 4*32);
DPRINTF(("pci_xhci pci_emu_alloc: %d\r\n", sc->regsend + 4*32));
DPRINTF(("pci_xhci pci_emu_alloc: %d", sc->regsend + 4*32));
pci_lintr_request(pi);

11
usr.sbin/bhyve/ps2kbd.c
View File

@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <pthread_np.h>
#include "atkbdc.h"
#include "debug.h"
#include "console.h"
/* keyboard device commands */
@ -253,8 +254,8 @@ ps2kbd_write(struct ps2kbd_softc *sc, uint8_t val)
fifo_put(sc, PS2KC_ACK);
break;
default:
fprintf(stderr, "Unhandled ps2 keyboard current "
"command byte 0x%02x\n", val);
EPRINTLN("Unhandled ps2 keyboard current "
"command byte 0x%02x", val);
break;
}
sc->curcmd = 0;
@ -298,8 +299,8 @@ ps2kbd_write(struct ps2kbd_softc *sc, uint8_t val)
fifo_put(sc, PS2KC_ACK);
break;
default:
fprintf(stderr, "Unhandled ps2 keyboard command "
"0x%02x\n", val);
EPRINTLN("Unhandled ps2 keyboard command "
"0x%02x", val);
break;
}
}
@ -336,7 +337,7 @@ ps2kbd_keysym_queue(struct ps2kbd_softc *sc,
}
if (!found) {
fprintf(stderr, "Unhandled ps2 keyboard keysym 0x%x\n", keysym);
EPRINTLN("Unhandled ps2 keyboard keysym 0x%x", keysym);
return;
}

9
usr.sbin/bhyve/ps2mouse.c
View File

@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <pthread_np.h>
#include "atkbdc.h"
#include "debug.h"
#include "console.h"
/* mouse device commands */
@ -289,8 +290,8 @@ ps2mouse_write(struct ps2mouse_softc *sc, uint8_t val, int insert)
fifo_put(sc, PS2MC_ACK);
break;
default:
fprintf(stderr, "Unhandled ps2 mouse current "
"command byte 0x%02x\n", val);
EPRINTLN("Unhandled ps2 mouse current "
"command byte 0x%02x", val);
break;
}
sc->curcmd = 0;
@ -358,8 +359,8 @@ ps2mouse_write(struct ps2mouse_softc *sc, uint8_t val, int insert)
break;
default:
fifo_put(sc, PS2MC_ACK);
fprintf(stderr, "Unhandled ps2 mouse command "
"0x%02x\n", val);
EPRINTLN("Unhandled ps2 mouse command "
"0x%02x", val);
break;
}
}

17
usr.sbin/bhyve/rfb.c
View File

@ -63,6 +63,7 @@ __FBSDID("$FreeBSD$");
#include <zlib.h>
#include "bhyvegc.h"
#include "debug.h"
#include "console.h"
#include "rfb.h"
#include "sockstream.h"
@ -72,8 +73,8 @@ __FBSDID("$FreeBSD$");
#endif
static int rfb_debug = 0;
#define DPRINTF(params) if (rfb_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (rfb_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
#define AUTH_LENGTH 16
#define PASSWD_LENGTH 8
@ -356,7 +357,7 @@ rfb_send_rect(struct rfb_softc *rc, int cfd, struct bhyvegc_image *gc,
/* Compress with zlib */
err = deflate(&rc->zstream, Z_SYNC_FLUSH);
if (err != Z_OK) {
WPRINTF(("zlib[rect] deflate err: %d\n\r", err));
WPRINTF(("zlib[rect] deflate err: %d", err));
rc->enc_zlib_ok = false;
deflateEnd(&rc->zstream);
goto doraw;
@ -440,7 +441,7 @@ rfb_send_all(struct rfb_softc *rc, int cfd, struct bhyvegc_image *gc)
/* Compress with zlib */
err = deflate(&rc->zstream, Z_SYNC_FLUSH);
if (err != Z_OK) {
WPRINTF(("zlib deflate err: %d\n\r", err));
WPRINTF(("zlib deflate err: %d", err));
rc->enc_zlib_ok = false;
deflateEnd(&rc->zstream);
goto doraw;
@ -878,7 +879,7 @@ rfb_handle(struct rfb_softc *rc, int cfd)
for (;;) {
len = read(cfd, buf, 1);
if (len <= 0) {
DPRINTF(("rfb client exiting\n\r"));
DPRINTF(("rfb client exiting"));
break;
}
@ -902,7 +903,7 @@ rfb_handle(struct rfb_softc *rc, int cfd)
rfb_recv_cuttext_msg(rc, cfd);
break;
default:
WPRINTF(("rfb unknown cli-code %d!\n\r", buf[0] & 0xff));
WPRINTF(("rfb unknown cli-code %d!", buf[0] & 0xff));
goto done;
}
}
@ -1003,7 +1004,7 @@ rfb_init(char *hostname, int port, int wait, char *password)
hints.ai_flags = AI_NUMERICHOST | AI_NUMERICSERV | AI_PASSIVE;
if ((e = getaddrinfo(hostname, servname, &hints, &ai)) != 0) {
fprintf(stderr, "getaddrinfo: %s\n\r", gai_strerror(e));
EPRINTLN("getaddrinfo: %s", gai_strerror(e));
goto error;
}
@ -1043,7 +1044,7 @@ rfb_init(char *hostname, int port, int wait, char *password)
pthread_set_name_np(rc->tid, "rfb");
if (wait) {
DPRINTF(("Waiting for rfb client...\n\r"));
DPRINTF(("Waiting for rfb client..."));
pthread_mutex_lock(&rc->mtx);
pthread_cond_wait(&rc->cond, &rc->mtx);
pthread_mutex_unlock(&rc->mtx);

3
usr.sbin/bhyve/smbiostbl.c
View File

@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
#include <vmmapi.h>
#include "bhyverun.h"
#include "debug.h"
#include "smbiostbl.h"
#define MB (1024*1024)
@ -796,7 +797,7 @@ smbios_build(struct vmctx *ctx)
startaddr = paddr_guest2host(ctx, SMBIOS_BASE, SMBIOS_MAX_LENGTH);
if (startaddr == NULL) {
fprintf(stderr, "smbios table requires mapped mem\n");
EPRINTLN("smbios table requires mapped mem");
return (ENOMEM);
}

3
usr.sbin/bhyve/task_switch.c
View File

@ -48,6 +48,7 @@ __FBSDID("$FreeBSD$");
#include <vmmapi.h>
#include "bhyverun.h"
#include "debug.h"
/*
* Using 'struct i386tss' is tempting but causes myriad sign extension
@ -843,7 +844,7 @@ vmexit_task_switch(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
}
if (nt_type == SDT_SYS286BSY || nt_type == SDT_SYS286TSS) {
fprintf(stderr, "Task switch to 16-bit TSS not supported\n");
EPRINTLN("Task switch to 16-bit TSS not supported");
return (VMEXIT_ABORT);
}

2
usr.sbin/bhyve/uart_emul.c
View File

@ -54,6 +54,7 @@ __FBSDID("$FreeBSD$");
#include "mevent.h"
#include "uart_emul.h"
#include "debug.h"
#define COM1_BASE 0x3F8
#define COM1_IRQ 4
@ -152,6 +153,7 @@ ttyopen(struct ttyfd *tf)
tio_stdio_orig = orig;
atexit(ttyclose);
}
raw_stdio = 1;
}
static int

71
usr.sbin/bhyve/usb_mouse.c
View File

@ -42,10 +42,11 @@ __FBSDID("$FreeBSD$");
#include "usb_emul.h"
#include "console.h"
#include "bhyvegc.h"
#include "debug.h"
static int umouse_debug = 0;
#define DPRINTF(params) if (umouse_debug) printf params
#define WPRINTF(params) printf params
#define DPRINTF(params) if (umouse_debug) PRINTLN params
#define WPRINTF(params) PRINTLN params
/* USB endpoint context (1-15) for reporting mouse data events*/
#define UMOUSE_INTR_ENDPT 1
@ -350,7 +351,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
eshort = 0;
if (!xfer->ureq) {
DPRINTF(("umouse_request: port %d\r\n", sc->hci->hci_port));
DPRINTF(("umouse_request: port %d", sc->hci->hci_port));
goto done;
}
@ -359,13 +360,13 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
len = UGETW(xfer->ureq->wLength);
DPRINTF(("umouse_request: port %d, type 0x%x, req 0x%x, val 0x%x, "
"idx 0x%x, len %u\r\n",
"idx 0x%x, len %u",
sc->hci->hci_port, xfer->ureq->bmRequestType,
xfer->ureq->bRequest, value, index, len));
switch (UREQ(xfer->ureq->bRequest, xfer->ureq->bmRequestType)) {
case UREQ(UR_GET_CONFIG, UT_READ_DEVICE):
DPRINTF(("umouse: (UR_GET_CONFIG, UT_READ_DEVICE)\r\n"));
DPRINTF(("umouse: (UR_GET_CONFIG, UT_READ_DEVICE)"));
if (!data)
break;
@ -376,7 +377,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
break;
case UREQ(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
DPRINTF(("umouse: (UR_GET_DESCRIPTOR, UT_READ_DEVICE) val %x\r\n",
DPRINTF(("umouse: (UR_GET_DESCRIPTOR, UT_READ_DEVICE) val %x",
value >> 8));
if (!data)
break;
@ -384,7 +385,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
switch (value >> 8) {
case UDESC_DEVICE:
DPRINTF(("umouse: (->UDESC_DEVICE) len %u ?= "
"sizeof(umouse_dev_desc) %lu\r\n",
"sizeof(umouse_dev_desc) %lu",
len, sizeof(umouse_dev_desc)));
if ((value & 0xFF) != 0) {
err = USB_ERR_IOERROR;
@ -400,7 +401,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
break;
case UDESC_CONFIG:
DPRINTF(("umouse: (->UDESC_CONFIG)\r\n"));
DPRINTF(("umouse: (->UDESC_CONFIG)"));
if ((value & 0xFF) != 0) {
err = USB_ERR_IOERROR;
goto done;
@ -416,7 +417,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
break;
case UDESC_STRING:
DPRINTF(("umouse: (->UDESC_STRING)\r\n"));
DPRINTF(("umouse: (->UDESC_STRING)"));
str = NULL;
if ((value & 0xFF) < UMSTR_MAX)
str = umouse_desc_strings[value & 0xFF];
@ -459,7 +460,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
break;
case UDESC_BOS:
DPRINTF(("umouse: USB3 BOS\r\n"));
DPRINTF(("umouse: USB3 BOS"));
if (len > sizeof(umouse_bosd)) {
data->blen = len - sizeof(umouse_bosd);
len = sizeof(umouse_bosd);
@ -470,7 +471,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
break;
default:
DPRINTF(("umouse: unknown(%d)->ERROR\r\n", value >> 8));
DPRINTF(("umouse: unknown(%d)->ERROR", value >> 8));
err = USB_ERR_IOERROR;
goto done;
}
@ -479,7 +480,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
case UREQ(UR_GET_DESCRIPTOR, UT_READ_INTERFACE):
DPRINTF(("umouse: (UR_GET_DESCRIPTOR, UT_READ_INTERFACE) "
"0x%x\r\n", (value >> 8)));
"0x%x", (value >> 8)));
if (!data)
break;
@ -494,7 +495,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
data->bdone += len;
break;
default:
DPRINTF(("umouse: IO ERROR\r\n"));
DPRINTF(("umouse: IO ERROR"));
err = USB_ERR_IOERROR;
goto done;
}
@ -502,9 +503,9 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
break;
case UREQ(UR_GET_INTERFACE, UT_READ_INTERFACE):
DPRINTF(("umouse: (UR_GET_INTERFACE, UT_READ_INTERFACE)\r\n"));
DPRINTF(("umouse: (UR_GET_INTERFACE, UT_READ_INTERFACE)"));
if (index != 0) {
DPRINTF(("umouse get_interface, invalid index %d\r\n",
DPRINTF(("umouse get_interface, invalid index %d",
index));
err = USB_ERR_IOERROR;
goto done;
@ -522,7 +523,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
break;
case UREQ(UR_GET_STATUS, UT_READ_DEVICE):
DPRINTF(("umouse: (UR_GET_STATUS, UT_READ_DEVICE)\r\n"));
DPRINTF(("umouse: (UR_GET_STATUS, UT_READ_DEVICE)"));
if (data != NULL && len > 1) {
if (sc->hid.feature == UF_DEVICE_REMOTE_WAKEUP)
USETW(udata, UDS_REMOTE_WAKEUP);
@ -537,7 +538,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
case UREQ(UR_GET_STATUS, UT_READ_INTERFACE):
case UREQ(UR_GET_STATUS, UT_READ_ENDPOINT):
DPRINTF(("umouse: (UR_GET_STATUS, UT_READ_INTERFACE)\r\n"));
DPRINTF(("umouse: (UR_GET_STATUS, UT_READ_INTERFACE)"));
if (data != NULL && len > 1) {
USETW(udata, 0);
data->blen = len - 2;
@ -548,26 +549,26 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
case UREQ(UR_SET_ADDRESS, UT_WRITE_DEVICE):
/* XXX Controller should've handled this */
DPRINTF(("umouse set address %u\r\n", value));
DPRINTF(("umouse set address %u", value));
break;
case UREQ(UR_SET_CONFIG, UT_WRITE_DEVICE):
DPRINTF(("umouse set config %u\r\n", value));
DPRINTF(("umouse set config %u", value));
break;
case UREQ(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
DPRINTF(("umouse set descriptor %u\r\n", value));
DPRINTF(("umouse set descriptor %u", value));
break;
case UREQ(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
DPRINTF(("umouse: (UR_SET_FEATURE, UT_WRITE_DEVICE) %x\r\n", value));
DPRINTF(("umouse: (UR_SET_FEATURE, UT_WRITE_DEVICE) %x", value));
if (value == UF_DEVICE_REMOTE_WAKEUP)
sc->hid.feature = 0;
break;
case UREQ(UR_SET_FEATURE, UT_WRITE_DEVICE):
DPRINTF(("umouse: (UR_SET_FEATURE, UT_WRITE_DEVICE) %x\r\n", value));
DPRINTF(("umouse: (UR_SET_FEATURE, UT_WRITE_DEVICE) %x", value));
if (value == UF_DEVICE_REMOTE_WAKEUP)
sc->hid.feature = UF_DEVICE_REMOTE_WAKEUP;
break;
@ -576,31 +577,31 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
case UREQ(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
case UREQ(UR_SET_FEATURE, UT_WRITE_INTERFACE):
case UREQ(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
DPRINTF(("umouse: (UR_CLEAR_FEATURE, UT_WRITE_INTERFACE)\r\n"));
DPRINTF(("umouse: (UR_CLEAR_FEATURE, UT_WRITE_INTERFACE)"));
err = USB_ERR_IOERROR;
goto done;
case UREQ(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
DPRINTF(("umouse set interface %u\r\n", value));
DPRINTF(("umouse set interface %u", value));
break;
case UREQ(UR_ISOCH_DELAY, UT_WRITE_DEVICE):
DPRINTF(("umouse set isoch delay %u\r\n", value));
DPRINTF(("umouse set isoch delay %u", value));
break;
case UREQ(UR_SET_SEL, 0):
DPRINTF(("umouse set sel\r\n"));
DPRINTF(("umouse set sel"));
break;
case UREQ(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
DPRINTF(("umouse synch frame\r\n"));
DPRINTF(("umouse synch frame"));
break;
/* HID device requests */
case UREQ(UMOUSE_GET_REPORT, UT_READ_CLASS_INTERFACE):
DPRINTF(("umouse: (UMOUSE_GET_REPORT, UT_READ_CLASS_INTERFACE) "
"0x%x\r\n", (value >> 8)));
"0x%x", (value >> 8)));
if (!data)
break;
@ -641,23 +642,23 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
break;
case UREQ(UMOUSE_SET_REPORT, UT_WRITE_CLASS_INTERFACE):
DPRINTF(("umouse: (UMOUSE_SET_REPORT, UT_WRITE_CLASS_INTERFACE) ignored\r\n"));
DPRINTF(("umouse: (UMOUSE_SET_REPORT, UT_WRITE_CLASS_INTERFACE) ignored"));
break;
case UREQ(UMOUSE_SET_IDLE, UT_WRITE_CLASS_INTERFACE):
sc->hid.idle = UGETW(xfer->ureq->wValue) >> 8;
DPRINTF(("umouse: (UMOUSE_SET_IDLE, UT_WRITE_CLASS_INTERFACE) %x\r\n",
DPRINTF(("umouse: (UMOUSE_SET_IDLE, UT_WRITE_CLASS_INTERFACE) %x",
sc->hid.idle));
break;
case UREQ(UMOUSE_SET_PROTOCOL, UT_WRITE_CLASS_INTERFACE):
sc->hid.protocol = UGETW(xfer->ureq->wValue) >> 8;
DPRINTF(("umouse: (UR_CLEAR_FEATURE, UT_WRITE_CLASS_INTERFACE) %x\r\n",
DPRINTF(("umouse: (UR_CLEAR_FEATURE, UT_WRITE_CLASS_INTERFACE) %x",
sc->hid.protocol));
break;
default:
DPRINTF(("**** umouse request unhandled\r\n"));
DPRINTF(("**** umouse request unhandled"));
err = USB_ERR_IOERROR;
break;
}
@ -669,7 +670,7 @@ umouse_request(void *scarg, struct usb_data_xfer *xfer)
else if (eshort)
err = USB_ERR_SHORT_XFER;
DPRINTF(("umouse request error code %d (0=ok), blen %u txlen %u\r\n",
DPRINTF(("umouse request error code %d (0=ok), blen %u txlen %u",
err, (data ? data->blen : 0), (data ? data->bdone : 0)));
return (err);
@ -685,7 +686,7 @@ umouse_data_handler(void *scarg, struct usb_data_xfer *xfer, int dir,
int len, i, idx;
int err;
DPRINTF(("umouse handle data - DIR=%s|EP=%d, blen %d\r\n",
DPRINTF(("umouse handle data - DIR=%s|EP=%d, blen %d",
dir ? "IN" : "OUT", epctx, xfer->data[0].blen));
@ -713,7 +714,7 @@ umouse_data_handler(void *scarg, struct usb_data_xfer *xfer, int dir,
len = data->blen;
if (udata == NULL) {
DPRINTF(("umouse no buffer provided for input\r\n"));
DPRINTF(("umouse no buffer provided for input"));
err = USB_ERR_NOMEM;
goto done;
}

59
usr.sbin/bhyve/virtio.c
View File

@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <pthread_np.h>
#include "bhyverun.h"
#include "debug.h"
#include "pci_emul.h"
#include "virtio.h"
@ -294,8 +295,8 @@ vq_getchain(struct vqueue_info *vq, uint16_t *pidx,
return (0);
if (ndesc > vq->vq_qsize) {
/* XXX need better way to diagnose issues */
fprintf(stderr,
"%s: ndesc (%u) out of range, driver confused?\r\n",
EPRINTLN(
"%s: ndesc (%u) out of range, driver confused?",
name, (u_int)ndesc);
return (-1);
}
@ -313,9 +314,9 @@ vq_getchain(struct vqueue_info *vq, uint16_t *pidx,
vq->vq_last_avail++;
for (i = 0; i < VQ_MAX_DESCRIPTORS; next = vdir->vd_next) {
if (next >= vq->vq_qsize) {
fprintf(stderr,
EPRINTLN(
"%s: descriptor index %u out of range, "
"driver confused?\r\n",
"driver confused?",
name, next);
return (-1);
}
@ -325,17 +326,17 @@ vq_getchain(struct vqueue_info *vq, uint16_t *pidx,
i++;
} else if ((vs->vs_vc->vc_hv_caps &
VIRTIO_RING_F_INDIRECT_DESC) == 0) {
fprintf(stderr,
EPRINTLN(
"%s: descriptor has forbidden INDIRECT flag, "
"driver confused?\r\n",
"driver confused?",
name);
return (-1);
} else {
n_indir = vdir->vd_len / 16;
if ((vdir->vd_len & 0xf) || n_indir == 0) {
fprintf(stderr,
EPRINTLN(
"%s: invalid indir len 0x%x, "
"driver confused?\r\n",
"driver confused?",
name, (u_int)vdir->vd_len);
return (-1);
}
@ -352,9 +353,9 @@ vq_getchain(struct vqueue_info *vq, uint16_t *pidx,
for (;;) {
vp = &vindir[next];
if (vp->vd_flags & VRING_DESC_F_INDIRECT) {
fprintf(stderr,
EPRINTLN(
"%s: indirect desc has INDIR flag,"
" driver confused?\r\n",
" driver confused?",
name);
return (-1);
}
@ -365,9 +366,9 @@ vq_getchain(struct vqueue_info *vq, uint16_t *pidx,
break;
next = vp->vd_next;
if (next >= n_indir) {
fprintf(stderr,
EPRINTLN(
"%s: invalid next %u > %u, "
"driver confused?\r\n",
"driver confused?",
name, (u_int)next, n_indir);
return (-1);
}
@ -377,8 +378,8 @@ vq_getchain(struct vqueue_info *vq, uint16_t *pidx,
return (i);
}
loopy:
fprintf(stderr,
"%s: descriptor loop? count > %d - driver confused?\r\n",
EPRINTLN(
"%s: descriptor loop? count > %d - driver confused?",
name, i);
return (-1);
}
@ -609,12 +610,12 @@ vi_pci_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
if (cr == NULL || cr->cr_size != size) {
if (cr != NULL) {
/* offset must be OK, so size must be bad */
fprintf(stderr,
"%s: read from %s: bad size %d\r\n",
EPRINTLN(
"%s: read from %s: bad size %d",
name, cr->cr_name, size);
} else {
fprintf(stderr,
"%s: read from bad offset/size %jd/%d\r\n",
EPRINTLN(
"%s: read from bad offset/size %jd/%d",
name, (uintmax_t)offset, size);
}
goto done;
@ -729,16 +730,16 @@ vi_pci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
if (cr != NULL) {
/* offset must be OK, wrong size and/or reg is R/O */
if (cr->cr_size != size)
fprintf(stderr,
"%s: write to %s: bad size %d\r\n",
EPRINTLN(
"%s: write to %s: bad size %d",
name, cr->cr_name, size);
if (cr->cr_ro)
fprintf(stderr,
"%s: write to read-only reg %s\r\n",
EPRINTLN(
"%s: write to read-only reg %s",
name, cr->cr_name);
} else {
fprintf(stderr,
"%s: write to bad offset/size %jd/%d\r\n",
EPRINTLN(
"%s: write to bad offset/size %jd/%d",
name, (uintmax_t)offset, size);
}
goto done;
@ -766,7 +767,7 @@ vi_pci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
break;
case VTCFG_R_QNOTIFY:
if (value >= vc->vc_nvq) {
fprintf(stderr, "%s: queue %d notify out of range\r\n",
EPRINTLN("%s: queue %d notify out of range",
name, (int)value);
goto done;
}
@ -776,8 +777,8 @@ vi_pci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
else if (vc->vc_qnotify)
(*vc->vc_qnotify)(DEV_SOFTC(vs), vq);
else
fprintf(stderr,
"%s: qnotify queue %d: missing vq/vc notify\r\n",
EPRINTLN(
"%s: qnotify queue %d: missing vq/vc notify",
name, (int)value);
break;
case VTCFG_R_STATUS:
@ -798,8 +799,8 @@ vi_pci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
goto done;
bad_qindex:
fprintf(stderr,
"%s: write config reg %s: curq %d >= max %d\r\n",
EPRINTLN(
"%s: write config reg %s: curq %d >= max %d",
name, cr->cr_name, vs->vs_curq, vc->vc_nvq);
done:
if (vs->vs_mtx)

3
usr.sbin/bhyve/xmsr.c
View File

@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
#include <stdlib.h>
#include <string.h>
#include "debug.h"
#include "xmsr.h"
static int cpu_vendor_intel, cpu_vendor_amd;
@ -227,7 +228,7 @@ init_msr(void)
} else if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
cpu_vendor_intel = 1;
} else {
fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor);
EPRINTLN("Unknown cpu vendor \"%s\"", cpu_vendor);
error = -1;
}
return (error);