Low-level code for programming the I/O SAPIC.
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sys/ia64/ia64/sapic.c
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151
sys/ia64/ia64/sapic.c
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/*-
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* Copyright (c) 2001 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <machine/sapicvar.h>
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#include <machine/sapicreg.h>
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static MALLOC_DEFINE(M_SAPIC, "sapic", "I/O SAPIC devices");
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struct sapic_rte {
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u_int64_t rte_vector :8;
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u_int64_t rte_delivery_mode :3;
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u_int64_t rte_destination_mode :1;
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u_int64_t rte_delivery_status :1;
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u_int64_t rte_polarity :1;
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u_int64_t rte_rirr :1;
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u_int64_t rte_trigger_mode :1;
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u_int64_t rte_mask :1;
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u_int64_t rte_flushen :1;
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u_int64_t rte_reserved :30;
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u_int64_t rte_destination_eid :8;
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u_int64_t rte_destination_id :8;
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};
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static u_int32_t
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sapic_read(struct sapic *sa, int which)
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{
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vm_offset_t reg = sa->sa_registers;
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*(volatile u_int32_t *) (reg + SAPIC_IO_SELECT) = which;
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ia64_mf();
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ia64_mf_a();
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return *(volatile u_int32_t *) (reg + SAPIC_IO_WINDOW);
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}
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static void
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sapic_write(struct sapic *sa, int which, u_int32_t value)
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{
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vm_offset_t reg = sa->sa_registers;
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*(volatile u_int32_t *) (reg + SAPIC_IO_SELECT) = which;
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ia64_mf();
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ia64_mf_a();
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*(volatile u_int32_t *) (reg + SAPIC_IO_WINDOW) = value;
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ia64_mf();
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ia64_mf_a();
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}
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#if 0
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static void
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sapic_read_rte(struct sapic *sa, int which,
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struct sapic_rte *rte)
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{
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u_int32_t *p = (u_int32_t *) rte;
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critical_t c;
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c = critical_enter();
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p[0] = sapic_read(sa, SAPIC_RTE_BASE + 2*which);
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p[1] = sapic_read(sa, SAPIC_RTE_BASE + 2*which + 1);
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critical_exit(c);
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}
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#endif
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static void
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sapic_write_rte(struct sapic *sa, int which,
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struct sapic_rte *rte)
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{
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u_int32_t *p = (u_int32_t *) rte;
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critical_t c;
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c = critical_enter();
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sapic_write(sa, SAPIC_RTE_BASE + 2*which, p[0]);
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sapic_write(sa, SAPIC_RTE_BASE + 2*which + 1, p[1]);
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critical_exit(c);
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}
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struct sapic *
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sapic_create(int id, int base, u_int64_t address)
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{
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struct sapic *sa;
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int max;
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sa = malloc(sizeof(struct sapic), M_SAPIC, M_NOWAIT);
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if (!sa)
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return 0;
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sa->sa_id = id;
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sa->sa_base = base;
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sa->sa_registers = IA64_PHYS_TO_RR6(address);
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max = (sapic_read(sa, SAPIC_VERSION) >> 16) & 0xff;
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sa->sa_limit = base + max;
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ia64_add_sapic(sa);
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return sa;
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}
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void
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sapic_enable(struct sapic *sa, int input, int vector,
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int trigger_mode, int polarity)
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{
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struct sapic_rte rte;
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u_int64_t lid = ia64_get_lid();
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bzero(&rte, sizeof(rte));
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rte.rte_destination_id = (lid >> 24) & 15;
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rte.rte_destination_eid = (lid >> 16) & 15;
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rte.rte_trigger_mode = trigger_mode;
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rte.rte_polarity = polarity;
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rte.rte_delivery_mode = 0; /* fixed */
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rte.rte_vector = vector;
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sapic_write_rte(sa, input, &rte);
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}
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void
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sapic_eoi(struct sapic *sa, int vector)
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{
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vm_offset_t reg = sa->sa_registers;
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*(volatile u_int32_t *) (reg + SAPIC_APIC_EOI) = vector;
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}
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