diff --git a/sys/powerpc/pseries/phyp-hvcall.h b/sys/powerpc/pseries/phyp-hvcall.h
index 19bcc2fe2a04..fdc6a774ce03 100644
--- a/sys/powerpc/pseries/phyp-hvcall.h
+++ b/sys/powerpc/pseries/phyp-hvcall.h
@@ -170,6 +170,13 @@
 #define H_PP1 (1UL<<(63-62))
 #define H_PP2 (1UL<<(63-63))
 
+/* H_SET_MODE resource identifiers from 14.5.4.3.5. */
+#define	H_SET_MODE_RSRC_CIABR		0x1	/* All versions */
+#define	H_SET_MODE_RSRC_DAWR0		0x2	/* All versions */
+#define	H_SET_MODE_RSRC_INTR_TRANS_MODE	0x3	/* All versions */
+#define	H_SET_MODE_RSRC_ILE		0x4	/* PAPR 2.8 / ISA 2.07 */
+#define	H_SET_MODE_RSRC_DAWR1		0x5	/* ISA 3.1 Future support */
+
 /* pSeries hypervisor opcodes. */
 #define H_REMOVE		0x04
 #define H_ENTER			0x08
diff --git a/sys/powerpc/pseries/platform_chrp.c b/sys/powerpc/pseries/platform_chrp.c
index 3e8284317c33..202ee059c528 100644
--- a/sys/powerpc/pseries/platform_chrp.c
+++ b/sys/powerpc/pseries/platform_chrp.c
@@ -136,6 +136,9 @@ chrp_attach(platform_t plat)
 	int quiesce;
 #ifdef __powerpc64__
 	int i;
+#if BYTE_ORDER == LITTLE_ENDIAN
+	int result;
+#endif
 
 	/* XXX: check for /rtas/ibm,hypertas-functions? */
 	if (!(mfmsr() & PSL_HV)) {
@@ -171,6 +174,24 @@ chrp_attach(platform_t plat)
 
 		/* Set up hypervisor CPU stuff */
 		chrp_smp_ap_init(plat);
+
+#if BYTE_ORDER == LITTLE_ENDIAN
+		/*
+		 * Ask the hypervisor to update the LPAR ILE bit.
+		 *
+		 * This involves all processors reentering the hypervisor
+		 * so the change appears simultaneously in all processors.
+		 * This can take a long time.
+		 */
+		for(;;) {
+			result = phyp_hcall(H_SET_MODE, 1UL,
+			    H_SET_MODE_RSRC_ILE, 0, 0);
+			if (result == H_SUCCESS)
+				break;
+			DELAY(1000);
+		}
+#endif
+
 	}
 #endif
 	chrp_cpuref_init();