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Don't disable interrupts when calling a vm86 mode interrupt or routine

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from user mode.  Don't disable interrupts when returning from vm86 mode
to user mode either.  Now, we only disable interrupts before calling a
hardware interrupt handler, which is the only time we _should_ be
disabling interrupts.

Because of this, err, feature, any routine that one called in vm86 mode
had to re-enable interrupts by setting the interrupt flag or interrupts
would remain disabled even after the routine returned.  For example, I
have a simple debugging routine that uses a vm86 mode function to dump
any arbitrary memory word that I use to read the BIOS timer or any other
memory location.  This function does 1 load instruction from memory and
then returns.  Since it didn't re-enable interrupts, the first time I
called it to read the BIOS timer, it disabled interrupts.   This also
affected the PXE bootstrap as it needs interrupts enabled while it is
processing.  This patch fixes both of those situations so that those
functions do not worry about having to enable interrupts.  Hardware
interrupt handlers worked fine with the old code because they always
enable interrupts as part of their routine.

If you have any problems with the loader after this commit, please
let me know.  I'd like to MFC it in a week or two since PXE support
needs it.

Noticed by:	ps, Michael Johnston <michael.johnston@intel.com>
This commit is contained in:
John Baldwin 2000-04-26 04:35:25 +00:00
parent 0a48a6902d
commit 36273c5d79
2 changed files with 4 additions and 4 deletions
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4
sys/boot/i386/btx/btx/btx.S
View File

@ -649,7 +649,7 @@ v86intn.3: subl %edi,%esi # From
movzwl 0x2(%eax),%edi # Load CS
movl %edi,0x2c(%ebp) # Save CS
xorl %edi,%edi # No ESI adjustment
andb $~0x3,%dh # Clear IF and TF
andb $~0x1,%dh # Clear TF
jmp v86mon.5 # Finish up
#
# Hardware interrupt jump table.
@ -792,7 +792,7 @@ intusr.4: shrl $0x4,%eax # Gives segment
stosl # Set ESP
xchgl %eax,%ecx # Get flags
btsl $0x11,%eax # Set VM
andb $~0x3,%ah # Clear IF and TF
andb $~0x1,%ah # Clear TF
stosl # Set EFL
xchgl %eax,%ebp # Get int no/address
testb $0x1,%dl # Address?

4
sys/boot/i386/btx/btx/btx.s
View File

@ -649,7 +649,7 @@ v86intn.3: subl %edi,%esi # From
movzwl 0x2(%eax),%edi # Load CS
movl %edi,0x2c(%ebp) # Save CS
xorl %edi,%edi # No ESI adjustment
andb $~0x3,%dh # Clear IF and TF
andb $~0x1,%dh # Clear TF
jmp v86mon.5 # Finish up
#
# Hardware interrupt jump table.
@ -792,7 +792,7 @@ intusr.4: shrl $0x4,%eax # Gives segment
stosl # Set ESP
xchgl %eax,%ecx # Get flags
btsl $0x11,%eax # Set VM
andb $~0x3,%ah # Clear IF and TF
andb $~0x1,%ah # Clear TF
stosl # Set EFL
xchgl %eax,%ebp # Get int no/address
testb $0x1,%dl # Address?