Vendor import of llvm release_40 branch r296509:

https://llvm.org/svn/llvm-project/llvm/branches/release_40@296509
This commit is contained in:
Dimitry Andric 2017-02-28 21:07:18 +00:00
parent 9c618dddcd
commit 365919ebc1
14 changed files with 119 additions and 117 deletions

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@ -20,6 +20,14 @@ have questions or comments, the `LLVM Developer's Mailing List
<http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ is a good place to send <http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ is a good place to send
them. them.
New Versioning Scheme
=====================
Starting with this release, LLVM is using a
`new versioning scheme <http://blog.llvm.org/2016/12/llvms-new-versioning-scheme.html>`_,
increasing the major version number with each major release. Stable updates to
this release will be versioned 4.0.x, and the next major release, six months
from now, will be version 5.0.0.
Non-comprehensive list of changes in this release Non-comprehensive list of changes in this release
================================================= =================================================
* Minimum compiler version to build has been raised to GCC 4.8 and VS 2015. * Minimum compiler version to build has been raised to GCC 4.8 and VS 2015.
@ -238,6 +246,34 @@ Most of the work behind the scenes has been on correctness of generated
assembly, and also fixing some assertions we would hit on some well-formed assembly, and also fixing some assertions we would hit on some well-formed
inputs. inputs.
Changes to the MIPS Target
-----------------------------
**During this release the MIPS target has:**
* IAS is now enabled by default for Debian mips64el.
* Added support for the two operand form for many instructions.
* Added the following macros: unaligned load/store, seq, double word load/store for O32.
* Improved the parsing of complex memory offset expressions.
* Enabled the integrated assembler by default for Debian mips64el.
* Added a generic scheduler based on the interAptiv CPU.
* Added support for thread local relocations.
* Added recip, rsqrt, evp, dvp, synci instructions in IAS.
* Optimized the generation of constants from some cases.
**The following issues have been fixed:**
* Thread local debug information is correctly recorded.
* MSA intrinsics are now range checked.
* Fixed an issue with MSA and the no-odd-spreg abi.
* Fixed some corner cases in handling forbidden slots for MIPSR6.
* Fixed an issue with jumps not being converted to relative branches for assembly.
* Fixed the handling of local symbols and jal instruction.
* N32/N64 no longer have their relocation tables sorted as per their ABIs.
* Fixed a crash when half-precision floating point conversion MSA intrinsics are used.
* Fixed several crashes involving FastISel.
* Corrected the corrected definitions for aui/daui/dahi/dati for MIPSR6.
Changes to the OCaml bindings Changes to the OCaml bindings
----------------------------- -----------------------------

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@ -707,9 +707,8 @@ void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
// Kill off any remaining uses that don't match available, and build a list of // Kill off any remaining uses that don't match available, and build a list of
// incoming DomainValues that we want to merge. // incoming DomainValues that we want to merge.
SmallVector<LiveReg, 4> Regs; SmallVector<const LiveReg *, 4> Regs;
for (SmallVectorImpl<int>::iterator i=used.begin(), e=used.end(); i!=e; ++i) { for (int rx : used) {
int rx = *i;
assert(LiveRegs && "no space allocated for live registers"); assert(LiveRegs && "no space allocated for live registers");
const LiveReg &LR = LiveRegs[rx]; const LiveReg &LR = LiveRegs[rx];
// This useless DomainValue could have been missed above. // This useless DomainValue could have been missed above.
@ -718,16 +717,11 @@ void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
continue; continue;
} }
// Sorted insertion. // Sorted insertion.
bool Inserted = false; auto I = std::upper_bound(Regs.begin(), Regs.end(), &LR,
for (SmallVectorImpl<LiveReg>::iterator i = Regs.begin(), e = Regs.end(); [](const LiveReg *LHS, const LiveReg *RHS) {
i != e && !Inserted; ++i) { return LHS->Def < RHS->Def;
if (LR.Def < i->Def) { });
Inserted = true; Regs.insert(I, &LR);
Regs.insert(i, LR);
}
}
if (!Inserted)
Regs.push_back(LR);
} }
// doms are now sorted in order of appearance. Try to merge them all, giving // doms are now sorted in order of appearance. Try to merge them all, giving
@ -735,14 +729,14 @@ void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
DomainValue *dv = nullptr; DomainValue *dv = nullptr;
while (!Regs.empty()) { while (!Regs.empty()) {
if (!dv) { if (!dv) {
dv = Regs.pop_back_val().Value; dv = Regs.pop_back_val()->Value;
// Force the first dv to match the current instruction. // Force the first dv to match the current instruction.
dv->AvailableDomains = dv->getCommonDomains(available); dv->AvailableDomains = dv->getCommonDomains(available);
assert(dv->AvailableDomains && "Domain should have been filtered"); assert(dv->AvailableDomains && "Domain should have been filtered");
continue; continue;
} }
DomainValue *Latest = Regs.pop_back_val().Value; DomainValue *Latest = Regs.pop_back_val()->Value;
// Skip already merged values. // Skip already merged values.
if (Latest == dv || Latest->Next) if (Latest == dv || Latest->Next)
continue; continue;

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@ -0,0 +1,22 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=avx512dq | FileCheck %s
define void @f_f___un_3C_unf_3E_un_3C_unf_3E_() {
; CHECK-LABEL: f_f___un_3C_unf_3E_un_3C_unf_3E_:
; CHECK: # BB#0:
; CHECK-NEXT: vmovapd 0, %zmm0
; CHECK-NEXT: vmovapd 64, %zmm1
; CHECK-NEXT: vmovapd {{.*#+}} zmm2 = [0,16,0,16,0,16,0,16,0,16,0,16,0,16,0,16]
; CHECK-NEXT: kshiftrw $8, %k0, %k1
; CHECK-NEXT: vorpd %zmm2, %zmm1, %zmm1 {%k1}
; CHECK-NEXT: vorpd %zmm2, %zmm0, %zmm0 {%k1}
; CHECK-NEXT: vmovapd %zmm0, 0
; CHECK-NEXT: vmovapd %zmm1, 64
; CHECK-NEXT: retl
%a_load22 = load <16 x i64>, <16 x i64>* null, align 1
%bitop = or <16 x i64> %a_load22, <i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736>
%v.i = load <16 x i64>, <16 x i64>* null
%v1.i41 = select <16 x i1> undef, <16 x i64> %bitop, <16 x i64> %v.i
store <16 x i64> %v1.i41, <16 x i64>* null
ret void
}

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@ -1,14 +1,8 @@
--- ---
- { id: 1, address: 0x000000000041CA40, function: 0x000000000041CA40, kind: function-enter, - { id: 1, address: 0x000000000041CA40, function: 0x000000000041CA40, kind: function-enter, always-instrument: true }
always-instrument: true } - { id: 1, address: 0x000000000041CA50, function: 0x000000000041CA40, kind: tail-exit, always-instrument: true }
- { id: 1, address: 0x000000000041CA50, function: 0x000000000041CA40, kind: tail-exit, - { id: 2, address: 0x000000000041CA70, function: 0x000000000041CA70, kind: function-enter, always-instrument: true }
always-instrument: true } - { id: 2, address: 0x000000000041CA7C, function: 0x000000000041CA70, kind: tail-exit, always-instrument: true }
- { id: 2, address: 0x000000000041CA70, function: 0x000000000041CA70, kind: function-enter, - { id: 3, address: 0x000000000041CAA0, function: 0x000000000041CAA0, kind: function-enter, always-instrument: true }
always-instrument: true } - { id: 3, address: 0x000000000041CAB4, function: 0x000000000041CAA0, kind: function-exit, always-instrument: true }
- { id: 2, address: 0x000000000041CA7C, function: 0x000000000041CA70, kind: tail-exit,
always-instrument: true }
- { id: 3, address: 0x000000000041CAA0, function: 0x000000000041CAA0, kind: function-enter,
always-instrument: true }
- { id: 3, address: 0x000000000041CAB4, function: 0x000000000041CAA0, kind: function-exit,
always-instrument: true }
... ...

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@ -7,10 +7,8 @@ header:
nonstop-tsc: true nonstop-tsc: true
cycle-frequency: 2601000000 cycle-frequency: 2601000000
records: records:
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, tsc: 10001 }
tsc: 10001 } - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit, tsc: 10100 }
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit,
tsc: 10100 }
... ...
#CHECK: Functions with latencies: 1 #CHECK: Functions with latencies: 1

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@ -17,27 +17,17 @@ header:
cycle-frequency: 1 cycle-frequency: 1
records: records:
# Function id: 1 # Function id: 1
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, tsc: 10001 }
tsc: 10001 } - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit, tsc: 10100 }
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit, - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, tsc: 10101 }
tsc: 10100 } - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit, tsc: 10200 }
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, tsc: 10201 }
tsc: 10101 } - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit, tsc: 10300 }
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit,
tsc: 10200 }
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter,
tsc: 10201 }
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit,
tsc: 10300 }
# Function id: 2 # Function id: 2
- { type: 0, func-id: 2, cpu: 1, thread: 222, kind: function-enter, - { type: 0, func-id: 2, cpu: 1, thread: 222, kind: function-enter, tsc: 10001 }
tsc: 10001 } - { type: 0, func-id: 2, cpu: 1, thread: 222, kind: function-exit, tsc: 10002 }
- { type: 0, func-id: 2, cpu: 1, thread: 222, kind: function-exit, - { type: 0, func-id: 2, cpu: 1, thread: 222, kind: function-enter, tsc: 10101 }
tsc: 10002 } - { type: 0, func-id: 2, cpu: 1, thread: 222, kind: function-exit, tsc: 10102 }
- { type: 0, func-id: 2, cpu: 1, thread: 222, kind: function-enter,
tsc: 10101 }
- { type: 0, func-id: 2, cpu: 1, thread: 222, kind: function-exit,
tsc: 10102 }
#DEFAULT: Functions with latencies: 2 #DEFAULT: Functions with latencies: 2
#DEFAULT-NEXT: funcid count [ min, med, 90p, 99p, max] sum function #DEFAULT-NEXT: funcid count [ min, med, 90p, 99p, max] sum function

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@ -7,10 +7,8 @@ header:
nonstop-tsc: true nonstop-tsc: true
cycle-frequency: 2601000000 cycle-frequency: 2601000000
records: records:
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-enter, tsc: 10001 }
tsc: 10001 } - { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit, tsc: 10100 }
- { type: 0, func-id: 1, cpu: 1, thread: 111, kind: function-exit,
tsc: 10100 }
... ...
#CHECK: --- #CHECK: ---
@ -21,8 +19,6 @@ records:
#CHECK-NEXT: nonstop-tsc: true #CHECK-NEXT: nonstop-tsc: true
#CHECK-NEXT: cycle-frequency: 2601000000 #CHECK-NEXT: cycle-frequency: 2601000000
#CHECK-NEXT: records: #CHECK-NEXT: records:
#CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 1, thread: 111, kind: function-enter, #CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 1, thread: 111, kind: function-enter, tsc: 10001 }
#CHECK-NEXT: tsc: 10001 } #CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 1, thread: 111, kind: function-exit, tsc: 10100 }
#CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 1, thread: 111, kind: function-exit,
#CHECK-NEXT: tsc: 10100 }
#CHECK-NEXT: ... #CHECK-NEXT: ...

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@ -8,16 +8,10 @@
; CHECK-NEXT: nonstop-tsc: true ; CHECK-NEXT: nonstop-tsc: true
; CHECK-NEXT: cycle-frequency: 2601000000 ; CHECK-NEXT: cycle-frequency: 2601000000
; CHECK-NEXT: records: ; CHECK-NEXT: records:
; CHECK-NEXT: - { type: 0, func-id: 3, function: '3', cpu: 37, thread: 84697, kind: function-enter, ; CHECK-NEXT: - { type: 0, func-id: 3, function: '3', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841453914 }
; CHECK-NEXT: tsc: 3315356841453914 } ; CHECK-NEXT: - { type: 0, func-id: 2, function: '2', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841454542 }
; CHECK-NEXT: - { type: 0, func-id: 2, function: '2', cpu: 37, thread: 84697, kind: function-enter, ; CHECK-NEXT: - { type: 0, func-id: 2, function: '2', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841454670 }
; CHECK-NEXT: tsc: 3315356841454542 } ; CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841454762 }
; CHECK-NEXT: - { type: 0, func-id: 2, function: '2', cpu: 37, thread: 84697, kind: function-exit, ; CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841454802 }
; CHECK-NEXT: tsc: 3315356841454670 } ; CHECK-NEXT: - { type: 0, func-id: 3, function: '3', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841494828 }
; CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 37, thread: 84697, kind: function-enter,
; CHECK-NEXT: tsc: 3315356841454762 }
; CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 37, thread: 84697, kind: function-exit,
; CHECK-NEXT: tsc: 3315356841454802 }
; CHECK-NEXT: - { type: 0, func-id: 3, function: '3', cpu: 37, thread: 84697, kind: function-exit,
; CHECK-NEXT: tsc: 3315356841494828 }
; CHECK-NEXT: ... ; CHECK-NEXT: ...

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@ -8,16 +8,10 @@
; CHECK-NEXT: nonstop-tsc: true ; CHECK-NEXT: nonstop-tsc: true
; CHECK-NEXT: cycle-frequency: 2601000000 ; CHECK-NEXT: cycle-frequency: 2601000000
; CHECK-NEXT: records: ; CHECK-NEXT: records:
; CHECK-NEXT: - { type: 0, func-id: 3, function: main, cpu: 37, thread: 84697, kind: function-enter, ; CHECK-NEXT: - { type: 0, func-id: 3, function: main, cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841453914 }
; CHECK-NEXT: tsc: 3315356841453914 } ; CHECK-NEXT: - { type: 0, func-id: 2, function: {{.*foo.*}}, cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841454542 }
; CHECK-NEXT: - { type: 0, func-id: 2, function: {{.*foo.*}}, cpu: 37, thread: 84697, kind: function-enter, ; CHECK-NEXT: - { type: 0, func-id: 2, function: {{.*foo.*}}, cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841454670 }
; CHECK-NEXT: tsc: 3315356841454542 } ; CHECK-NEXT: - { type: 0, func-id: 1, function: {{.*bar.*}}, cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841454762 }
; CHECK-NEXT: - { type: 0, func-id: 2, function: {{.*foo.*}}, cpu: 37, thread: 84697, kind: function-exit, ; CHECK-NEXT: - { type: 0, func-id: 1, function: {{.*bar.*}}, cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841454802 }
; CHECK-NEXT: tsc: 3315356841454670 } ; CHECK-NEXT: - { type: 0, func-id: 3, function: main, cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841494828 }
; CHECK-NEXT: - { type: 0, func-id: 1, function: {{.*bar.*}}, cpu: 37, thread: 84697, kind: function-enter,
; CHECK-NEXT: tsc: 3315356841454762 }
; CHECK-NEXT: - { type: 0, func-id: 1, function: {{.*bar.*}}, cpu: 37, thread: 84697, kind: function-exit,
; CHECK-NEXT: tsc: 3315356841454802 }
; CHECK-NEXT: - { type: 0, func-id: 3, function: main, cpu: 37, thread: 84697, kind: function-exit,
; CHECK-NEXT: tsc: 3315356841494828 }
; CHECK-NEXT: ... ; CHECK-NEXT: ...

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@ -8,16 +8,10 @@
; CHECK-NEXT: nonstop-tsc: true ; CHECK-NEXT: nonstop-tsc: true
; CHECK-NEXT: cycle-frequency: 2601000000 ; CHECK-NEXT: cycle-frequency: 2601000000
; CHECK-NEXT: records: ; CHECK-NEXT: records:
; CHECK-NEXT: - { type: 0, func-id: 3, function: '@(41caa0)', cpu: 37, thread: 84697, ; CHECK-NEXT: - { type: 0, func-id: 3, function: '@(41caa0)', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841453914 }
; CHECK-NEXT: kind: function-enter, tsc: 3315356841453914 } ; CHECK-NEXT: - { type: 0, func-id: 2, function: '@(41ca70)', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841454542 }
; CHECK-NEXT: - { type: 0, func-id: 2, function: '@(41ca70)', cpu: 37, thread: 84697, ; CHECK-NEXT: - { type: 0, func-id: 2, function: '@(41ca70)', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841454670 }
; CHECK-NEXT: kind: function-enter, tsc: 3315356841454542 } ; CHECK-NEXT: - { type: 0, func-id: 1, function: '@(41ca40)', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841454762 }
; CHECK-NEXT: - { type: 0, func-id: 2, function: '@(41ca70)', cpu: 37, thread: 84697, ; CHECK-NEXT: - { type: 0, func-id: 1, function: '@(41ca40)', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841454802 }
; CHECK-NEXT: kind: function-exit, tsc: 3315356841454670 } ; CHECK-NEXT: - { type: 0, func-id: 3, function: '@(41caa0)', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841494828 }
; CHECK-NEXT: - { type: 0, func-id: 1, function: '@(41ca40)', cpu: 37, thread: 84697,
; CHECK-NEXT: kind: function-enter, tsc: 3315356841454762 }
; CHECK-NEXT: - { type: 0, func-id: 1, function: '@(41ca40)', cpu: 37, thread: 84697,
; CHECK-NEXT: kind: function-exit, tsc: 3315356841454802 }
; CHECK-NEXT: - { type: 0, func-id: 3, function: '@(41caa0)', cpu: 37, thread: 84697,
; CHECK-NEXT: kind: function-exit, tsc: 3315356841494828 }
; CHECK-NEXT: ... ; CHECK-NEXT: ...

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@ -8,16 +8,10 @@
; CHECK-NEXT: nonstop-tsc: true ; CHECK-NEXT: nonstop-tsc: true
; CHECK-NEXT: cycle-frequency: 2601000000 ; CHECK-NEXT: cycle-frequency: 2601000000
; CHECK-NEXT: records: ; CHECK-NEXT: records:
; CHECK-NEXT: - { type: 0, func-id: 3, function: '3', cpu: 37, thread: 84697, kind: function-enter, ; CHECK-NEXT: - { type: 0, func-id: 3, function: '3', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841453914 }
; CHECK-NEXT: tsc: 3315356841453914 } ; CHECK-NEXT: - { type: 0, func-id: 2, function: '2', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841454542 }
; CHECK-NEXT: - { type: 0, func-id: 2, function: '2', cpu: 37, thread: 84697, kind: function-enter, ; CHECK-NEXT: - { type: 0, func-id: 2, function: '2', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841454670 }
; CHECK-NEXT: tsc: 3315356841454542 } ; CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 37, thread: 84697, kind: function-enter, tsc: 3315356841454762 }
; CHECK-NEXT: - { type: 0, func-id: 2, function: '2', cpu: 37, thread: 84697, kind: function-exit, ; CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841454802 }
; CHECK-NEXT: tsc: 3315356841454670 } ; CHECK-NEXT: - { type: 0, func-id: 3, function: '3', cpu: 37, thread: 84697, kind: function-exit, tsc: 3315356841494828 }
; CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 37, thread: 84697, kind: function-enter,
; CHECK-NEXT: tsc: 3315356841454762 }
; CHECK-NEXT: - { type: 0, func-id: 1, function: '1', cpu: 37, thread: 84697, kind: function-exit,
; CHECK-NEXT: tsc: 3315356841454802 }
; CHECK-NEXT: - { type: 0, func-id: 3, function: '3', cpu: 37, thread: 84697, kind: function-exit,
; CHECK-NEXT: tsc: 3315356841494828 }
; CHECK-NEXT: ... ; CHECK-NEXT: ...

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@ -4,12 +4,8 @@
; RUN: llvm-xray extract %S/Inputs/elf64-example.bin | FileCheck %s ; RUN: llvm-xray extract %S/Inputs/elf64-example.bin | FileCheck %s
; CHECK: --- ; CHECK: ---
; CHECK-NEXT: - { id: 1, address: 0x000000000041C900, function: 0x000000000041C900, kind: function-enter, ; CHECK-NEXT: - { id: 1, address: 0x000000000041C900, function: 0x000000000041C900, kind: function-enter, always-instrument: true }
; CHECK-NEXT: always-instrument: true } ; CHECK-NEXT: - { id: 1, address: 0x000000000041C912, function: 0x000000000041C900, kind: function-exit, always-instrument: true }
; CHECK-NEXT: - { id: 1, address: 0x000000000041C912, function: 0x000000000041C900, kind: function-exit, ; CHECK-NEXT: - { id: 2, address: 0x000000000041C930, function: 0x000000000041C930, kind: function-enter, always-instrument: true }
; CHECK-NEXT: always-instrument: true } ; CHECK-NEXT: - { id: 2, address: 0x000000000041C946, function: 0x000000000041C930, kind: function-exit, always-instrument: true }
; CHECK-NEXT: - { id: 2, address: 0x000000000041C930, function: 0x000000000041C930, kind: function-enter,
; CHECK-NEXT: always-instrument: true }
; CHECK-NEXT: - { id: 2, address: 0x000000000041C946, function: 0x000000000041C930, kind: function-exit,
; CHECK-NEXT: always-instrument: true }
; CHECK-NEXT: ... ; CHECK-NEXT: ...

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@ -98,7 +98,7 @@ void TraceConverter::exportAsYAML(const Trace &Records, raw_ostream &OS) {
: std::to_string(R.FuncId), : std::to_string(R.FuncId),
R.TSC, R.TId}); R.TSC, R.TId});
} }
Output Out(OS); Output Out(OS, nullptr, 0);
Out << Trace; Out << Trace;
} }

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@ -270,7 +270,7 @@ void InstrumentationMapExtractor::exportAsYAML(raw_ostream &OS) {
YAMLSleds.push_back({FunctionIds[Sled.Function], Sled.Address, YAMLSleds.push_back({FunctionIds[Sled.Function], Sled.Address,
Sled.Function, Sled.Kind, Sled.AlwaysInstrument}); Sled.Function, Sled.Kind, Sled.AlwaysInstrument});
} }
Output Out(OS); Output Out(OS, nullptr, 0);
Out << YAMLSleds; Out << YAMLSleds;
} }