Minor rework to eliminate at91rm9200reg.h dependency and possibly set the
stage for a detach routine (unlikely to be useful, but while I was here..)
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2633dc9382
commit
37620f94c0
@ -43,24 +43,32 @@ __FBSDID("$FreeBSD$");
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#include <machine/resource.h>
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#include <machine/frame.h>
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#include <machine/intr.h>
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#include <arm/at91/at91rm92reg.h>
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#include <arm/at91/at91var.h>
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#include <arm/at91/at91_streg.h>
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static struct at91st_softc {
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bus_space_tag_t sc_st;
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bus_space_handle_t sc_sh;
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device_t sc_dev;
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struct resource * sc_irq_res;
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struct resource * sc_mem_res;
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void * sc_intrhand;
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eventhandler_tag sc_wet; /* watchdog event handler tag */
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} *timer_softc;
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#define RD4(off) \
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bus_space_read_4(timer_softc->sc_st, timer_softc->sc_sh, (off))
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#define WR4(off, val) \
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bus_space_write_4(timer_softc->sc_st, timer_softc->sc_sh, (off), (val))
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static inline uint32_t
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RD4(bus_size_t off)
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{
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return (bus_read_4(timer_softc->sc_mem_res, off));
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}
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static inline void
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WR4(bus_size_t off, uint32_t val)
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{
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bus_write_4(timer_softc->sc_mem_res, off, val);
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}
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static void at91st_watchdog(void *, u_int, int *);
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static void at91st_initclocks(struct at91st_softc *);
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static void at91st_initclocks(device_t , struct at91st_softc *);
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static inline int
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st_crtr(void)
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@ -84,6 +92,19 @@ static struct timecounter at91st_timecounter = {
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1000 /* quality */
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};
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static int
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clock_intr(void *arg)
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{
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struct trapframe *fp = arg;
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/* The interrupt is shared, so we have to make sure it's for us. */
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if (RD4(ST_SR) & ST_SR_PITS) {
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hardclock(TRAPF_USERMODE(fp), TRAPF_PC(fp));
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return (FILTER_HANDLED);
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}
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return (FILTER_STRAY);
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}
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static void
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at91st_delay(int n)
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{
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@ -126,26 +147,68 @@ at91st_probe(device_t dev)
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return (0);
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}
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static void
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at91st_deactivate(device_t dev)
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{
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struct at91st_softc *sc = timer_softc;
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if (sc->sc_intrhand)
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bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand);
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sc->sc_intrhand = NULL;
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if (sc->sc_irq_res)
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bus_release_resource(dev, SYS_RES_IRQ,
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rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
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sc->sc_irq_res = NULL;
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if (sc->sc_mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY,
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rman_get_rid(sc->sc_mem_res), sc->sc_mem_res);
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sc->sc_mem_res = NULL;
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}
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static int
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at91st_activate(device_t dev)
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{
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int rid;
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int err;
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struct at91st_softc *sc = timer_softc;
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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err = ENOMEM;
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if (sc->sc_mem_res == NULL)
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goto out;
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/* Disable all interrupts */
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WR4(ST_IDR, 0xffffffff);
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/* The system timer shares the system irq (1) */
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rid = 0;
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sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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if (sc->sc_irq_res == NULL) {
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printf("Unable to allocate irq for the system timer");
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goto out;
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}
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err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_CLK, clock_intr,
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NULL, NULL, &sc->sc_intrhand);
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out:
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if (err != 0)
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at91st_deactivate(dev);
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return (err);
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}
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static int
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at91st_attach(device_t dev)
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{
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struct at91_softc *sc = device_get_softc(device_get_parent(dev));
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int err;
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timer_softc = device_get_softc(dev);
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timer_softc->sc_st = sc->sc_st;
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timer_softc->sc_dev = dev;
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if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_ST_BASE,
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AT91RM92_ST_SIZE, &timer_softc->sc_sh) != 0)
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panic("couldn't subregion timer registers");
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/*
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* Real time counter increments every clock cycle, need to set before
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* initializing clocks so that DELAY works.
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*/
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WR4(ST_RTMR, 1);
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/* Disable all interrupts */
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WR4(ST_IDR, 0xffffffff);
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/* disable watchdog timer */
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WR4(ST_WDMR, 0);
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err = at91st_activate(dev);
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if (err)
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return err;
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soc_data.delay = at91st_delay;
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soc_data.reset = at91st_cpu_reset; // XXX kinda late to be setting this...
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@ -155,7 +218,7 @@ at91st_attach(device_t dev)
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device_printf(dev,
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"watchdog registered, timeout intervall max. 64 sec\n");
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at91st_initclocks(timer_softc);
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at91st_initclocks(dev, timer_softc);
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return (0);
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}
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@ -210,47 +273,28 @@ at91st_watchdog(void *argp, u_int cmd, int *error)
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WR4(ST_CR, ST_CR_WDRST);
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}
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static int
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clock_intr(void *arg)
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{
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struct trapframe *fp = arg;
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/* The interrupt is shared, so we have to make sure it's for us. */
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if (RD4(ST_SR) & ST_SR_PITS) {
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hardclock(TRAPF_USERMODE(fp), TRAPF_PC(fp));
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return (FILTER_HANDLED);
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}
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return (FILTER_STRAY);
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}
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static void
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at91st_initclocks(struct at91st_softc *sc)
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at91st_initclocks(device_t dev, struct at91st_softc *sc)
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{
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int rel_value;
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struct resource *irq;
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int rid = 0;
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void *ih;
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device_t dev = sc->sc_dev;
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/*
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* Real time counter increments every clock cycle, need to set before
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* initializing clocks so that DELAY works.
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*/
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WR4(ST_RTMR, 1);
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/* disable watchdog timer */
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WR4(ST_WDMR, 0);
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rel_value = 32768 / hz;
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if (rel_value < 1)
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rel_value = 1;
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if (32768 % hz) {
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printf("Cannot get %d Hz clock; using %dHz\n", hz, 32768 / rel_value);
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device_printf(dev, "Cannot get %d Hz clock; using %dHz\n", hz,
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32768 / rel_value);
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hz = 32768 / rel_value;
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tick = 1000000 / hz;
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}
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/* Disable all interrupts. */
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WR4(ST_IDR, 0xffffffff);
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/* The system timer shares the system irq (1) */
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irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 1, 1, 1,
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RF_ACTIVE | RF_SHAREABLE);
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if (!irq)
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panic("Unable to allocate irq for the system timer");
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else
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bus_setup_intr(dev, irq, INTR_TYPE_CLK,
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clock_intr, NULL, NULL, &ih);
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WR4(ST_PIMR, rel_value);
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/* Enable PITS interrupts. */
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