Properly deal with the Ultra series of adapters. We should now understand
the new seeprom format and negotiate up to 20MHz sync if set in SCSI-Select. Reduce the complexity of the timeout code by running it at splhigh(). Fix a bug that caused rescheduled timeouts at 0 clock ticks in the future causing an infinite loop. Obtained from: Timeout bug noticed by David Greenman and wcarchive.
This commit is contained in:
Justin T. Gibbs
parent
fca911ecf3
commit
396614a8b4
@ -24,7 +24,7 @@
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*
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* commenced: Sun Sep 27 18:14:01 PDT 1992
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*
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* $Id: aic7xxx.c,v 1.37 1995/08/23 23:03:17 gibbs Exp $
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* $Id: aic7xxx.c,v 1.38 1995/09/05 23:52:02 gibbs Exp $
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*/
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/*
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* TODO:
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@ -62,7 +62,6 @@ void ahc_loadseq __P((u_long iobase));
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int32 ahc_scsi_cmd();
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timeout_t ahc_timeout;
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void ahc_done __P((int unit, struct scb *scbp));
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void ahc_timeout_done __P((int unit, struct scb *scbp));
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struct scb *ahc_get_scb __P((int unit, int flags));
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void ahc_free_scb();
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void ahc_scb_timeout __P((int unit, struct ahc_data *ahc, struct scb *scb));
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@ -150,6 +149,20 @@ struct scsi_device ahc_dev =
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#define ENAUTOATNP 0x02
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#define SCSIRSTO 0x01
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/*
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* SCSI Transfer Control 0 Register (pp. 3-13).
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* Controls the SCSI module data path.
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*/
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#define SXFRCTL0 0xc01ul
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#define DFON 0x80
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#define DFPEXP 0x40
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#define ULTRAEN 0x20
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#define CLRSTCNT 0x10
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#define SPIOEN 0x80
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#define SCAMEN 0x40
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#define CLRCHN 0x20
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/* UNUSED 0x01 */
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/*
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* SCSI Transfer Control 1 Register (pp. 3-14,15).
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* Controls the SCSI module data path.
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@ -641,7 +654,8 @@ struct seeprom_config {
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/*
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* Host Adapter Control Bits
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*/
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/* UNUSED 0x0003 */
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/* UNUSED 0x0001 */
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#define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */
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#define CFSTERM 0x0004 /* SCSI low byte termination (non-wide cards) */
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#define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */
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#define CFSPARITY 0x0010 /* SCSI parity */
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@ -757,17 +771,23 @@ static struct {
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*/
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static struct {
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short sxfr;
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/* Rates in Ultra mode have bit 8 of sxfr set */
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#define ULTRA_SXFR 0x100
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short period; /* in ns */
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char *rate;
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} ahc_syncrates[] = {
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{ 0x00, 100, "10.0" },
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{ 0x10, 125, "8.0" },
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{ 0x20, 150, "6.67" },
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{ 0x30, 175, "5.7" },
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{ 0x40, 200, "5.0" },
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{ 0x50, 225, "4.4" },
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{ 0x60, 250, "4.0" },
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{ 0x70, 275, "3.6" }
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{ 0x100, 50, "20.0" },
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{ 0x110, 62, "16.0" },
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{ 0x120, 75, "13.4" },
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{ 0x140, 100, "10.0" },
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{ 0x000, 100, "10.0" },
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{ 0x010, 125, "8.0" },
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{ 0x020, 150, "6.67" },
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{ 0x030, 175, "5.7" },
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{ 0x040, 200, "5.0" },
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{ 0x050, 225, "4.4" },
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{ 0x060, 250, "4.0" },
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{ 0x070, 275, "3.6" }
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};
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static int ahc_num_syncrates =
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@ -842,10 +862,37 @@ void ahc_scsirate(scsirate, period, offset, unit, target )
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int unit, target;
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{
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int i;
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struct ahc_data *ahc = ahcdata[unit];
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for (i = 0; i < ahc_num_syncrates; i++) {
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if ((ahc_syncrates[i].period - period) >= 0) {
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/*
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* Watch out for Ultra speeds when ultra is not
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* enabled and vice-versa.
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*/
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if (ahc->type & AHC_ULTRA) {
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if (!(ahc_syncrates[i].sxfr & ULTRA_SXFR)) {
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printf("ahc%d: target %d requests "
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"%sMB/s transfers, but adapter "
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"in Ultra mode can only sync at "
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"10MB/s or above\n", unit,
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target, ahc_syncrates[i].rate);
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break; /* Use Async */
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}
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}
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else {
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if (ahc_syncrates[i].sxfr & ULTRA_SXFR) {
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/*
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* This should only happen if the
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* drive is the first to negotiate
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* and chooses a high rate. We'll
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* just move down the table util
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* we hit a non ultra speed.
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*/
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continue;
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}
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}
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*scsirate = (ahc_syncrates[i].sxfr) | (offset & 0x0f);
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if(bootverbose) {
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printf("ahc%d: target %d synchronous at %sMB/s,"
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@ -1816,7 +1863,10 @@ ahc_init(unit)
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}
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case AHC_AIC7850:
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case AHC_AIC7870:
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case AHC_AIC7880:
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case AHC_394U:
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case AHC_394:
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case AHC_294U:
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case AHC_294:
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host_id = 0x07; /* default to SCSI ID 7 for 7850 */
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if (ahc->type & AHC_AIC7870) {
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@ -1877,7 +1927,15 @@ ahc_init(unit)
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break;
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default:
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};
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if(ahc->type & AHC_ULTRA) {
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printf("Ultra ");
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if(have_seeprom) {
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/* Should we enable Ultra mode? */
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if(!(sc.adapter_control & CFULTRAEN))
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/* Treat it like a normal card */
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ahc->type &= ~AHC_ULTRA;
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}
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}
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/* Determine channel configuration and who we are on the scsi bus. */
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switch ( (sblkctl = inb(SBLKCTL + iobase) & 0x0a) ) {
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case 0:
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@ -2011,7 +2069,7 @@ ahc_init(unit)
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}
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}
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/* Set the SCSI Id, SXFRCTL1, and SIMODE1, for both channels */
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/* Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels*/
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if( ahc->type & AHC_TWIN)
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{
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/*
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@ -2022,6 +2080,8 @@ ahc_init(unit)
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scsi_conf = inb(HA_SCSICONF + 1 + iobase) & (ENSPCHK|STIMESEL);
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outb(SXFRCTL1 + iobase, scsi_conf|ENSTIMER|ACTNEGEN|STPWEN);
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outb(SIMODE1 + iobase, ENSELTIMO|ENSCSIPERR);
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if(ahc->type & AHC_ULTRA)
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outb(SXFRCTL0 + iobase, ULTRAEN);
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/* Reset the bus */
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outb(SCSISEQ + iobase, SCSIRSTO);
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@ -2035,6 +2095,8 @@ ahc_init(unit)
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scsi_conf = inb(HA_SCSICONF + iobase) & (ENSPCHK|STIMESEL);
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outb(SXFRCTL1 + iobase, scsi_conf|ENSTIMER|ACTNEGEN|STPWEN);
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outb(SIMODE1 + iobase, ENSELTIMO|ENSCSIPERR);
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if(ahc->type & AHC_ULTRA)
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outb(SXFRCTL0 + iobase, ULTRAEN);
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/* Reset the bus */
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outb(SCSISEQ + iobase, SCSIRSTO);
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@ -2629,8 +2691,7 @@ ahc_scb_timeout(unit, ahc, scb)
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outsb(SCBARRAY+iobase,scb,SCB_DOWN_SIZE);
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outb(SCBCNT + iobase, 0);
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ahc_add_waiting_scb(iobase, scb, list_second);
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timeout(ahc_timeout, (caddr_t)scb,
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(2 * hz) / 1000);
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timeout(ahc_timeout, (caddr_t)scb, (2 * hz));
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#ifdef AHC_DEBUG
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if(ahc_debug & AHC_SHOWABORTS) {
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sc_print_addr(scb->xs->sc_link);
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@ -2669,8 +2730,7 @@ ahc_scb_timeout(unit, ahc, scb)
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active_scbp->flags |= SCB_DEVICE_RESET|SCB_ABORTED;
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if(active_scbp != scb)
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untimeout(ahc_timeout, (caddr_t)active_scbp);
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timeout(ahc_timeout, (caddr_t)active_scbp,
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(2 * hz) / 1000);
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timeout(ahc_timeout, (caddr_t)active_scbp, (2 * hz));
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outb(HA_FLAGS + iobase, flags | ACTIVE_MSG);
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outb(HA_MSG_LEN + iobase, 1);
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outb(HA_MSG_START + iobase, MSG_BUS_DEVICE_RESET);
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@ -2712,8 +2772,14 @@ ahc_timeout(void *arg1)
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struct scb *scb = (struct scb *)arg1;
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int unit;
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struct ahc_data *ahc;
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int s, h;
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s = splbio();
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int s;
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s = splhigh();
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if (!(scb->flags & SCB_ACTIVE)) {
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/* Previous timeout took care of me already */
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splx(s);
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return;
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}
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unit = scb->xs->sc_link->adapter_unit;
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ahc = ahcdata[unit];
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@ -2722,45 +2788,26 @@ ahc_timeout(void *arg1)
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,scb->xs->sc_link->lun
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,scb->xs->sc_link->device->name
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,scb->xs->sc_link->dev_unit);
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h = splhigh();
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if(ahc->in_timeout){
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scb->next = ahc->timedout_scb;
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ahc->timedout_scb = scb;
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splx(h);
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splx(s);
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return;
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}
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else
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ahc->in_timeout = 1;
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splx(h);
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while(scb) {
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#ifdef SCSIDEBUG
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show_scsi_cmd(scb->xs);
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show_scsi_cmd(scb->xs);
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#endif
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#ifdef AHC_DEBUG
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if (ahc_debug & AHC_SHOWSCBS)
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ahc_print_active_scb(ahc);
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if (ahc_debug & AHC_SHOWSCBS)
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ahc_print_active_scb(ahc);
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#endif /*AHC_DEBUG */
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/*
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* If it's immediate, don't try to abort it
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*/
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if (scb->flags & SCB_IMMED) {
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scb->xs->retries = 0; /* I MEAN IT ! */
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ahc_timeout_done(unit, scb);
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}
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else {
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/* abort the operation that has timed out */
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ahc_scb_timeout( unit, ahc, scb );
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}
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h = splhigh();
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scb = ahc->timedout_scb;
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if(scb)
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ahc->timedout_scb = scb->next;
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splx(h);
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/*
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* If it's immediate, don't try to abort it
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*/
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if (scb->flags & SCB_IMMED) {
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scb->xs->retries = 0; /* I MEAN IT ! */
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ahc_done(unit, scb);
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}
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ahc->in_timeout = 0;
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splx(s);
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else {
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/* abort the operation that has timed out */
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ahc_scb_timeout( unit, ahc, scb );
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}
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splx(s);
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}
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@ -2804,7 +2851,7 @@ ahc_reset_device(unit, ahc, target, channel, timedout_scb, xs_error)
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scbp->xs->error |= xs_error;
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if(scbp->position != timedout_scb)
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untimeout(ahc_timeout, (caddr_t)scbp);
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ahc_timeout_done (unit, scbp);
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ahc_done (unit, scbp);
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outb(SCBPTR + iobase, scbp->position);
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outb(SCBARRAY + iobase, SCB_NEEDDMA);
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i--;
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@ -2861,7 +2908,7 @@ ahc_reset_device(unit, ahc, target, channel, timedout_scb, xs_error)
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scbp->xs->error |= xs_error;
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if(scbp->position != timedout_scb)
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untimeout(ahc_timeout, (caddr_t)scbp);
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ahc_timeout_done (unit, scbp);
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ahc_done (unit, scbp);
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found++;
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}
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}
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@ -2924,7 +2971,7 @@ ahc_abort_wscb (unit, scbp, prev, iobase, timedout_scb, xs_error)
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scbp->xs->error |= xs_error;
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if(scbp->position != timedout_scb)
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untimeout(ahc_timeout, (caddr_t)scbp);
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ahc_timeout_done (unit, scbp);
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ahc_done (unit, scbp);
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return next;
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}
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@ -3053,29 +3100,3 @@ ahc_match_scb (scb, target, channel)
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else
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return ((chan == channel) && (targ == target));
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}
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void
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ahc_timeout_done (unit, scbp)
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int unit;
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struct scb *scbp;
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{
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struct ahc_data *ahc = ahcdata[unit];
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struct scb **prev_scb;
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struct scb *cur_scb;
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int h;
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h = splhigh();
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prev_scb = &ahc->timedout_scb;
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cur_scb = ahc->timedout_scb;
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while(cur_scb) {
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if(cur_scb == scbp) {
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*prev_scb = cur_scb->next;
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break;
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}
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prev_scb = &cur_scb->next;
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cur_scb = cur_scb->next;
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}
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splx(h);
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ahc_done(unit, scbp);
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}
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@ -20,7 +20,7 @@
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* 4. Modifications may be freely made to this file if the above conditions
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* are met.
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*
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* $Id: aic7xxx.h,v 1.12 1995/08/05 17:32:55 gibbs Exp $
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* $Id: aic7xxx.h,v 1.13 1995/09/05 23:52:03 gibbs Exp $
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*/
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#ifndef _AIC7XXX_H_
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@ -51,16 +51,20 @@ struct ahc_dma_seg {
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typedef enum {
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AHC_NONE = 0x000,
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AHC_ULTRA = 0x001, /* Supports 20MHz Transfers */
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AHC_WIDE = 0x002, /* Wide Channel */
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AHC_TWIN = 0x008, /* Twin Channel */
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AHC_AIC7770 = 0x010,
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AHC_AIC7850 = 0x020,
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AHC_AIC7870 = 0x040,
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AHC_AIC7880 = 0x041,
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AHC_AIC78X0 = 0x060, /* PCI Based Controller */
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AHC_274 = 0x110, /* EISA Based Controller */
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AHC_284 = 0x210, /* VL/ISA Based Controller */
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AHC_294 = 0x440, /* PCI Based Controller */
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AHC_394 = 0x840 /* Twin Channel PCI Controller */
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AHC_294U = 0x441, /* ULTRA PCI Based Controller */
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AHC_394 = 0x840, /* Twin Channel PCI Controller */
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AHC_394U = 0x841, /* Twin, ULTRA Channel PCI Controller */
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}ahc_type;
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typedef enum {
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@ -147,8 +151,6 @@ struct ahc_data {
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u_long baseport;
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struct scb *scbarray[AHC_SCB_MAX]; /* Mirror boards scbarray */
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struct scb *free_scb;
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struct scb *timedout_scb;
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int in_timeout;
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int our_id; /* our scsi id */
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int our_id_b; /* B channel scsi id */
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int vect;
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Loading…
Reference in New Issue
Block a user