From 39fe39bca9259ff70a9cd1d16e5b2f0ae079b4cd Mon Sep 17 00:00:00 2001 From: Jared McNeill Date: Tue, 26 Apr 2016 12:36:12 +0000 Subject: [PATCH] Fix calculation of LCD CH1 SCLK1 output frequency when SCLK2 /2 is used as source. PR: 208680 Reported by: David Binderman --- sys/arm/allwinner/clk/aw_lcdclk.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sys/arm/allwinner/clk/aw_lcdclk.c b/sys/arm/allwinner/clk/aw_lcdclk.c index bebee0139683..1de6a493b814 100644 --- a/sys/arm/allwinner/clk/aw_lcdclk.c +++ b/sys/arm/allwinner/clk/aw_lcdclk.c @@ -266,7 +266,7 @@ static int aw_lcdclk_recalc_freq(struct clknode *clk, uint64_t *freq) { struct aw_lcdclk_softc *sc; - uint32_t val, m; + uint32_t val, m, src_sel; sc = clknode_get_softc(clk); @@ -281,7 +281,8 @@ aw_lcdclk_recalc_freq(struct clknode *clk, uint64_t *freq) *freq = *freq / m; if (sc->id == CLK_IDX_CH1_SCLK1) { - if ((val & CH1_SCLK1_SEL) == CH1_SCLK1_SEL_SCLK2_DIV2) + src_sel = (val & CH1_SCLK1_SEL) >> CH1_SCLK1_SEL_SHIFT; + if (src_sel == CH1_SCLK1_SEL_SCLK2_DIV2) *freq /= 2; }