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Add the 'ciss' driver, which supports the Compaq SmartRAID 5* family of

Browse Source 
RAID controllers (5300, 532, 5i, etc.)

Thanks to Compaq and Yahoo! for support during the development of this
driver.

MFC after:	1 week
This commit is contained in:
Mike Smith 2001-11-27 23:08:37 +00:00
parent 0a79e75e5f
commit 3a31b7eb32
9 changed files with 4643 additions and 0 deletions
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7
sys/conf/NOTES
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@ -1508,6 +1508,13 @@ options DPT_LOST_IRQ
options DPT_RESET_HBA
options DPT_ALLOW_MEMIO
#
# Compaq "CISS" RAID controllers (SmartRAID 5* series)
# These controllers have a SCSI-like interface, and require the
# CAM infrastructure.
#
device ciss
#
# Mylex AcceleRAID and eXtremeRAID controllers with v6 and later
# firmware. These controllers have a SCSI-like interface, and require

1
sys/conf/files
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@ -288,6 +288,7 @@ dev/buslogic/bt_pci.c optional bt pci
dev/cardbus/cardbus.c optional cardbus
dev/cardbus/cardbus_cis.c optional cardbus
dev/ccd/ccd.c optional ccd
dev/ciss/ciss.c optional ciss
dev/cnw/if_cnw.c optional cnw card
#dev/cnw/if_cnw.c optional cnw pccard
dev/cs/if_cs.c optional cs

3368
sys/dev/ciss/ciss.c Normal file
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203
sys/dev/ciss/cissio.h Normal file
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@ -0,0 +1,203 @@
/*-
* Copyright (c) 2001 Michael Smith
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* Driver ioctl interface.
*
* Note that this interface is API-compatible with the Linux implementation
* except as noted, and thus this header bears a striking resemblance to
* the Linux driver's cciss_ioctl.h.
*
*/
#include <sys/ioccom.h>
#pragma pack(1)
typedef struct
{
u_int8_t bus;
u_int8_t dev_fn;
u_int32_t board_id;
} cciss_pci_info_struct;
typedef struct
{
u_int32_t delay;
u_int32_t count;
} cciss_coalint_struct;
typedef char NodeName_type[16];
typedef u_int32_t Heartbeat_type;
#define CISS_PARSCSIU2 0x0001
#define CISS_PARCSCIU3 0x0002
#define CISS_FIBRE1G 0x0100
#define CISS_FIBRE2G 0x0200
typedef u_int32_t BusTypes_type;
typedef char FirmwareVer_type[4];
typedef u_int32_t DriverVer_type;
/* passthrough command definitions */
#define SENSEINFOBYTES 32
#define CISS_MAX_LUN 16
#define LEVEL2LUN 1
#define LEVEL3LUN 0
/* command status value */
#define CMD_SUCCESS 0x0000
#define CMD_TARGET_STATUS 0x0001
#define CMD_DATA_UNDERRUN 0x0002
#define CMD_DATA_OVERRUN 0x0003
#define CMD_INVALID 0x0004
#define CMD_PROTOCOL_ERR 0x0005
#define CMD_HARDWARE_ERR 0x0006
#define CMD_CONNECTION_LOST 0x0007
#define CMD_ABORTED 0x0008
#define CMD_ABORT_FAILED 0x0009
#define CMD_UNSOLICITED_ABORT 0x000A
#define CMD_TIMEOUT 0x000B
#define CMD_UNABORTABLE 0x000C
/* transfer direction */
#define XFER_NONE 0x00
#define XFER_WRITE 0x01
#define XFER_READ 0x02
#define XFER_RSVD 0x03
/* task attribute */
#define ATTR_UNTAGGED 0x00
#define ATTR_SIMPLE 0x04
#define ATTR_HEADOFQUEUE 0x05
#define ATTR_ORDERED 0x06
#define ATTR_ACA 0x07
/* CDB type */
#define TYPE_CMD 0x00
#define TYPE_MSG 0x01
/* command list structure */
typedef union {
struct {
u_int8_t Dev;
u_int8_t Bus:6;
u_int8_t Mode:2;
} PeripDev __attribute__ ((__packed__));
struct {
u_int8_t DevLSB;
u_int8_t DevMSB:6;
u_int8_t Mode:2;
} LogDev __attribute__ ((__packed__));
struct {
u_int8_t Dev:5;
u_int8_t Bus:3;
u_int8_t Targ:6;
u_int8_t Mode:2;
} LogUnit __attribute__ ((__packed__));
} SCSI3Addr_struct;
typedef struct {
u_int32_t TargetId:24;
u_int32_t Bus:6;
u_int32_t Mode:2;
SCSI3Addr_struct Target[2];
} PhysDevAddr_struct __attribute__ ((__packed__));
typedef struct {
u_int32_t VolId:30;
u_int32_t Mode:2;
u_int8_t reserved[4];
} LogDevAddr_struct __attribute__ ((__packed__));
typedef union {
u_int8_t LunAddrBytes[8];
SCSI3Addr_struct SCSI3Lun[4];
PhysDevAddr_struct PhysDev;
LogDevAddr_struct LogDev;
} LUNAddr_struct __attribute__ ((__packed__));
typedef struct {
u_int8_t CDBLen;
struct {
u_int8_t Type:3;
u_int8_t Attribute:3;
u_int8_t Direction:2;
} Type __attribute__ ((__packed__));
u_int16_t Timeout;
u_int8_t CDB[16];
} RequestBlock_struct __attribute__ ((__packed__));
typedef union {
struct {
u_int8_t Reserved[3];
u_int8_t Type;
u_int32_t ErrorInfo;
} Common_Info __attribute__ ((__packed__));
struct {
u_int8_t Reserved[2];
u_int8_t offense_size;
u_int8_t offense_num;
u_int32_t offense_value;
} Invalid_Cmd __attribute__ ((__packed__));
} MoreErrInfo_struct __attribute__ ((__packed__));
typedef struct {
u_int8_t ScsiStatus;
u_int8_t SenseLen;
u_int16_t CommandStatus;
u_int32_t ResidualCnt;
MoreErrInfo_struct MoreErrInfo;
u_int8_t SenseInfo[SENSEINFOBYTES];
} ErrorInfo_struct __attribute__ ((__packed__));
typedef struct {
LUNAddr_struct LUN_info; /* 8 */
RequestBlock_struct Request; /* 20 */
ErrorInfo_struct error_info; /* 48 */
u_int16_t buf_size; /* 2 */
u_int8_t *buf; /* 4 */
} IOCTL_Command_struct __attribute__ ((__packed__));
/*
* Note that we'd normally pass the struct in directly, but
* this code is trying to be compatible with other drivers.
*/
#define CCISS_GETPCIINFO _IOR ('C', 200, cciss_pci_info_struct)
#define CCISS_GETINTINFO _IOR ('C', 201, cciss_coalint_struct)
#define CCISS_SETINTINFO _IOW ('C', 202, cciss_coalint_struct)
#define CCISS_GETNODENAME _IOR ('C', 203, NodeName_type)
#define CCISS_SETNODENAME _IOW ('C', 204, NodeName_type)
#define CCISS_GETHEARTBEAT _IOR ('C', 205, Heartbeat_type)
#define CCISS_GETBUSTYPES _IOR ('C', 206, BusTypes_type)
#define CCISS_GETFIRMVER _IOR ('C', 207, FirmwareVer_type)
#define CCISS_GETDRIVERVER _IOR ('C', 208, DriverVer_type)
#define CCISS_REVALIDVOLS _IO ('C', 209)
#define CCISS_PASSTHRU _IOWR ('C', 210, IOCTL_Command_struct)
#pragma pack()

670
sys/dev/ciss/cissreg.h Normal file
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@ -0,0 +1,670 @@
/*-
* Copyright (c) 2001 Michael Smith
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* Structure and I/O definitions for the Command Interface for SCSI-3 Support.
*
* Data in command CDBs are in big-endian format. All other data is little-endian.
* This header only supports little-endian hosts at this time.
*/
union ciss_device_address
{
struct /* MODE_PERIPHERAL and MODE_MASK_PERIPHERAL */
{
u_int32_t target:24; /* SCSI target */
u_int32_t bus:6; /* SCSI bus */
u_int32_t mode:2; /* CISS_HDR_ADDRESS_MODE_* */
u_int32_t extra_address; /* SCSI-3 level-2 and level-3 address bytes */
} physical;
struct /* MODE_LOGICAL */
{
u_int32_t lun:30; /* logical device ID */
u_int32_t mode:2; /* CISS_HDR_ADDRESS_MODE_LOGICAL */
u_int32_t :32; /* reserved */
} logical;
struct
{
u_int32_t :30;
u_int32_t mode:2;
u_int32_t :32;
} mode;
};
#define CISS_HDR_ADDRESS_MODE_PERIPHERAL 0x0
#define CISS_HDR_ADDRESS_MODE_LOGICAL 0x1
#define CISS_HDR_ADDRESS_MODE_MASK_PERIPHERAL 0x3
struct ciss_header
{
u_int8_t :8; /* reserved */
u_int8_t sg_in_list; /* SG's in the command structure */
u_int16_t sg_total; /* total count of SGs for this command */
u_int32_t host_tag; /* host identifier, bits 0&1 must be clear */
#define CISS_HDR_HOST_TAG_ERROR (1<<1)
u_int32_t host_tag_zeroes; /* tag is 64 bits, but interface only supports 32 */
union ciss_device_address address;
} __attribute__ ((packed));
struct ciss_cdb
{
u_int8_t cdb_length; /* valid CDB bytes */
u_int8_t type:3;
#define CISS_CDB_TYPE_COMMAND 0
#define CISS_CDB_TYPE_MESSAGE 1
u_int8_t attribute:3;
#define CISS_CDB_ATTRIBUTE_UNTAGGED 0
#define CISS_CDB_ATTRIBUTE_SIMPLE 4
#define CISS_CDB_ATTRIBUTE_HEAD_OF_QUEUE 5
#define CISS_CDB_ATTRIBUTE_ORDERED 6
#define CISS_CDB_ATTRIBUTE_AUTO_CONTINGENT 7
u_int8_t direction:2;
#define CISS_CDB_DIRECTION_NONE 0
#define CISS_CDB_DIRECTION_READ 1
#define CISS_CDB_DIRECTION_WRITE 2
u_int16_t timeout; /* seconds */
#define CISS_CDB_BUFFER_SIZE 16
u_int8_t cdb[CISS_CDB_BUFFER_SIZE];
} __attribute__ ((packed));
struct ciss_error_info_pointer
{
u_int64_t error_info_address; /* points to ciss_error_info structure */
u_int32_t error_info_length;
} __attribute__ ((packed));
struct ciss_error_info
{
u_int8_t scsi_status;
#define CISS_SCSI_STATUS_GOOD 0x00 /* these are scsi-standard values */
#define CISS_SCSI_STATUS_CHECK_CONDITION 0x02
#define CISS_SCSI_STATUS_CONDITION_MET 0x04
#define CISS_SCSI_STATUS_BUSY 0x08
#define CISS_SCSI_STATUS_INDETERMINATE 0x10
#define CISS_SCSI_STATUS_INDETERMINATE_CM 0x14
#define CISS_SCSI_STATUS_RESERVATION_CONFLICT 0x18
#define CISS_SCSI_STATUS_COMMAND_TERMINATED 0x22
#define CISS_SCSI_STATUS_QUEUE_FULL 0x28
#define CISS_SCSI_STATUS_ACA_ACTIVE 0x30
u_int8_t sense_length;
u_int16_t command_status;
#define CISS_CMD_STATUS_SUCCESS 0
#define CISS_CMD_STATUS_TARGET_STATUS 1
#define CISS_CMD_STATUS_DATA_UNDERRUN 2
#define CISS_CMD_STATUS_DATA_OVERRUN 3
#define CISS_CMD_STATUS_INVALID_COMMAND 4
#define CISS_CMD_STATUS_PROTOCOL_ERROR 5
#define CISS_CMD_STATUS_HARDWARE_ERROR 6
#define CISS_CMD_STATUS_CONNECTION_LOST 7
#define CISS_CMD_STATUS_ABORTED 8
#define CISS_CMD_STATUS_ABORT_FAILED 9
#define CISS_CMD_STATUS_UNSOLICITED_ABORT 10
#define CISS_CMD_STATUS_TIMEOUT 11
#define CISS_CMD_STATUS_UNABORTABLE 12
u_int32_t residual_count;
union {
struct {
u_int8_t res1[3];
u_int8_t type;
u_int32_t error_info;
} common_info __attribute__ ((packed));
struct {
u_int8_t res1[2];
u_int8_t offense_size;
u_int8_t offense_offset;
u_int32_t offense_value;
} invalid_command __attribute__ ((packed));
} additional_error_info;
u_int8_t sense_info[0];
} __attribute__ ((packed));
struct ciss_sg_entry
{
u_int64_t address;
#define CISS_SG_ADDRESS_BITBUCKET (~(u_int64_t)0)
u_int32_t length;
u_int32_t :31;
u_int32_t extension:1; /* address points to another s/g chain */
} __attribute__ ((packed));
struct ciss_command
{
struct ciss_header header;
struct ciss_cdb cdb;
struct ciss_error_info_pointer error_info;
struct ciss_sg_entry sg[0];
} __attribute__ ((packed));
#define CISS_OPCODE_REPORT_LOGICAL_LUNS 0xc2
#define CISS_OPCODE_REPORT_PHYSICAL_LUNS 0xc3
struct ciss_lun_report
{
u_int32_t list_size; /* big-endian */
u_int32_t :32;
union ciss_device_address lun[0];
} __attribute__ ((packed));
struct ciss_report_cdb
{
u_int8_t opcode;
u_int8_t reserved[5];
u_int32_t length; /* big-endian */
u_int8_t :8;
u_int8_t control;
} __attribute__ ((packed));
/*
* Note that it's not clear whether we have to set the detail field to
* the tag of the command to be aborted, or the tag field in the command itself;
* documentation conflicts on this.
*/
#define CISS_OPCODE_MESSAGE_ABORT 0x00
#define CISS_MESSAGE_ABORT_TASK 0x00
#define CISS_MESSAGE_ABORT_TASK_SET 0x01
#define CISS_MESSAGE_ABORT_CLEAR_ACA 0x02
#define CISS_MESSAGE_ABORT_CLEAR_TASK_SET 0x03
#define CISS_OPCODE_MESSAGE_RESET 0x01
#define CISS_MESSAGE_RESET_CONTROLLER 0x00
#define CISS_MESSAGE_RESET_BUS 0x01
#define CISS_MESSAGE_RESET_TARGET 0x03
#define CISS_MESSAGE_RESET_LOGICAL_UNIT 0x04
#define CISS_OPCODE_MESSAGE_SCAN 0x02
#define CISS_MESSAGE_SCAN_CONTROLLER 0x00
#define CISS_MESSAGE_SCAN_BUS 0x01
#define CISS_MESSAGE_SCAN_TARGET 0x03
#define CISS_MESSAGE_SCAN_LOGICAL_UNIT 0x04
#define CISS_OPCODE_MESSAGE_NOP 0x03
struct ciss_message_cdb
{
u_int8_t opcode;
u_int8_t type;
u_int16_t :16;
u_int32_t abort_tag; /* XXX endianness? */
u_int8_t reserved[8];
} __attribute__ ((packed));
/*
* CISS vendor-specific commands/messages.
*
* Note that while messages and vendor-specific commands are
* differentiated, they are handled in basically the same way and can
* be considered to be basically the same thing, as long as the cdb
* type field is set correctly.
*/
#define CISS_OPCODE_READ 0xc0
#define CISS_OPCODE_WRITE 0xc1
#define CISS_COMMAND_NOTIFY_ON_EVENT 0xd0
#define CISS_COMMAND_ABORT_NOTIFY 0xd1
struct ciss_notify_cdb
{
u_int8_t opcode;
u_int8_t command;
u_int8_t res1[2];
u_int16_t timeout; /* seconds, little-endian */
u_int8_t res2; /* reserved */
u_int8_t synchronous:1; /* return immediately */
u_int8_t ordered:1; /* return events in recorded order */
u_int8_t seek_to_oldest:1; /* reset read counter to oldest event */
u_int8_t new_only:1; /* ignore any queued events */
u_int8_t :4;
u_int32_t length; /* must be 512, little-endian */
#define CISS_NOTIFY_DATA_SIZE 512
u_int8_t control;
} __attribute__ ((packed));
#define CISS_NOTIFY_NOTIFIER 0
#define CISS_NOTIFY_NOTIFIER_STATUS 0
#define CISS_NOTIFY_NOTIFIER_PROTOCOL 1
#define CISS_NOTIFY_HOTPLUG 1
#define CISS_NOTIFY_HOTPLUG_PHYSICAL 0
#define CISS_NOTIFY_HOTPLUG_POWERSUPPLY 1
#define CISS_NOTIFY_HOTPLUG_FAN 2
#define CISS_NOTIFY_HOTPLUG_POWER 3
#define CISS_NOTIFY_HOTPLUG_REDUNDANT 4
#define CISS_NOTIFY_HARDWARE 2
#define CISS_NOTIFY_HARDWARE_CABLES 0
#define CISS_NOTIFY_HARDWARE_MEMORY 1
#define CISS_NOTIFY_HARDWARE_FAN 2
#define CISS_NOTIFY_HARDWARE_VRM 3
#define CISS_NOTIFY_ENVIRONMENT 3
#define CISS_NOTIFY_ENVIRONMENT_TEMPERATURE 0
#define CISS_NOTIFY_ENVIRONMENT_POWERSUPPLY 1
#define CISS_NOTIFY_ENVIRONMENT_CHASSIS 2
#define CISS_NOTIFY_ENVIRONMENT_POWER 3
#define CISS_NOTIFY_PHYSICAL 4
#define CISS_NOTIFY_PHYSICAL_STATE 0
#define CISS_NOTIFY_LOGICAL 5
#define CISS_NOTIFY_LOGICAL_STATUS 0
#define CISS_NOTIFY_LOGICAL_ERROR 1
#define CISS_NOTIFY_LOGICAL_SURFACE 2
#define CISS_NOTIFY_REDUNDANT 6
#define CISS_NOTIFY_REDUNDANT_STATUS 0
#define CISS_NOTIFY_CISS 8
#define CISS_NOTIFY_CISS_REDUNDANT_CHANGE 0
#define CISS_NOTIFY_CISS_PATH_STATUS 1
#define CISS_NOTIFY_CISS_HARDWARE_ERROR 2
#define CISS_NOTIFY_CISS_LOGICAL 3
struct ciss_notify_drive
{
u_int16_t physical_drive_number;
u_int8_t configured_drive_flag;
u_int8_t spare_drive_flag;
u_int8_t big_physical_drive_number;
u_int8_t enclosure_bay_number;
} __attribute__ ((packed));
struct ciss_notify_locator
{
u_int16_t port;
u_int16_t id;
u_int16_t box;
} __attribute__ ((packed));
struct ciss_notify_redundant_controller
{
u_int16_t slot;
} __attribute__ ((packed));
struct ciss_notify_logical_status
{
u_int16_t logical_drive;
u_int8_t previous_state;
u_int8_t new_state;
u_int8_t spare_state;
} __attribute__ ((packed));
struct ciss_notify_rebuild_aborted
{
u_int16_t logical_drive;
u_int8_t replacement_drive;
u_int8_t error_drive;
u_int8_t big_replacement_drive;
u_int8_t big_error_drive;
} __attribute__ ((packed));
struct ciss_notify_io_error
{
u_int16_t logical_drive;
u_int32_t lba;
u_int16_t block_count;
u_int8_t command;
u_int8_t failure_bus;
u_int8_t failure_drive;
u_int64_t big_lba;
} __attribute__ ((packed));
struct ciss_notify_consistency_completed
{
u_int16_t logical_drive;
} __attribute__ ((packed));
struct ciss_notify
{
u_int32_t timestamp; /* seconds since controller power-on */
u_int16_t class;
u_int16_t subclass;
u_int16_t detail;
union
{
struct ciss_notify_drive drive;
struct ciss_notify_locator location;
struct ciss_notify_redundant_controller redundant_controller;
struct ciss_notify_logical_status logical_status;
struct ciss_notify_rebuild_aborted rebuild_aborted;
struct ciss_notify_io_error io_error;
struct ciss_notify_consistency_completed consistency_completed;
u_int8_t data[64];
} data;
char message[80];
u_int32_t tag;
u_int16_t date;
u_int16_t year;
u_int32_t time;
u_int16_t pre_power_up_time;
union ciss_device_address device;
/* XXX pads to 512 bytes */
} __attribute__ ((packed));
/*
* CISS config table, which describes the controller's
* supported interface(s) and capabilities.
*
* This is mapped directly via PCI.
*/
struct ciss_config_table
{
char signature[4]; /* "CISS" */
u_int32_t valence;
#define CISS_MIN_VALENCE 1 /* only value currently supported */
#define CISS_MAX_VALENCE 1
u_int32_t supported_methods;
#define CISS_TRANSPORT_METHOD_READY (1<<0)
#define CISS_TRANSPORT_METHOD_SIMPLE (1<<1)
u_int32_t active_method;
u_int32_t requested_method;
u_int32_t command_physlimit;
u_int32_t interrupt_coalesce_delay;
u_int32_t interrupt_coalesce_count;
u_int32_t max_outstanding_commands;
u_int32_t bus_types;
#define CISS_TRANSPORT_BUS_TYPE_ULTRA2 (1<<0)
#define CISS_TRANSPORT_BUS_TYPE_ULTRA3 (1<<1)
#define CISS_TRANSPORT_BUS_TYPE_FIBRE1 (1<<8)
#define CISS_TRANSPORT_BUS_TYPE_FIBRE2 (1<<9)
u_int32_t host_driver;
#define CISS_DRIVER_SUPPORT_UNIT_ATTENTION (1<<0)
#define CISS_DRIVER_QUICK_INIT (1<<1)
#define CISS_DRIVER_INTERRUPT_ON_LOCKUP (1<<2)
#define CISS_DRIVER_SUPPORT_MIXED_Q_TAGS (1<<3)
#define CISS_DRIVER_HOST_IS_ALPHA (1<<4)
char server_name[16];
u_int32_t heartbeat;
} __attribute__ ((packed));
/*
* In a flagrant violation of what CISS seems to be meant to be about,
* Compaq recycle a goodly portion of their previous generation's
* command set (and all the legacy baggage related to a design
* originally aimed at narrow SCSI) through the Array Controller Read
* and Array Controller Write interface.
*
* Command ID values here can be looked up for in the
* publically-available documentation for the older controllers; note
* that the command layout is necessarily different to fit within the
* CDB.
*/
#define CISS_ARRAY_CONTROLLER_READ 0x26
#define CISS_ARRAY_CONTROLLER_WRITE 0x27
#define CISS_BMIC_ID_LDRIVE 0x10
#define CISS_BMIC_ID_CTLR 0x11
#define CISS_BMIC_ID_LSTATUS 0x12
#define CISS_BMIC_ID_PDRIVE 0x15
#define CISS_BMIC_BLINK_PDRIVE 0x16
#define CISS_BMIC_SENSE_BLINK_PDRIVE 0x17
#define CISS_BMIC_FLUSH_CACHE 0xc2
#define CISS_BMIC_ACCEPT_MEDIA 0xe0
/*
* When numbering drives, the original design assumed that
* drives 0-7 are on the first SCSI bus, 8-15 on the second,
* and so forth. In order to handle modern SCSI configurations,
* the MSB is set in the drive ID field, in which case the
* modulus changes from 8 to the number of supported drives
* per SCSI bus (as obtained from the ID_CTLR command).
* This feature is referred to as BIG_MAP support, and we assume
* that all CISS controllers support it.
*/
#define CISS_BIG_MAP_ID(sc, bus, target) \
(0x80 | \
((sc)->ciss_id->drives_per_scsi_bus * (bus)) | \
(target))
#define CISS_BIG_MAP_BUS(sc, id) \
(((id) & 0x80) ? (((id) & ~0x80) / (sc)->ciss_id->drives_per_scsi_bus) : -1)
#define CISS_BIG_MAP_TARGET(sc, id) \
(((id) & 0x80) ? (((id) & ~0x80) % (sc)->ciss_id->drives_per_scsi_bus) : -1)
#define CISS_BIG_MAP_ENTRIES 128 /* number of entries in a BIG_MAP */
/*
* BMIC CDB
*
* Note that the phys_drive/res1 field is nominally the 32-bit
* "block number" field, but the only BMIC command(s) of interest
* implemented overload the MSB (note big-endian format here)
* to be the physical drive ID, so we define accordingly.
*/
struct ciss_bmic_cdb {
u_int8_t opcode;
u_int8_t log_drive;
u_int8_t phys_drive;
u_int8_t res1[3];
u_int8_t bmic_opcode;
u_int16_t size; /* big-endian */
u_int8_t res2;
} __attribute__ ((packed));
/*
* BMIC command command/return structures.
*/
/* CISS_BMIC_ID_LDRIVE */
struct ciss_bmic_id_ldrive {
u_int16_t block_size;
u_int32_t blocks_available;
u_int8_t drive_parameter_table[16]; /* XXX define */
u_int8_t fault_tolerance;
#define CISS_LDRIVE_RAID0 0
#define CISS_LDRIVE_RAID4 1
#define CISS_LDRIVE_RAID1 2
#define CISS_LDRIVE_RAID5 3
u_int8_t res1[2];
#if 0 /* only for identify logical drive extended (0x18) */
u_int32_t logical_drive_identifier;
char logical_drive_label[64];
#endif
} __attribute__ ((packed));
/* CISS_BMIC_ID_LSTATUS */
struct ciss_bmic_id_lstatus {
u_int8_t status;
#define CISS_LSTATUS_OK 0
#define CISS_LSTATUS_FAILED 1
#define CISS_LSTATUS_NOT_CONFIGURED 2
#define CISS_LSTATUS_INTERIM_RECOVERY 3
#define CISS_LSTATUS_READY_RECOVERY 4
#define CISS_LSTATUS_RECOVERING 5
#define CISS_LSTATUS_WRONG_PDRIVE 6
#define CISS_LSTATUS_MISSING_PDRIVE 7
#define CISS_LSTATUS_EXPANDING 10
#define CISS_LSTATUS_BECOMING_READY 11
#define CISS_LSTATUS_QUEUED_FOR_EXPANSION 12
u_int32_t deprecated_drive_failure_map;
u_int8_t res1[416];
u_int32_t blocks_to_recover;
u_int8_t deprecated_drive_rebuilding;
u_int16_t deprecated_remap_count[32];
u_int32_t deprecated_replacement_map;
u_int32_t deprecated_active_spare_map;
u_int8_t spare_configured:1;
u_int8_t spare_rebuilding:1;
u_int8_t spare_rebuilt:1;
u_int8_t spare_failed:1;
u_int8_t spare_switched:1;
u_int8_t spare_available:1;
u_int8_t res2:2;
u_int8_t deprecated_spare_to_replace_map[32];
u_int32_t deprecated_replaced_marked_ok_map;
u_int8_t media_exchanged;
u_int8_t cache_failure;
u_int8_t expand_failure;
u_int8_t rebuild_read_failure:1;
u_int8_t rebuild_write_failure:1;
u_int8_t res3:6;
u_int8_t drive_failure_map[CISS_BIG_MAP_ENTRIES / 8];
u_int16_t remap_count[CISS_BIG_MAP_ENTRIES];
u_int8_t replacement_map[CISS_BIG_MAP_ENTRIES / 8];
u_int8_t active_spare_map[CISS_BIG_MAP_ENTRIES / 8];
u_int8_t spare_to_replace_map[CISS_BIG_MAP_ENTRIES];
u_int8_t replaced_marked_ok_map[CISS_BIG_MAP_ENTRIES / 8];
u_int8_t drive_rebuilding;
} __attribute__ ((packed));
/* CISS_BMIC_ID_CTLR */
struct ciss_bmic_id_table {
u_int8_t configured_logical_drives;
u_int32_t config_signature;
char running_firmware_revision[4];
char stored_firmware_revision[4];
u_int8_t hardware_revision;
u_int8_t res1[4];
u_int32_t deprecated_drive_present_map;
u_int32_t deprecated_external_drive_present_map;
u_int32_t board_id;
u_int8_t res2;
u_int32_t deprecated_non_disk_map;
u_int8_t res3[5];
char marketting_revision;
u_int8_t res4:3;
u_int8_t more_than_seven_supported:1;
u_int8_t res5:3;
u_int8_t big_map_supported:1; /* must be set! */
u_int8_t res6[2];
u_int8_t scsi_bus_count;
u_int32_t res7;
u_int32_t controller_clock;
u_int8_t drives_per_scsi_bus;
u_int8_t big_drive_present_map[CISS_BIG_MAP_ENTRIES / 8];
u_int8_t big_external_drive_present_map[CISS_BIG_MAP_ENTRIES / 8];
u_int8_t big_non_disk_map[CISS_BIG_MAP_ENTRIES / 8];
} __attribute__ ((packed));
/* CISS_BMIC_ID_PDRIVE */
struct ciss_bmic_id_pdrive {
u_int8_t scsi_bus;
u_int8_t scsi_id;
u_int16_t block_size;
u_int32_t total_blocks;
u_int32_t reserved_blocks;
char model[40];
char serial[40];
char revision[8];
u_int8_t inquiry_bits;
u_int8_t res1[2];
u_int8_t drive_present:1;
u_int8_t non_disk:1;
u_int8_t wide:1;
u_int8_t synchronous:1;
u_int8_t narrow:1;
u_int8_t wide_downgraded_to_narrow:1;
u_int8_t ultra:1;
u_int8_t ultra2:1;
u_int8_t SMART:1;
u_int8_t SMART_errors_recorded:1;
u_int8_t SMART_errors_enabled:1;
u_int8_t SMART_errors_detected:1;
u_int8_t external:1;
u_int8_t configured:1;
u_int8_t configured_spare:1;
u_int8_t cache_saved_enabled:1;
u_int8_t res2;
u_int8_t res3:6;
u_int8_t cache_currently_enabled:1;
u_int8_t cache_safe:1;
u_int8_t res4[5];
char connector[2];
u_int8_t res5;
u_int8_t bay;
} __attribute__ ((packed));
/* CISS_BMIC_BLINK_PDRIVE */
/* CISS_BMIC_SENSE_BLINK_PDRIVE */
struct ciss_bmic_blink_pdrive {
u_int32_t blink_duration; /* 10ths of a second */
u_int32_t duration_elapsed; /* only for sense command */
u_int8_t blinktab[256];
#define CISS_BMIC_BLINK_ALL 1
#define CISS_BMIC_BLINK_TIMED 2
u_int8_t res2[248];
} __attribute__ ((packed));
/* CISS_BMIC_FLUSH_CACHE */
struct ciss_bmic_flush_cache {
u_int16_t flag;
#define CISS_BMIC_FLUSH_AND_ENABLE 0
#define CISS_BMIC_FLUSH_AND_DISABLE 1
u_int8_t res1[510];
} __attribute__ ((packed));
#ifdef _KERNEL
/*
* CISS "simple" transport layer.
*
* Note that there are two slightly different versions of this interface
* with different interrupt mask bits. There's nothing like consistency...
*/
#define CISS_TL_SIMPLE_BAR_REGS 0x10 /* BAR pointing to register space */
#define CISS_TL_SIMPLE_BAR_CFG 0x14 /* BAR pointing to space containing config table */
#define CISS_TL_SIMPLE_IDBR 0x20 /* inbound doorbell register */
#define CISS_TL_SIMPLE_IDBR_CFG_TABLE (1<<0) /* notify controller of config table update */
#define CISS_TL_SIMPLE_ISR 0x30 /* interrupt status register */
#define CISS_TL_SIMPLE_IMR 0x34 /* interrupt mask register */
#define CISS_TL_SIMPLE_INTR_OPQ_SA5 (1<<3) /* OPQ not empty interrupt, SA5 boards */
#define CISS_TL_SIMPLE_INTR_OPQ_SA5B (1<<2) /* OPQ not empty interrupt, SA5B boards */
#define CISS_TL_SIMPLE_IPQ 0x40 /* inbound post queue */
#define CISS_TL_SIMPLE_OPQ 0x44 /* outbound post queue */
#define CISS_TL_SIMPLE_OPQ_EMPTY (~(u_int32_t)0)
#define CISS_TL_SIMPLE_CFG_BAR 0xb4 /* should be 0x14 */
#define CISS_TL_SIMPLE_CFG_OFF 0xb8 /* offset in BAR at which config table is located */
/*
* Register access primitives.
*/
#define CISS_TL_SIMPLE_READ(sc, ofs) \
bus_space_read_4(sc->ciss_regs_btag, sc->ciss_regs_bhandle, ofs)
#define CISS_TL_SIMPLE_WRITE(sc, ofs, val) \
bus_space_write_4(sc->ciss_regs_btag, sc->ciss_regs_bhandle, ofs, val)
#define CISS_TL_SIMPLE_POST_CMD(sc, phys) CISS_TL_SIMPLE_WRITE(sc, CISS_TL_SIMPLE_IPQ, phys)
#define CISS_TL_SIMPLE_FETCH_CMD(sc) CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_OPQ)
/*
* XXX documentation conflicts with the Linux driver as to whether setting or clearing
* bits masks interrupts
*/
#define CISS_TL_SIMPLE_DISABLE_INTERRUPTS(sc) \
CISS_TL_SIMPLE_WRITE(sc, CISS_TL_SIMPLE_IMR, \
CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_IMR) | (sc)->ciss_interrupt_mask)
#define CISS_TL_SIMPLE_ENABLE_INTERRUPTS(sc) \
CISS_TL_SIMPLE_WRITE(sc, CISS_TL_SIMPLE_IMR, \
CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_IMR) & ~(sc)->ciss_interrupt_mask)
#define CISS_TL_SIMPLE_OPQ_INTERRUPT(sc) \
(CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_ISR) & (sc)->ciss_interrupt_mask)
#endif /* _KERNEL */

375
sys/dev/ciss/cissvar.h Normal file
View File

@ -0,0 +1,375 @@
/*-
* Copyright (c) 2001 Michael Smith
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* CISS adapter driver datastructures
*/
/************************************************************************
* Tunable parameters
*/
/*
* There is no guaranteed upper bound on the number of concurrent
* commands an adapter may claim to support. Cap it at a reasonable
* value.
*/
#define CISS_MAX_REQUESTS 256
/*
* Maximum number of logical drives we support.
*/
#define CISS_MAX_LOGICAL 15
/*
* Interrupt reduction can be controlled by tuning the interrupt
* coalesce delay and count paramters. The delay (in microseconds)
* defers delivery of interrupts to increase the chance of there being
* more than one completed command ready when the interrupt is
* delivered. The count expedites the delivery of the interrupt when
* the given number of commands are ready.
*
* If the delay is set to 0, interrupts are delivered immediately.
*/
#define CISS_INTERRUPT_COALESCE_DELAY 1000
#define CISS_INTERRUPT_COALESCE_COUNT 16
/*
* Heartbeat routine timeout in seconds. Note that since event
* handling is performed on a callback basis, we don't need this to
* run very often.
*/
#define CISS_HEARTBEAT_RATE 10
/*
* Maximum number of events we will queue for a monitoring utility.
*/
#define CISS_MAX_EVENTS 32
/************************************************************************
* Command queue statistics
*/
#define CISSQ_FREE 0
#define CISSQ_BUSY 1
#define CISSQ_COMPLETE 2
#define CISSQ_COUNT 3
struct ciss_qstat
{
u_int32_t q_length;
u_int32_t q_max;
};
/************************************************************************
* Driver version. Only really significant to the ACU interface.
*/
#define CISS_DRIVER_VERSION 20011009
/************************************************************************
* Driver data structures
*/
/*
* Each command issued to the adapter is managed by a request
* structure.
*/
struct ciss_request
{
TAILQ_ENTRY(ciss_request) cr_link;
int cr_onq; /* which queue we are on */
struct ciss_softc *cr_sc; /* controller softc */
void *cr_data; /* data buffer */
u_int32_t cr_length; /* data length */
bus_dmamap_t cr_datamap; /* DMA map for data */
int cr_tag;
int cr_flags;
#define CISS_REQ_MAPPED (1<<0) /* data mapped */
#define CISS_REQ_SLEEP (1<<1) /* submitter sleeping */
#define CISS_REQ_POLL (1<<2) /* submitter polling */
#define CISS_REQ_DATAOUT (1<<3) /* data host->adapter */
#define CISS_REQ_DATAIN (1<<4) /* data adapter->host */
void (* cr_complete)(struct ciss_request *);
void *cr_private;
};
/*
* The adapter command structure is defined with a zero-length
* scatter/gather list size. In practise, we want space for a
* scatter-gather list, and we also want to avoid having commands
* cross page boundaries.
*
* Note that 512 bytes yields 28 scatter/gather entries, or the
* ability to map (26 * PAGE_SIZE) + 2 bytes of data. On x86, this is
* 104kB. 256 bytes would only yield 12 entries, giving a mere 40kB,
* too small.
*/
#define CISS_COMMAND_ALLOC_SIZE 512 /* XXX tune to get sensible s/g list length */
#define CISS_COMMAND_SG_LENGTH ((CISS_COMMAND_ALLOC_SIZE - sizeof(struct ciss_command)) \
/ sizeof(struct ciss_sg_entry))
/*
* Per-logical-drive data.
*/
struct ciss_ldrive
{
union ciss_device_address cl_address;
int cl_status;
#define CISS_LD_NONEXISTENT 0
#define CISS_LD_ONLINE 1
#define CISS_LD_OFFLINE 2
struct ciss_bmic_id_ldrive *cl_ldrive;
struct ciss_bmic_id_lstatus *cl_lstatus;
char cl_name[16]; /* device name */
};
/*
* Per-adapter data
*/
struct ciss_softc
{
/* bus connections */
device_t ciss_dev; /* bus attachment */
dev_t ciss_dev_t; /* control device */
struct resource *ciss_regs_resource; /* register interface window */
int ciss_regs_rid; /* resource ID */
bus_space_handle_t ciss_regs_bhandle; /* bus space handle */
bus_space_tag_t ciss_regs_btag; /* bus space tag */
struct resource *ciss_cfg_resource; /* config struct interface window */
int ciss_cfg_rid; /* resource ID */
struct ciss_config_table *ciss_cfg; /* config table in adapter memory */
struct ciss_bmic_id_table *ciss_id; /* ID table in host memory */
u_int32_t ciss_heartbeat; /* last heartbeat value */
int ciss_heart_attack; /* number of times we have seen this value */
struct resource *ciss_irq_resource; /* interrupt */
int ciss_irq_rid; /* resource ID */
void *ciss_intr; /* interrupt handle */
bus_dma_tag_t ciss_parent_dmat; /* parent DMA tag */
bus_dma_tag_t ciss_buffer_dmat; /* data buffer/command DMA tag */
u_int32_t ciss_interrupt_mask; /* controller interrupt mask bits */
int ciss_max_requests;
struct ciss_request ciss_request[CISS_MAX_REQUESTS]; /* requests */
void *ciss_command; /* command structures */
bus_dma_tag_t ciss_command_dmat; /* command DMA tag */
bus_dmamap_t ciss_command_map; /* command DMA map */
u_int32_t ciss_command_phys; /* command array base address */
TAILQ_HEAD(,ciss_request) ciss_free; /* requests available for reuse */
TAILQ_HEAD(,ciss_request) ciss_busy; /* requests in the adapter */
TAILQ_HEAD(,ciss_request) ciss_complete; /* requests which have been returned by the adapter */
struct callout_handle ciss_periodic; /* periodic event handling */
struct ciss_request *ciss_periodic_notify; /* notify callback request */
struct ciss_notify ciss_notify[CISS_MAX_EVENTS];
int ciss_notify_head; /* saved-event ringbuffer */
int ciss_notify_tail;
struct ciss_ldrive ciss_logical[CISS_MAX_LOGICAL];
struct cam_devq *ciss_cam_devq;
struct cam_sim *ciss_cam_sim;
struct cam_path *ciss_cam_path;
int ciss_flags;
#define CISS_FLAG_NOTIFY_OK (1<<0) /* notify command running OK */
#define CISS_FLAG_CONTROL_OPEN (1<<1) /* control device is open */
#define CISS_FLAG_ABORTING (1<<2) /* driver is going away */
#define CISS_FLAG_RUNNING (1<<3) /* driver is running (interrupts usable) */
#define CISS_FLAG_FAKE_SYNCH (1<<16) /* needs SYNCHRONISE_CACHE faked */
#define CISS_FLAG_BMIC_ABORT (1<<17) /* use BMIC command to abort Notify on Event */
struct ciss_qstat ciss_qstat[CISSQ_COUNT]; /* queue statistics */
};
/*
* Given a request tag, find the corresponding command in virtual or
* physical space.
*
* The arithmetic here is due to the allocation of ciss_command structures
* inside CISS_COMMAND_ALLOC_SIZE blocks. See the comment at the definition
* of CISS_COMMAND_ALLOC_SIZE above.
*/
#define CISS_FIND_COMMAND(cr) \
(struct ciss_command *)((u_int8_t *)(cr)->cr_sc->ciss_command + \
((cr)->cr_tag * CISS_COMMAND_ALLOC_SIZE))
#define CISS_FIND_COMMANDPHYS(cr) ((cr)->cr_sc->ciss_command_phys + \
((cr)->cr_tag * CISS_COMMAND_ALLOC_SIZE))
/************************************************************************
* Debugging/diagnostic output.
*/
/*
* Debugging levels:
* 0 - quiet, only emit warnings
* 1 - talkative, log major events, but nothing on the I/O path
* 2 - noisy, log events on the I/O path
* 3 - extremely noisy, log items in loops
*/
#ifdef CISS_DEBUG
# define debug(level, fmt, args...) \
do { \
if (level <= CISS_DEBUG) printf("%s: " fmt "\n", __FUNCTION__ , ##args); \
} while(0)
# define debug_called(level) \
do { \
if (level <= CISS_DEBUG) printf(__FUNCTION__ ": called\n"); \
} while(0)
# define debug_struct(s) printf(" SIZE %s: %d\n", #s, sizeof(struct s))
# define debug_union(s) printf(" SIZE %s: %d\n", #s, sizeof(union s))
# define debug_type(s) printf(" SIZE %s: %d\n", #s, sizeof(s))
# define debug_field(s, f) printf(" OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f)))
# define debug_const(c) printf(" CONST %s %d/0x%x\n", #c, c, c);
#else
# define debug(level, fmt, args...)
# define debug_called(level)
# define debug_struct(s)
# define debug_union(s)
# define debug_type(s)
# define debug_field(s, f)
# define debug_const(c)
#endif
#define ciss_printf(sc, fmt, args...) device_printf(sc->ciss_dev, fmt , ##args)
/************************************************************************
* Queue primitives
*/
#define CISSQ_ADD(sc, qname) \
do { \
struct ciss_qstat *qs = &(sc)->ciss_qstat[qname]; \
\
qs->q_length++; \
if (qs->q_length > qs->q_max) \
qs->q_max = qs->q_length; \
} while(0)
#define CISSQ_REMOVE(sc, qname) (sc)->ciss_qstat[qname].q_length--
#define CISSQ_INIT(sc, qname) \
do { \
sc->ciss_qstat[qname].q_length = 0; \
sc->ciss_qstat[qname].q_max = 0; \
} while(0)
#define CISSQ_REQUEST_QUEUE(name, index) \
static __inline void \
ciss_initq_ ## name (struct ciss_softc *sc) \
{ \
TAILQ_INIT(&sc->ciss_ ## name); \
CISSQ_INIT(sc, index); \
} \
static __inline void \
ciss_enqueue_ ## name (struct ciss_request *cr) \
{ \
int s; \
\
s = splcam(); \
TAILQ_INSERT_TAIL(&cr->cr_sc->ciss_ ## name, cr, cr_link); \
CISSQ_ADD(cr->cr_sc, index); \
cr->cr_onq = index; \
splx(s); \
} \
static __inline void \
ciss_requeue_ ## name (struct ciss_request *cr) \
{ \
int s; \
\
s = splcam(); \
TAILQ_INSERT_HEAD(&cr->cr_sc->ciss_ ## name, cr, cr_link); \
CISSQ_ADD(cr->cr_sc, index); \
cr->cr_onq = index; \
splx(s); \
} \
static __inline struct ciss_request * \
ciss_dequeue_ ## name (struct ciss_softc *sc) \
{ \
struct ciss_request *cr; \
int s; \
\
s = splcam(); \
if ((cr = TAILQ_FIRST(&sc->ciss_ ## name)) != NULL) { \
TAILQ_REMOVE(&sc->ciss_ ## name, cr, cr_link); \
CISSQ_REMOVE(sc, index); \
cr->cr_onq = -1; \
} \
splx(s); \
return(cr); \
} \
static __inline int \
ciss_remove_ ## name (struct ciss_request *cr) \
{ \
int s, error; \
\
s = splcam(); \
if (cr->cr_onq != index) { \
printf("request on queue %d (expected %d)\n", cr->cr_onq, index);\
error = 1; \
} else { \
TAILQ_REMOVE(&cr->cr_sc->ciss_ ## name, cr, cr_link); \
CISSQ_REMOVE(cr->cr_sc, index); \
cr->cr_onq = -1; \
error = 0; \
} \
splx(s); \
return(error); \
} \
struct hack
CISSQ_REQUEST_QUEUE(free, CISSQ_FREE);
CISSQ_REQUEST_QUEUE(busy, CISSQ_BUSY);
CISSQ_REQUEST_QUEUE(complete, CISSQ_COMPLETE);
/********************************************************************************
* space-fill a character string
*/
static __inline void
padstr(char *targ, const char *src, int len)
{
while (len-- > 0) {
if (*src != 0) {
*targ++ = *src++;
} else {
*targ++ = ' ';
}
}
}

7
sys/i386/conf/NOTES
View File

@ -1508,6 +1508,13 @@ options DPT_LOST_IRQ
options DPT_RESET_HBA
options DPT_ALLOW_MEMIO
#
# Compaq "CISS" RAID controllers (SmartRAID 5* series)
# These controllers have a SCSI-like interface, and require the
# CAM infrastructure.
#
device ciss
#
# Mylex AcceleRAID and eXtremeRAID controllers with v6 and later
# firmware. These controllers have a SCSI-like interface, and require

1
sys/modules/Makefile
View File

@ -121,6 +121,7 @@ SUBDIR+=aac \
atspeaker \
bktr \
coff \
ciss \
el \
fe \
fpu \

11
sys/modules/ciss/Makefile Normal file
View File

@ -0,0 +1,11 @@
# $FreeBSD$
KMOD = ciss
.PATH: ${.CURDIR}/../../dev/${KMOD}
SRCS = ciss.c
SRCS += opt_scsi.h opt_cam.h
SRCS += device_if.h bus_if.h pci_if.h
CFLAGS +=-DCISS_DEBUG=0
.include <bsd.kmod.mk>