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Fix VNIC support for Pass2.0 ThunderX chips

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- Check chip revision using pass1_silicon() routine.
- Configure CPI correctly for Pass2.0

Reviewed by:   wma
Obtained from: Semihalf
Sponsored by:  Cavium
Differential Revision: https://reviews.freebsd.org/D5422
This commit is contained in:
Zbigniew Bodek 2016-02-25 14:26:13 +00:00
parent 73f8bb5343
commit 3ad422a9d3
3 changed files with 24 additions and 5 deletions
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11
sys/dev/vnic/nic.h
View File

@ -42,6 +42,9 @@
#define PCI_CFG_REG_BAR_NUM 0
#define PCI_MSIX_REG_BAR_NUM 4
/* PCI revision IDs */
#define PCI_REVID_PASS2 8
/* NIC SRIOV VF count */
#define MAX_NUM_VFS_SUPPORTED 128
#define DEFAULT_NUM_VF_ENABLED 8
@ -483,6 +486,14 @@ nic_get_node_id(struct resource *res)
return ((addr >> NIC_NODE_ID_SHIFT) & NIC_NODE_ID_MASK);
}
static __inline boolean_t
pass1_silicon(device_t dev)
{
/* Check if the chip revision is < Pass2 */
return (pci_get_revid(dev) < PCI_REVID_PASS2);
}
int nicvf_send_msg_to_pf(struct nicvf *vf, union nic_mbx *mbx);
#endif /* NIC_H */

17
sys/dev/vnic/nic_main.c
View File

@ -87,7 +87,6 @@ struct nicvf_info {
struct nicpf {
device_t dev;
uint8_t rev_id;
uint8_t node;
u_int flags;
uint8_t num_vf_en; /* No of VF enabled */
@ -200,7 +199,6 @@ nicpf_attach(device_t dev)
}
nic->node = nic_get_node_id(nic->reg_base);
nic->rev_id = pci_read_config(dev, PCIR_REVID, 1);
/* Enable Traffic Network Switch (TNS) bypass mode by default */
nic->flags &= ~NIC_TNS_ENABLED;
@ -416,7 +414,7 @@ nic_send_msg_to_vf(struct nicpf *nic, int vf, union nic_mbx *mbx)
* when PF writes to MBOX(1), in next revisions when
* PF writes to MBOX(0)
*/
if (nic->rev_id == 0) {
if (pass1_silicon(nic->dev)) {
nic_reg_write(nic, mbx_addr + 0, msg[0]);
nic_reg_write(nic, mbx_addr + 8, msg[1]);
} else {
@ -729,8 +727,17 @@ nic_config_cpi(struct nicpf *nic, struct cpi_cfg_msg *cfg)
padd = cpi % 8; /* 3 bits CS out of 6bits DSCP */
/* Leave RSS_SIZE as '0' to disable RSS */
nic_reg_write(nic, NIC_PF_CPI_0_2047_CFG | (cpi << 3),
(vnic << 24) | (padd << 16) | (rssi_base + rssi));
if (pass1_silicon(nic->dev)) {
nic_reg_write(nic, NIC_PF_CPI_0_2047_CFG | (cpi << 3),
(vnic << 24) | (padd << 16) | (rssi_base + rssi));
} else {
/* Set MPI_ALG to '0' to disable MCAM parsing */
nic_reg_write(nic, NIC_PF_CPI_0_2047_CFG | (cpi << 3),
(padd << 16));
/* MPI index is same as CPI if MPI_ALG is not enabled */
nic_reg_write(nic, NIC_PF_MPI_0_2047_CFG | (cpi << 3),
(vnic << 24) | (rssi_base + rssi));
}
if ((rssi + 1) >= cfg->rq_cnt)
continue;

1
sys/dev/vnic/nic_reg.h
View File

@ -107,6 +107,7 @@
#define NIC_PF_ECC3_DBE_ENA_W1C (0x2710)
#define NIC_PF_ECC3_DBE_ENA_W1S (0x2718)
#define NIC_PF_CPI_0_2047_CFG (0x200000)
#define NIC_PF_MPI_0_2047_CFG (0x210000)
#define NIC_PF_RSSI_0_4097_RQ (0x220000)
#define NIC_PF_LMAC_0_7_CFG (0x240000)
#define NIC_PF_LMAC_0_7_SW_XOFF (0x242000)