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Revert the PCIe 4GB boundary issue workaround now that the proper fix is

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in HEAD.

Ok'd by:	scottl
This commit is contained in:
John Baldwin 2012-03-16 16:12:10 +00:00
parent dff207f860
commit 3b22825af7
1 changed files with 0 additions and 8 deletions
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8
sys/x86/x86/busdma_machdep.c
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@ -227,14 +227,6 @@ bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
bus_dma_tag_t newtag;
int error = 0;
/* Always enforce at least a 4GB (2GB for PAE) boundary. */
#if defined(__amd64__)
if (boundary == 0 || boundary > ((bus_addr_t)1 << 32))
boundary = (bus_size_t)1 << 32;
#elif defined(PAE)
if (boundary == 0 || boundary > ((bus_addr_t)1 << 31))
boundary = (bus_size_t)1 << 31;
#endif
/* Basic sanity checking */
if (boundary != 0 && boundary < maxsegsz)
maxsegsz = boundary;