Add the GPIO driver for the ADI Engineering RCC-VE and RCC-DFF/DFFv2.
This driver allows read the software reset switch state and control the status LEDs. The GPIO pins have their direction (input/output) locked down to prevent possible short circuits. Note that most people get a reset button that is a hardware reset. The software reset button is available on boards from Netgate. Sponsored by: Rubicon Communications (Netgate)
This commit is contained in:
parent
337776f858
commit
3df058ffaf
63
share/man/man4/rccgpio.4
Normal file
63
share/man/man4/rccgpio.4
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@ -0,0 +1,63 @@
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.\" Copyright (c) 2015, Rubicon Communications, LLC (Netgate)
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd August 18, 2015
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.Dt RCCGPIO 4
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.Os
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.Sh NAME
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.Nm rccgpio
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.Nd ADI Engineering RCC-VE and RCC-DFF/DFFv2 GPIO controller
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.Sh SYNOPSIS
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.Cd "device rccgpio"
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.Cd "device gpio"
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.Cd "device gpioled"
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.Sh DESCRIPTION
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The
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.Nm
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provides a simple interface to read the reset switch state and control the
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status LEDs.
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.Pp
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The software controlled reset switch is known to be available on boards from
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Netgate.
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Most people get a button that is a hardware reset.
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.Pp
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All the GPIO pins are locked in their intended setup to disallow any harmful
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settings (the ones that can cause short circuits).
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.Sh SEE ALSO
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.Xr gpio 3 ,
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.Xr gpio 4 ,
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.Xr gpioled 4 ,
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.Xr gpioctl 8
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.Sh HISTORY
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The
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.Nm
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manual page first appeared in
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.Fx 11.0 .
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.Sh AUTHORS
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The
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.Nm
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driver was written by
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.An Luiz Otavio O Souza Aq Mt loos@FreeBSD.org .
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@ -2323,6 +2323,7 @@ dev/random/fortuna.c optional random !random_yarrow !random_loadable
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dev/random/hash.c optional random random_yarrow | \
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random !random_yarrow !random_loadable
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dev/rc/rc.c optional rc
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dev/rccgpio/rccgpio.c optional rccgpio gpio
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dev/re/if_re.c optional re
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dev/rl/if_rl.c optional rl pci
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dev/rndtest/rndtest.c optional rndtest
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368
sys/dev/rccgpio/rccgpio.c
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368
sys/dev/rccgpio/rccgpio.c
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/*-
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* Copyright (c) 2015 Rubicon Communications, LLC (Netgate)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* GPIO driver for the ADI Engineering RCC-VE and RCC-DFF/DFFv2.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <isa/isavar.h>
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#include "gpio_if.h"
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#define RCC_GPIO_BASE 0x500
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#define RCC_GPIO_USE_SEL 0x00
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#define RCC_GPIO_IO_SEL 0x04
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#define RCC_GPIO_GP_LVL 0x08
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struct rcc_gpio_pin {
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uint32_t pin;
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const char *name;
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uint32_t caps;
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};
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static struct rcc_gpio_pin rcc_pins[] = {
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{ .pin = 11, .name = "reset switch", .caps = GPIO_PIN_INPUT },
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{ .pin = 15, .name = "red LED", .caps = GPIO_PIN_OUTPUT },
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{ .pin = 17, .name = "green LED", .caps = GPIO_PIN_OUTPUT },
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#if 0
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{ .pin = 16, .name = "HD1 LED", .caps = GPIO_PIN_OUTPUT },
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{ .pin = 18, .name = "HD2 LED", .caps = GPIO_PIN_OUTPUT },
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#endif
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};
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struct rcc_gpio_softc {
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device_t sc_dev;
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device_t sc_busdev;
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struct mtx sc_mtx;
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struct resource *sc_io_res;
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bsh;
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uint32_t sc_output;
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int sc_io_rid;
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int sc_gpio_npins;
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};
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#define RCC_GPIO_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define RCC_GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define RCC_WRITE(_sc, _off, _val) \
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bus_space_write_4((_sc)->sc_bst, (_sc)->sc_bsh, _off, _val)
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#define RCC_READ(_sc, _off) \
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bus_space_read_4((_sc)->sc_bst, (_sc)->sc_bsh, _off)
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static void
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rcc_gpio_modify_bits(struct rcc_gpio_softc *sc, uint32_t reg, uint32_t mask,
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uint32_t bit)
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{
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uint32_t value;
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RCC_GPIO_LOCK(sc);
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value = RCC_READ(sc, reg);
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value &= ~(1 << mask);
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value |= (1 << bit);
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RCC_WRITE(sc, reg, value);
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RCC_GPIO_UNLOCK(sc);
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}
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static device_t
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rcc_gpio_get_bus(device_t dev)
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{
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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return (sc->sc_busdev);
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}
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static int
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rcc_gpio_pin_max(device_t dev, int *maxpin)
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{
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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*maxpin = sc->sc_gpio_npins - 1;
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return (0);
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}
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static int
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rcc_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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if (pin > sc->sc_gpio_npins)
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return (EINVAL);
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*caps = rcc_pins[pin].caps;
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return (0);
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}
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static int
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rcc_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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if (pin > sc->sc_gpio_npins)
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return (EINVAL);
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/* Flags cannot be changed. */
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*flags = rcc_pins[pin].caps;
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return (0);
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}
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static int
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rcc_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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if (pin > sc->sc_gpio_npins)
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return (EINVAL);
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memcpy(name, rcc_pins[pin].name, GPIOMAXNAME);
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return (0);
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}
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static int
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rcc_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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if (pin > sc->sc_gpio_npins)
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return (EINVAL);
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/* Flags cannot be changed - risk of short-circuit!!! */
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return (0);
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}
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static int
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rcc_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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if (pin > sc->sc_gpio_npins)
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return (EINVAL);
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RCC_GPIO_LOCK(sc);
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if (value)
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sc->sc_output |= (1 << rcc_pins[pin].pin);
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else
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sc->sc_output &= ~(1 << rcc_pins[pin].pin);
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RCC_WRITE(sc, RCC_GPIO_GP_LVL, sc->sc_output);
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RCC_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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rcc_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
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{
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struct rcc_gpio_softc *sc;
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uint32_t value;
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sc = device_get_softc(dev);
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if (pin > sc->sc_gpio_npins)
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return (EINVAL);
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RCC_GPIO_LOCK(sc);
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if (rcc_pins[pin].caps & GPIO_PIN_INPUT)
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value = RCC_READ(sc, RCC_GPIO_GP_LVL);
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else
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value = sc->sc_output;
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RCC_GPIO_UNLOCK(sc);
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*val = (value & (1 << rcc_pins[pin].pin)) ? 1 : 0;
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return (0);
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}
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static int
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rcc_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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if (pin > sc->sc_gpio_npins)
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return (EINVAL);
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RCC_GPIO_LOCK(sc);
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if ((sc->sc_output & (1 << rcc_pins[pin].pin)) == 0)
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sc->sc_output |= (1 << rcc_pins[pin].pin);
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else
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sc->sc_output &= ~(1 << rcc_pins[pin].pin);
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RCC_WRITE(sc, RCC_GPIO_GP_LVL, sc->sc_output);
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RCC_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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rcc_gpio_probe(device_t dev)
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{
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char *prod;
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int port;
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/*
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* We don't know of any PnP ID's for this GPIO controller.
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*/
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if (isa_get_logicalid(dev) != 0)
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return (ENXIO);
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/*
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* We have to have an IO port hint that is valid.
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*/
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port = isa_get_port(dev);
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if (port != RCC_GPIO_BASE)
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return (ENXIO);
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prod = kern_getenv("smbios.system.product");
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if (prod == NULL ||
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(strcmp(prod, "RCC-VE") != 0 && strcmp(prod, "RCC-DFF") != 0))
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return (ENXIO);
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device_set_desc(dev, "RCC-VE/DFF GPIO controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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rcc_gpio_attach(device_t dev)
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{
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int i;
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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/* Allocate IO resources. */
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sc->sc_io_rid = 0;
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sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
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&sc->sc_io_rid, RF_ACTIVE);
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if (sc->sc_io_res == NULL) {
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device_printf(dev, "cannot allocate memory window\n");
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return (ENXIO);
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}
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sc->sc_bst = rman_get_bustag(sc->sc_io_res);
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sc->sc_bsh = rman_get_bushandle(sc->sc_io_res);
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mtx_init(&sc->sc_mtx, "rcc-gpio", "gpio", MTX_DEF);
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/* Initialize the pins. */
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sc->sc_gpio_npins = nitems(rcc_pins);
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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/* Enable it for GPIO. */
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rcc_gpio_modify_bits(sc, RCC_GPIO_USE_SEL, 0, rcc_pins[i].pin);
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/* Set the pin as input or output. */
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if (rcc_pins[i].caps & GPIO_PIN_OUTPUT)
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rcc_gpio_modify_bits(sc, RCC_GPIO_IO_SEL,
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rcc_pins[i].pin, 0);
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else
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rcc_gpio_modify_bits(sc, RCC_GPIO_IO_SEL,
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0, rcc_pins[i].pin);
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}
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RCC_WRITE(sc, RCC_GPIO_GP_LVL, sc->sc_output);
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/* Attach the gpiobus. */
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sc->sc_busdev = gpiobus_attach_bus(dev);
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if (sc->sc_busdev == NULL) {
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bus_release_resource(dev, SYS_RES_IOPORT, sc->sc_io_rid,
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sc->sc_io_res);
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mtx_destroy(&sc->sc_mtx);
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return (ENXIO);
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}
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return (0);
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}
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static int
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rcc_gpio_detach(device_t dev)
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{
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int i;
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struct rcc_gpio_softc *sc;
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sc = device_get_softc(dev);
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gpiobus_detach_bus(dev);
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/* Disable the GPIO function. */
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for (i = 0; i < sc->sc_gpio_npins; i++)
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rcc_gpio_modify_bits(sc, RCC_GPIO_USE_SEL, rcc_pins[i].pin, 0);
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if (sc->sc_io_res != NULL)
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bus_release_resource(dev, SYS_RES_IOPORT, sc->sc_io_rid,
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sc->sc_io_res);
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mtx_destroy(&sc->sc_mtx);
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return (0);
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}
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static device_method_t rcc_gpio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, rcc_gpio_probe),
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DEVMETHOD(device_attach, rcc_gpio_attach),
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DEVMETHOD(device_detach, rcc_gpio_detach),
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/* GPIO protocol */
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DEVMETHOD(gpio_get_bus, rcc_gpio_get_bus),
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DEVMETHOD(gpio_pin_max, rcc_gpio_pin_max),
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DEVMETHOD(gpio_pin_getname, rcc_gpio_pin_getname),
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DEVMETHOD(gpio_pin_getflags, rcc_gpio_pin_getflags),
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DEVMETHOD(gpio_pin_getcaps, rcc_gpio_pin_getcaps),
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DEVMETHOD(gpio_pin_setflags, rcc_gpio_pin_setflags),
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DEVMETHOD(gpio_pin_get, rcc_gpio_pin_get),
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DEVMETHOD(gpio_pin_set, rcc_gpio_pin_set),
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DEVMETHOD(gpio_pin_toggle, rcc_gpio_pin_toggle),
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DEVMETHOD_END
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};
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static devclass_t rcc_gpio_devclass;
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static driver_t rcc_gpio_driver = {
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"gpio",
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rcc_gpio_methods,
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sizeof(struct rcc_gpio_softc),
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};
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DRIVER_MODULE(rcc_gpio, isa, rcc_gpio_driver, rcc_gpio_devclass, 0, 0);
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MODULE_DEPEND(rcc_gpio, gpiobus, 1, 1, 1);
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8
sys/modules/rccgpio/Makefile
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8
sys/modules/rccgpio/Makefile
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@ -0,0 +1,8 @@
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# $FreeBSD$
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.PATH: ${.CURDIR}/../../dev/rccgpio
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KMOD= rccgpio
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SRCS= rccgpio.c
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SRCS+= device_if.h bus_if.h isa_if.h gpio_if.h opt_platform.h
|
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|
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.include <bsd.kmod.mk>
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Block a user