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ixgbe: Update shared code catchup

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Leftovers from DPDK sync

Reviewed by:	grehan
Obtained from:	DPDK
MFC after:	5 days
Differential Revision:	https://reviews.freebsd.org/D31621
This commit is contained in:
Kevin Bowling 2021-10-06 18:43:27 -07:00
parent 224a95f124
commit 3f66b96d86
14 changed files with 427 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
sys/dev/ixgbe/ixgbe_82599.c
View File

@ -395,6 +395,11 @@ s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw)
/* Manageability interface */
mac->ops.set_fw_drv_ver = ixgbe_set_fw_drv_ver_generic;
mac->ops.get_thermal_sensor_data =
ixgbe_get_thermal_sensor_data_generic;
mac->ops.init_thermal_sensor_thresh =
ixgbe_init_thermal_sensor_thresh_generic;
mac->ops.bypass_rw = ixgbe_bypass_rw_generic;
mac->ops.bypass_valid_rd = ixgbe_bypass_valid_rd_generic;
mac->ops.bypass_set = ixgbe_bypass_set_generic;

54
sys/dev/ixgbe/ixgbe_api.c
View File

@ -113,6 +113,13 @@ s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
case ixgbe_mac_X550EM_a:
status = ixgbe_init_ops_X550EM_a(hw);
break;
case ixgbe_mac_82599_vf:
case ixgbe_mac_X540_vf:
case ixgbe_mac_X550_vf:
case ixgbe_mac_X550EM_x_vf:
case ixgbe_mac_X550EM_a_vf:
status = ixgbe_init_ops_vf(hw);
break;
default:
status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
break;
@ -176,6 +183,15 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
case IXGBE_DEV_ID_82599_T3_LOM:
hw->mac.type = ixgbe_mac_82599EB;
break;
case IXGBE_DEV_ID_82599_VF:
case IXGBE_DEV_ID_82599_VF_HV:
hw->mac.type = ixgbe_mac_82599_vf;
break;
case IXGBE_DEV_ID_X540_VF:
case IXGBE_DEV_ID_X540_VF_HV:
hw->mac.type = ixgbe_mac_X540_vf;
hw->mvals = ixgbe_mvals_X540;
break;
case IXGBE_DEV_ID_X540T:
case IXGBE_DEV_ID_X540T1:
case IXGBE_DEV_ID_X540_BYPASS:
@ -210,6 +226,21 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
hw->mac.type = ixgbe_mac_X550EM_a;
hw->mvals = ixgbe_mvals_X550EM_a;
break;
case IXGBE_DEV_ID_X550_VF:
case IXGBE_DEV_ID_X550_VF_HV:
hw->mac.type = ixgbe_mac_X550_vf;
hw->mvals = ixgbe_mvals_X550;
break;
case IXGBE_DEV_ID_X550EM_X_VF:
case IXGBE_DEV_ID_X550EM_X_VF_HV:
hw->mac.type = ixgbe_mac_X550EM_x_vf;
hw->mvals = ixgbe_mvals_X550EM_x;
break;
case IXGBE_DEV_ID_X550EM_A_VF:
case IXGBE_DEV_ID_X550EM_A_VF_HV:
hw->mac.type = ixgbe_mac_X550EM_a_vf;
hw->mvals = ixgbe_mvals_X550EM_a;
break;
default:
ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
@ -1146,6 +1177,29 @@ s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
}
/**
* ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
* @hw: pointer to hardware structure
*
* Updates the temperatures in mac.thermal_sensor_data
**/
s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
* @hw: pointer to hardware structure
*
* Inits the thermal sensor thresholds according to the NVM map
**/
s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_dmac_config - Configure DMA Coalescing registers.

3
sys/dev/ixgbe/ixgbe_api.h
View File

@ -49,6 +49,7 @@ extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
s32 ixgbe_init_hw(struct ixgbe_hw *hw);
@ -135,6 +136,8 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
u8 ver, u16 len, char *driver_ver);
s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw);
s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw);
void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
u16 *firmware_version);

174
sys/dev/ixgbe/ixgbe_common.c
View File

@ -4132,7 +4132,7 @@ s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw)
for (offset = 0; offset < IXGBE_VLVF_ENTRIES; offset++) {
IXGBE_WRITE_REG(hw, IXGBE_VLVF(offset), 0);
IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2), 0);
IXGBE_WRITE_REG(hw, IXGBE_VLVFB((offset * 2) + 1), 0);
IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2 + 1), 0);
}
return IXGBE_SUCCESS;
@ -4626,7 +4626,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
/* first pull in the header so we know the buffer length */
for (bi = 0; bi < dword_len; bi++) {
buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
IXGBE_LE32_TO_CPUS(&buffer[bi]);
IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]);
}
/*
@ -4662,7 +4662,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
/* Pull in the rest of the buffer (bi is where we left off) */
for (; bi <= dword_len; bi++) {
buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
IXGBE_LE32_TO_CPUS(&buffer[bi]);
IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]);
}
rel_out:
@ -4852,6 +4852,174 @@ void ixgbe_clear_tx_pending(struct ixgbe_hw *hw)
IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
}
static const u8 ixgbe_emc_temp_data[4] = {
IXGBE_EMC_INTERNAL_DATA,
IXGBE_EMC_DIODE1_DATA,
IXGBE_EMC_DIODE2_DATA,
IXGBE_EMC_DIODE3_DATA
};
static const u8 ixgbe_emc_therm_limit[4] = {
IXGBE_EMC_INTERNAL_THERM_LIMIT,
IXGBE_EMC_DIODE1_THERM_LIMIT,
IXGBE_EMC_DIODE2_THERM_LIMIT,
IXGBE_EMC_DIODE3_THERM_LIMIT
};
/**
* ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
* @hw: pointer to hardware structure
*
* Returns the thermal sensor data structure
**/
s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw)
{
s32 status = IXGBE_SUCCESS;
u16 ets_offset;
u16 ets_cfg;
u16 ets_sensor;
u8 num_sensors;
u8 sensor_index;
u8 sensor_location;
u8 i;
struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
DEBUGFUNC("ixgbe_get_thermal_sensor_data_generic");
/* Only support thermal sensors attached to 82599 physical port 0 */
if ((hw->mac.type != ixgbe_mac_82599EB) ||
(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1)) {
status = IXGBE_NOT_IMPLEMENTED;
goto out;
}
status = hw->eeprom.ops.read(hw, IXGBE_ETS_CFG, &ets_offset);
if (status)
goto out;
if ((ets_offset == 0x0000) || (ets_offset == 0xFFFF)) {
status = IXGBE_NOT_IMPLEMENTED;
goto out;
}
status = hw->eeprom.ops.read(hw, ets_offset, &ets_cfg);
if (status)
goto out;
if (((ets_cfg & IXGBE_ETS_TYPE_MASK) >> IXGBE_ETS_TYPE_SHIFT)
!= IXGBE_ETS_TYPE_EMC) {
status = IXGBE_NOT_IMPLEMENTED;
goto out;
}
num_sensors = (ets_cfg & IXGBE_ETS_NUM_SENSORS_MASK);
if (num_sensors > IXGBE_MAX_SENSORS)
num_sensors = IXGBE_MAX_SENSORS;
for (i = 0; i < num_sensors; i++) {
status = hw->eeprom.ops.read(hw, (ets_offset + 1 + i),
&ets_sensor);
if (status)
goto out;
sensor_index = ((ets_sensor & IXGBE_ETS_DATA_INDEX_MASK) >>
IXGBE_ETS_DATA_INDEX_SHIFT);
sensor_location = ((ets_sensor & IXGBE_ETS_DATA_LOC_MASK) >>
IXGBE_ETS_DATA_LOC_SHIFT);
if (sensor_location != 0) {
status = hw->phy.ops.read_i2c_byte(hw,
ixgbe_emc_temp_data[sensor_index],
IXGBE_I2C_THERMAL_SENSOR_ADDR,
&data->sensor[i].temp);
if (status)
goto out;
}
}
out:
return status;
}
/**
* ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds
* @hw: pointer to hardware structure
*
* Inits the thermal sensor thresholds according to the NVM map
* and save off the threshold and location values into mac.thermal_sensor_data
**/
s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw)
{
s32 status = IXGBE_SUCCESS;
u16 offset;
u16 ets_offset;
u16 ets_cfg;
u16 ets_sensor;
u8 low_thresh_delta;
u8 num_sensors;
u8 sensor_index;
u8 sensor_location;
u8 therm_limit;
u8 i;
struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
DEBUGFUNC("ixgbe_init_thermal_sensor_thresh_generic");
memset(data, 0, sizeof(struct ixgbe_thermal_sensor_data));
/* Only support thermal sensors attached to 82599 physical port 0 */
if ((hw->mac.type != ixgbe_mac_82599EB) ||
(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1))
return IXGBE_NOT_IMPLEMENTED;
offset = IXGBE_ETS_CFG;
if (hw->eeprom.ops.read(hw, offset, &ets_offset))
goto eeprom_err;
if ((ets_offset == 0x0000) || (ets_offset == 0xFFFF))
return IXGBE_NOT_IMPLEMENTED;
offset = ets_offset;
if (hw->eeprom.ops.read(hw, offset, &ets_cfg))
goto eeprom_err;
if (((ets_cfg & IXGBE_ETS_TYPE_MASK) >> IXGBE_ETS_TYPE_SHIFT)
!= IXGBE_ETS_TYPE_EMC)
return IXGBE_NOT_IMPLEMENTED;
low_thresh_delta = ((ets_cfg & IXGBE_ETS_LTHRES_DELTA_MASK) >>
IXGBE_ETS_LTHRES_DELTA_SHIFT);
num_sensors = (ets_cfg & IXGBE_ETS_NUM_SENSORS_MASK);
for (i = 0; i < num_sensors; i++) {
offset = ets_offset + 1 + i;
if (hw->eeprom.ops.read(hw, offset, &ets_sensor)) {
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed",
offset);
continue;
}
sensor_index = ((ets_sensor & IXGBE_ETS_DATA_INDEX_MASK) >>
IXGBE_ETS_DATA_INDEX_SHIFT);
sensor_location = ((ets_sensor & IXGBE_ETS_DATA_LOC_MASK) >>
IXGBE_ETS_DATA_LOC_SHIFT);
therm_limit = ets_sensor & IXGBE_ETS_DATA_HTHRESH_MASK;
hw->phy.ops.write_i2c_byte(hw,
ixgbe_emc_therm_limit[sensor_index],
IXGBE_I2C_THERMAL_SENSOR_ADDR, therm_limit);
if ((i < IXGBE_MAX_SENSORS) && (sensor_location != 0)) {
data->sensor[i].location = sensor_location;
data->sensor[i].caution_thresh = therm_limit;
data->sensor[i].max_op_thresh = therm_limit -
low_thresh_delta;
}
}
return status;
eeprom_err:
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed", offset);
return IXGBE_NOT_IMPLEMENTED;
}
/**
* ixgbe_bypass_rw_generic - Bit bang data into by_pass FW
*

14
sys/dev/ixgbe/ixgbe_common.h
View File

@ -43,12 +43,10 @@
IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
} while (0)
#define IXGBE_REMOVED(a) (0)
#if !defined(NO_READ_PBA_RAW) || !defined(NO_WRITE_PBA_RAW)
struct ixgbe_pba {
u16 word[2];
u16 *pba_block;
};
#endif
void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map);
@ -180,6 +178,18 @@ extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
bool ixgbe_mng_present(struct ixgbe_hw *hw);
bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8
#define IXGBE_EMC_INTERNAL_DATA 0x00
#define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20
#define IXGBE_EMC_DIODE1_DATA 0x01
#define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19
#define IXGBE_EMC_DIODE2_DATA 0x23
#define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A
#define IXGBE_EMC_DIODE3_DATA 0x2A
#define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30
s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver);
void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,

20
sys/dev/ixgbe/ixgbe_dcb.c
View File

@ -409,10 +409,8 @@ s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count);
break;
#endif
default:
break;
}
@ -440,10 +438,8 @@ s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count);
break;
#endif
default:
break;
}
@ -482,11 +478,9 @@ s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *hw,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ret = ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwgid,
tsa, map);
break;
#endif
default:
break;
}
@ -524,11 +518,9 @@ s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *hw,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,
bwgid, tsa);
break;
#endif
default:
break;
}
@ -568,12 +560,10 @@ s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *hw,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max,
bwgid, tsa,
map);
break;
#endif
default:
break;
}
@ -606,10 +596,8 @@ s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *hw,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);
break;
#endif
default:
break;
}
@ -635,10 +623,8 @@ s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw)
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ret = ixgbe_dcb_config_tc_stats_82599(hw, NULL);
break;
#endif
default:
break;
}
@ -683,7 +669,6 @@ s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ixgbe_dcb_config_82599(hw, dcb_config);
ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->link_speed,
refill, max, bwgid,
@ -691,7 +676,6 @@ s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw,
ixgbe_dcb_config_tc_stats_82599(hw, dcb_config);
break;
#endif
default:
break;
}
@ -718,10 +702,8 @@ s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw, u8 pfc_en, u8 *map)
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);
break;
#endif
default:
break;
}
@ -744,7 +726,6 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
#if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id,
tsa, map);
ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id,
@ -752,7 +733,6 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max,
ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id,
tsa, map);
break;
#endif
default:
break;
}

116
sys/dev/ixgbe/ixgbe_mbx.c
View File

@ -36,6 +36,118 @@
#include "ixgbe_type.h"
#include "ixgbe_mbx.h"
/**
* ixgbe_read_mbx - Reads a message from the mailbox
* @hw: pointer to the HW structure
* @msg: The message buffer
* @size: Length of buffer
* @mbx_id: id of mailbox to read
*
* returns SUCCESS if it successfully read message from buffer
**/
s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
{
struct ixgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = IXGBE_ERR_MBX;
DEBUGFUNC("ixgbe_read_mbx");
/* limit read to size of mailbox */
if (size > mbx->size)
size = mbx->size;
if (mbx->ops.read)
ret_val = mbx->ops.read(hw, msg, size, mbx_id);
return ret_val;
}
/**
* ixgbe_write_mbx - Write a message to the mailbox
* @hw: pointer to the HW structure
* @msg: The message buffer
* @size: Length of buffer
* @mbx_id: id of mailbox to write
*
* returns SUCCESS if it successfully copied message into the buffer
**/
s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
{
struct ixgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = IXGBE_SUCCESS;
DEBUGFUNC("ixgbe_write_mbx");
if (size > mbx->size) {
ret_val = IXGBE_ERR_MBX;
ERROR_REPORT2(IXGBE_ERROR_ARGUMENT,
"Invalid mailbox message size %d", size);
} else if (mbx->ops.write)
ret_val = mbx->ops.write(hw, msg, size, mbx_id);
return ret_val;
}
/**
* ixgbe_check_for_msg - checks to see if someone sent us mail
* @hw: pointer to the HW structure
* @mbx_id: id of mailbox to check
*
* returns SUCCESS if the Status bit was found or else ERR_MBX
**/
s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
{
struct ixgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = IXGBE_ERR_MBX;
DEBUGFUNC("ixgbe_check_for_msg");
if (mbx->ops.check_for_msg)
ret_val = mbx->ops.check_for_msg(hw, mbx_id);
return ret_val;
}
/**
* ixgbe_check_for_ack - checks to see if someone sent us ACK
* @hw: pointer to the HW structure
* @mbx_id: id of mailbox to check
*
* returns SUCCESS if the Status bit was found or else ERR_MBX
**/
s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
{
struct ixgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = IXGBE_ERR_MBX;
DEBUGFUNC("ixgbe_check_for_ack");
if (mbx->ops.check_for_ack)
ret_val = mbx->ops.check_for_ack(hw, mbx_id);
return ret_val;
}
/**
* ixgbe_check_for_rst - checks to see if other side has reset
* @hw: pointer to the HW structure
* @mbx_id: id of mailbox to check
*
* returns SUCCESS if the Status bit was found or else ERR_MBX
**/
s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
{
struct ixgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = IXGBE_ERR_MBX;
DEBUGFUNC("ixgbe_check_for_rst");
if (mbx->ops.check_for_rst)
ret_val = mbx->ops.check_for_rst(hw, mbx_id);
return ret_val;
}
/**
* ixgbe_poll_for_msg - Wait for message notification
* @hw: pointer to the HW structure
@ -110,7 +222,7 @@ static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
* returns SUCCESS if it successfully received a message notification and
* copied it into the receive buffer.
**/
static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
u16 mbx_id)
{
struct ixgbe_mbx_info *mbx = &hw->mbx;
@ -140,7 +252,7 @@ static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
* returns SUCCESS if it successfully copied message into the buffer and
* received an ack to that message within delay * timeout period
**/
static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
u16 mbx_id)
{
struct ixgbe_mbx_info *mbx = &hw->mbx;

7
sys/dev/ixgbe/ixgbe_mbx.h
View File

@ -153,6 +153,13 @@ enum ixgbevf_xcast_modes {
#define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */
#define IXGBE_VF_MBX_INIT_DELAY 500 /* microseconds between retries */
s32 ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16);
s32 ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16);
s32 ixgbe_read_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
s32 ixgbe_write_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
s32 ixgbe_check_for_msg(struct ixgbe_hw *, u16);
s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16);
s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16);
void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw);
void ixgbe_init_mbx_params_vf(struct ixgbe_hw *);
void ixgbe_init_mbx_params_pf(struct ixgbe_hw *);

11
sys/dev/ixgbe/ixgbe_phy.c
View File

@ -1536,7 +1536,10 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
status = IXGBE_SUCCESS;
} else {
if (hw->allow_unsupported_sfp == true) {
EWARN(hw, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules.\n");
EWARN(hw,
"WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. "
"Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. "
"Intel Corporation is not responsible for any harm caused by using untested modules.\n");
status = IXGBE_SUCCESS;
} else {
DEBUGOUT("SFP+ module not supported\n");
@ -1789,7 +1792,10 @@ s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw)
status = IXGBE_SUCCESS;
} else {
if (hw->allow_unsupported_sfp == true) {
EWARN(hw, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules.\n");
EWARN(hw,
"WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. "
"Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. "
"Intel Corporation is not responsible for any harm caused by using untested modules.\n");
status = IXGBE_SUCCESS;
} else {
DEBUGOUT("QSFP module not supported\n");
@ -2571,7 +2577,6 @@ static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)
{
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
bool data;
UNREFERENCED_1PARAMETER(hw);
DEBUGFUNC("ixgbe_get_i2c_data");

2
sys/dev/ixgbe/ixgbe_phy.h
View File

@ -147,10 +147,8 @@
#define IXGBE_I2C_T_SU_STO 4
#define IXGBE_I2C_T_BUF 5
#ifndef IXGBE_SFP_DETECT_RETRIES
#define IXGBE_SFP_DETECT_RETRIES 10
#endif /* IXGBE_SFP_DETECT_RETRIES */
#define IXGBE_TN_LASI_STATUS_REG 0x9005
#define IXGBE_TN_LASI_STATUS_TEMP_ALARM 0x0008

52
sys/dev/ixgbe/ixgbe_type.h
View File

@ -48,8 +48,8 @@
*
* - IXGBE_ERROR_POLLING
* This category is for errors related to polling/timeout issues and should be
* used in any case where the timeout occurred, or a failure to obtain a lock, or
* failure to receive data within the time limit.
* used in any case where the timeout occurred, or a failure to obtain a lock,
* or failure to receive data within the time limit.
*
* - IXGBE_ERROR_CAUTION
* This category should be used for reporting issues that may be the cause of
@ -157,7 +157,7 @@
#define IXGBE_DEV_ID_X550EM_X_VF 0x15A8
#define IXGBE_DEV_ID_X550EM_X_VF_HV 0x15A9
#define IXGBE_CAT(r,m) IXGBE_##r##m
#define IXGBE_CAT(r, m) IXGBE_##r##m
#define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])
@ -284,6 +284,26 @@
#define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OE_N_EN)
#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500
#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8
#define IXGBE_EMC_INTERNAL_DATA 0x00
#define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20
#define IXGBE_EMC_DIODE1_DATA 0x01
#define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19
#define IXGBE_EMC_DIODE2_DATA 0x23
#define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A
#define IXGBE_MAX_SENSORS 3
struct ixgbe_thermal_diode_data {
u8 location;
u8 temp;
u8 caution_thresh;
u8 max_op_thresh;
};
struct ixgbe_thermal_sensor_data {
struct ixgbe_thermal_diode_data sensor[IXGBE_MAX_SENSORS];
};
#define NVM_OROM_OFFSET 0x17
@ -2358,6 +2378,20 @@ enum {
#define IXGBE_ALT_MAC_ADDR_PTR 0x37
#define IXGBE_FREE_SPACE_PTR 0X3E
/* External Thermal Sensor Config */
#define IXGBE_ETS_CFG 0x26
#define IXGBE_ETS_LTHRES_DELTA_MASK 0x07C0
#define IXGBE_ETS_LTHRES_DELTA_SHIFT 6
#define IXGBE_ETS_TYPE_MASK 0x0038
#define IXGBE_ETS_TYPE_SHIFT 3
#define IXGBE_ETS_TYPE_EMC 0x000
#define IXGBE_ETS_NUM_SENSORS_MASK 0x0007
#define IXGBE_ETS_DATA_LOC_MASK 0x3C00
#define IXGBE_ETS_DATA_LOC_SHIFT 10
#define IXGBE_ETS_DATA_INDEX_MASK 0x0300
#define IXGBE_ETS_DATA_INDEX_SHIFT 8
#define IXGBE_ETS_DATA_HTHRESH_MASK 0x00FF
#define IXGBE_SAN_MAC_ADDR_PTR 0x28
#define IXGBE_DEVICE_CAPS 0x2C
#define IXGBE_82599_SERIAL_NUMBER_MAC_ADDR 0x11
@ -2412,9 +2446,7 @@ enum {
#define IXGBE_EEPROM_CTRL_2 1 /* EEPROM CTRL word 2 */
#define IXGBE_EEPROM_CCD_BIT 2
#ifndef IXGBE_EEPROM_GRANT_ATTEMPTS
#define IXGBE_EEPROM_GRANT_ATTEMPTS 1000 /* EEPROM attempts to gain grant */
#endif
/* Number of 5 microseconds we wait for EERD read and
* EERW write to complete */
@ -3932,7 +3964,6 @@ struct ixgbe_mac_operations {
s32 (*get_fcoe_boot_status)(struct ixgbe_hw *, u16 *);
s32 (*stop_adapter)(struct ixgbe_hw *);
s32 (*get_bus_info)(struct ixgbe_hw *);
s32 (*negotiate_api_version)(struct ixgbe_hw *, int);
void (*set_lan_id)(struct ixgbe_hw *);
s32 (*read_analog_reg8)(struct ixgbe_hw*, u32, u8*);
s32 (*write_analog_reg8)(struct ixgbe_hw*, u32, u8);
@ -3945,6 +3976,7 @@ struct ixgbe_mac_operations {
void (*init_swfw_sync)(struct ixgbe_hw *);
s32 (*prot_autoc_read)(struct ixgbe_hw *, bool *, u32 *);
s32 (*prot_autoc_write)(struct ixgbe_hw *, u32, bool);
s32 (*negotiate_api_version)(struct ixgbe_hw *hw, int api);
/* Link */
void (*disable_tx_laser)(struct ixgbe_hw *);
@ -3980,17 +4012,17 @@ struct ixgbe_mac_operations {
ixgbe_mc_addr_itr);
s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32,
ixgbe_mc_addr_itr, bool clear);
s32 (*update_xcast_mode)(struct ixgbe_hw *, int);
s32 (*enable_mc)(struct ixgbe_hw *);
s32 (*disable_mc)(struct ixgbe_hw *);
s32 (*clear_vfta)(struct ixgbe_hw *);
s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool, bool);
s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, u32 *, u32,
bool);
s32 (*set_rlpml)(struct ixgbe_hw *, u16);
s32 (*init_uta_tables)(struct ixgbe_hw *);
void (*set_mac_anti_spoofing)(struct ixgbe_hw *, bool, int);
void (*set_vlan_anti_spoofing)(struct ixgbe_hw *, bool, int);
s32 (*update_xcast_mode)(struct ixgbe_hw *, int);
s32 (*set_rlpml)(struct ixgbe_hw *, u16);
/* Flow Control */
s32 (*fc_enable)(struct ixgbe_hw *);
@ -4000,6 +4032,8 @@ struct ixgbe_mac_operations {
/* Manageability interface */
s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8, u16,
const char *);
s32 (*get_thermal_sensor_data)(struct ixgbe_hw *);
s32 (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw);
s32 (*bypass_rw) (struct ixgbe_hw *hw, u32 cmd, u32 *status);
bool (*bypass_valid_rd) (u32 in_reg, u32 out_reg);
s32 (*bypass_set) (struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
@ -4107,6 +4141,8 @@ struct ixgbe_mac_info {
bool orig_link_settings_stored;
bool autotry_restart;
u8 flags;
struct ixgbe_thermal_sensor_data thermal_sensor_data;
bool thermal_sensor_enabled;
struct ixgbe_dmac_config dmac_config;
bool set_lben;
u32 max_link_up_time;

4
sys/dev/ixgbe/ixgbe_vf.c
View File

@ -36,12 +36,8 @@
#include "ixgbe.h"
#ifndef IXGBE_VFWRITE_REG
#define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
#endif
#ifndef IXGBE_VFREAD_REG
#define IXGBE_VFREAD_REG IXGBE_READ_REG
#endif
/**
* ixgbe_init_ops_vf - Initialize the pointers for vf

2
sys/dev/ixgbe/ixgbe_x540.c
View File

@ -819,7 +819,7 @@ s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
* bits in the SW_FW_SYNC register.
*/
if (ixgbe_get_swfw_sync_semaphore(hw)) {
DEBUGOUT("Failed to get NVM sempahore and register semaphore while forcefully ignoring FW sempahore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n");
DEBUGOUT("Failed to get NVM semaphore and register semaphore while forcefully ignoring FW semaphore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n");
return IXGBE_ERR_SWFW_SYNC;
}
swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));

12
sys/dev/ixgbe/ixgbe_x550.c
View File

@ -619,6 +619,10 @@ s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)
* the pointers to NULL explicitly here to overwrite
* the values being set in the x540 function.
*/
/* Thermal sensor not supported in x550EM */
mac->ops.get_thermal_sensor_data = NULL;
mac->ops.init_thermal_sensor_thresh = NULL;
mac->thermal_sensor_enabled = false;
/* Bypass not supported in x550EM */
mac->ops.bypass_rw = NULL;
@ -1135,7 +1139,7 @@ s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u32 data)
{
u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
u32 command, error __unused;
u32 command, error;
s32 ret;
ret = ixgbe_acquire_swfw_semaphore(hw, gssr);
@ -1181,7 +1185,7 @@ s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u32 *data)
{
u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
u32 command, error __unused;
u32 command, error;
s32 ret;
ret = ixgbe_acquire_swfw_semaphore(hw, gssr);
@ -2716,7 +2720,7 @@ static s32 ixgbe_setup_sfi_x550a(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
* @speed: new link speed
* @autoneg_wait_to_complete: unused
*
* Configure the the integrated PHY for SFP support.
* Configure the integrated PHY for SFP support.
**/
s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
@ -3688,7 +3692,7 @@ u64 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw)
physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX;
break;
case ixgbe_phy_ext_1g_t:
physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_T;
physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T;
break;
default:
break;