Various assembly fixes mostly in the form of using the "+" modifier for

output operands to mark them as both input and output rather than listing
operands twice.

Reviewed by:	bde
This commit is contained in:
John Baldwin 2001-12-18 08:54:39 +00:00
parent e4e991e117
commit 3f9a462fb9
4 changed files with 43 additions and 43 deletions

View File

@ -71,7 +71,7 @@ bsfl(u_int mask)
{ {
u_int result; u_int result;
__asm __volatile("bsfl %0,%0" : "=r" (result) : "0" (mask)); __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
return (result); return (result);
} }
@ -80,7 +80,7 @@ bsrl(u_int mask)
{ {
u_int result; u_int result;
__asm __volatile("bsrl %0,%0" : "=r" (result) : "0" (mask)); __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
return (result); return (result);
} }
@ -198,8 +198,8 @@ static __inline void
insb(u_int port, void *addr, size_t cnt) insb(u_int port, void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; insb" __asm __volatile("cld; rep; insb"
: "=D" (addr), "=c" (cnt) : "+D" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port) : "d" (port)
: "memory"); : "memory");
} }
@ -207,8 +207,8 @@ static __inline void
insw(u_int port, void *addr, size_t cnt) insw(u_int port, void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; insw" __asm __volatile("cld; rep; insw"
: "=D" (addr), "=c" (cnt) : "+D" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port) : "d" (port)
: "memory"); : "memory");
} }
@ -216,8 +216,8 @@ static __inline void
insl(u_int port, void *addr, size_t cnt) insl(u_int port, void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; insl" __asm __volatile("cld; rep; insl"
: "=D" (addr), "=c" (cnt) : "+D" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port) : "d" (port)
: "memory"); : "memory");
} }
@ -321,24 +321,24 @@ static __inline void
outsb(u_int port, const void *addr, size_t cnt) outsb(u_int port, const void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; outsb" __asm __volatile("cld; rep; outsb"
: "=S" (addr), "=c" (cnt) : "+S" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port)); : "d" (port));
} }
static __inline void static __inline void
outsw(u_int port, const void *addr, size_t cnt) outsw(u_int port, const void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; outsw" __asm __volatile("cld; rep; outsw"
: "=S" (addr), "=c" (cnt) : "+S" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port)); : "d" (port));
} }
static __inline void static __inline void
outsl(u_int port, const void *addr, size_t cnt) outsl(u_int port, const void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; outsl" __asm __volatile("cld; rep; outsl"
: "=S" (addr), "=c" (cnt) : "+S" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port)); : "d" (port));
} }
static __inline void static __inline void

View File

@ -71,7 +71,7 @@ bsfl(u_int mask)
{ {
u_int result; u_int result;
__asm __volatile("bsfl %0,%0" : "=r" (result) : "0" (mask)); __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
return (result); return (result);
} }
@ -80,7 +80,7 @@ bsrl(u_int mask)
{ {
u_int result; u_int result;
__asm __volatile("bsrl %0,%0" : "=r" (result) : "0" (mask)); __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
return (result); return (result);
} }
@ -198,8 +198,8 @@ static __inline void
insb(u_int port, void *addr, size_t cnt) insb(u_int port, void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; insb" __asm __volatile("cld; rep; insb"
: "=D" (addr), "=c" (cnt) : "+D" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port) : "d" (port)
: "memory"); : "memory");
} }
@ -207,8 +207,8 @@ static __inline void
insw(u_int port, void *addr, size_t cnt) insw(u_int port, void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; insw" __asm __volatile("cld; rep; insw"
: "=D" (addr), "=c" (cnt) : "+D" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port) : "d" (port)
: "memory"); : "memory");
} }
@ -216,8 +216,8 @@ static __inline void
insl(u_int port, void *addr, size_t cnt) insl(u_int port, void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; insl" __asm __volatile("cld; rep; insl"
: "=D" (addr), "=c" (cnt) : "+D" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port) : "d" (port)
: "memory"); : "memory");
} }
@ -321,24 +321,24 @@ static __inline void
outsb(u_int port, const void *addr, size_t cnt) outsb(u_int port, const void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; outsb" __asm __volatile("cld; rep; outsb"
: "=S" (addr), "=c" (cnt) : "+S" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port)); : "d" (port));
} }
static __inline void static __inline void
outsw(u_int port, const void *addr, size_t cnt) outsw(u_int port, const void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; outsw" __asm __volatile("cld; rep; outsw"
: "=S" (addr), "=c" (cnt) : "+S" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port)); : "d" (port));
} }
static __inline void static __inline void
outsl(u_int port, const void *addr, size_t cnt) outsl(u_int port, const void *addr, size_t cnt)
{ {
__asm __volatile("cld; rep; outsl" __asm __volatile("cld; rep; outsl"
: "=S" (addr), "=c" (cnt) : "+S" (addr), "+c" (cnt)
: "0" (addr), "1" (cnt), "d" (port)); : "d" (port));
} }
static __inline void static __inline void

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@ -72,7 +72,7 @@ __END_DECLS
static __inline __uint32_t static __inline __uint32_t
__uint16_swap_uint32(__uint32_t __x) __uint16_swap_uint32(__uint32_t __x)
{ {
__asm ("rorl $16, %1" : "=r" (__x) : "0" (__x)); __asm ("rorl $16, %0" : "+r" (__x));
return __x; return __x;
} }
@ -81,12 +81,12 @@ static __inline __uint32_t
__uint8_swap_uint32(__uint32_t __x) __uint8_swap_uint32(__uint32_t __x)
{ {
#if defined(_KERNEL) && (defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)) && !defined(I386_CPU) #if defined(_KERNEL) && (defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)) && !defined(I386_CPU)
__asm ("bswap %0" : "=r" (__x) : "0" (__x)); __asm ("bswap %0" : "+r" (__x));
#else #else
__asm ("xchgb %h1, %b1\n\t" __asm ("xchgb %h0, %b0\n\t"
"rorl $16, %1\n\t" "rorl $16, %0\n\t"
"xchgb %h1, %b1" "xchgb %h0, %b0"
: "=q" (__x) : "0" (__x)); : "+q" (__x));
#endif #endif
return __x; return __x;
} }
@ -94,7 +94,7 @@ __uint8_swap_uint32(__uint32_t __x)
static __inline __uint16_t static __inline __uint16_t
__uint8_swap_uint16(__uint16_t __x) __uint8_swap_uint16(__uint16_t __x)
{ {
__asm ("xchgb %h1, %b1" : "=q" (__x) : "0" (__x)); __asm ("xchgb %h0, %b0" : "+q" (__x));
return __x; return __x;
} }

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@ -59,9 +59,9 @@ in_cksum_hdr(const struct ip *ip)
{ {
register u_int sum = 0; register u_int sum = 0;
#define ADD(n) __asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (ip)) #define ADD(n) __asm("addl " #n "(%1), %0" : "+r" (sum) : "r" (ip))
#define ADDC(n) __asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (ip)) #define ADDC(n) __asm("adcl " #n "(%1), %0" : "+r" (sum) : "r" (ip))
#define MOP __asm("adcl $0, %0" : "=r" (sum) : "0" (sum)) #define MOP __asm("adcl $0, %0" : "+r" (sum))
ADD(0); ADD(0);
ADDC(4); ADDC(4);
@ -91,8 +91,8 @@ static __inline u_short
in_addword(u_short sum, u_short b) in_addword(u_short sum, u_short b)
{ {
__asm("addw %2, %0" : "=r" (sum) : "0" (sum), "r" (b)); __asm("addw %1, %0" : "+r" (sum) : "r" (b));
__asm("adcw $0, %0" : "=r" (sum) : "0" (sum)); __asm("adcw $0, %0" : "+r" (sum));
return (sum); return (sum);
} }
@ -101,9 +101,9 @@ static __inline u_short
in_pseudo(u_int sum, u_int b, u_int c) in_pseudo(u_int sum, u_int b, u_int c)
{ {
__asm("addl %2, %0" : "=r" (sum) : "0" (sum), "r" (b)); __asm("addl %1, %0" : "+r" (sum) : "r" (b));
__asm("adcl %2, %0" : "=r" (sum) : "0" (sum), "r" (c)); __asm("adcl %1, %0" : "+r" (sum) : "r" (c));
__asm("adcl $0, %0" : "=r" (sum) : "0" (sum)); __asm("adcl $0, %0" : "+r" (sum));
sum = (sum & 0xffff) + (sum >> 16); sum = (sum & 0xffff) + (sum >> 16);
if (sum > 0xffff) if (sum > 0xffff)