We should also save and restore the MXCSR as on amd64, but detecting
whether the CPU supports SSE or not here is rather odious.
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@ -70,7 +70,6 @@ ENTRY(___longjmp)
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movl 12(%edx),%ebp
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movl 16(%edx),%esi
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movl 20(%edx),%edi
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fninit
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fldcw 24(%edx)
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testl %eax,%eax
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jnz 1f
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@ -90,7 +90,6 @@ ENTRY(__longjmp)
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movl 12(%edx),%ebp
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movl 16(%edx),%esi
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movl 20(%edx),%edi
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fninit
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fldcw 24(%edx)
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testl %eax,%eax
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jnz 1f
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