e1000: Re-arm link changes
A change to MSI-X link handler was somehow causing issues on MSI-based em(4) NICs. Revert the change based on user reports and testing. PR: 258551 Reported by: Franco Fichtner <franco@opnsense.org>, t_uemura@macome.co.jp Reviewed by: markj, Franco Fichtner <franco@opnsense.org> Tested by: t_uemura@macome.co.jp MFC after: 1 day
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@ -1495,7 +1495,6 @@ em_msix_link(void *arg)
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{
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struct e1000_softc *sc = arg;
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u32 reg_icr;
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bool notlink = false;
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++sc->link_irq;
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MPASS(sc->hw.back != NULL);
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@ -1506,17 +1505,14 @@ em_msix_link(void *arg)
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if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))
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em_handle_link(sc->ctx);
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else
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notlink = true;
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/* Re-arm for other/spurious interrupts */
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if (notlink && sc->hw.mac.type >= igb_mac_min) {
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/* Re-arm unconditionally */
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if (sc->hw.mac.type >= igb_mac_min) {
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E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC);
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E1000_WRITE_REG(&sc->hw, E1000_EIMS, sc->link_mask);
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} else if (sc->hw.mac.type == e1000_82574) {
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if (notlink)
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E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC |
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E1000_IMS_OTHER);
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E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC |
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E1000_IMS_OTHER);
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/*
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* Because we must read the ICR for this interrupt it may
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* clear other causes using autoclear, for this reason we
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@ -1524,7 +1520,8 @@ em_msix_link(void *arg)
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*/
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if (reg_icr)
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E1000_WRITE_REG(&sc->hw, E1000_ICS, sc->ims);
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}
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} else
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E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC);
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return (FILTER_HANDLED);
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}
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@ -1873,13 +1870,6 @@ em_if_update_admin_status(if_ctx_t ctx)
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if (hw->mac.type < em_mac_min)
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lem_smartspeed(sc);
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else if (hw->mac.type >= igb_mac_min &&
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sc->intr_type == IFLIB_INTR_MSIX) {
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E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC);
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E1000_WRITE_REG(&sc->hw, E1000_EIMS, sc->link_mask);
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} else if (hw->mac.type == e1000_82574 &&
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sc->intr_type == IFLIB_INTR_MSIX)
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E1000_WRITE_REG(hw, E1000_IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
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}
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static void
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