sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
This commit is contained in:
Pedro F. Giffuni
parent
7860c0c384
commit
453130d9bf
@ -555,7 +555,7 @@ aac_cam_fix_inquiry(struct aac_softc *sc, union ccb *ccb)
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/*
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* Some aac(4) adapters will always report that a direct
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* access device is offline in response to a INQUIRY
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* command that does not retreive vital product data.
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* command that does not retrieve vital product data.
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* Force the qualifier to connected so that upper layers
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* correctly recognize that a disk is present.
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*/
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@ -590,7 +590,7 @@ aac_cam_complete(struct aac_command *cm)
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} else {
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/*
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* The SRB error codes just happen to match the CAM error
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* codes. How convienient!
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* codes. How convenient!
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*/
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ccb->ccb_h.status = srbr->srb_status;
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@ -351,7 +351,7 @@ aac_print_aif(struct aac_softc *sc, struct aac_aif_command *aif)
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device_printf(sc->aac_dev, "(ClusterEvent) event %d\n",
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aif->data.EN.data.ECLE.eventType);
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break;
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case AifEnDiskSetEvent: /* A disk set event occured. */
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case AifEnDiskSetEvent: /* A disk set event occurred. */
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device_printf(sc->aac_dev, "(DiskSetEvent) event %d "
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"diskset %jd creator %jd\n",
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aif->data.EN.data.EDS.eventType,
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@ -88,7 +88,7 @@ DRIVER_MODULE(aacd, aac, aac_disk_driver, aac_disk_devclass, NULL, NULL);
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* Handle open from generic layer.
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*
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* This is called by the diskslice code on first open in order to get the
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* basic device geometry paramters.
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* basic device geometry parameters.
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*/
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static int
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aac_disk_open(struct disk *dp)
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@ -886,7 +886,7 @@ typedef enum {
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AifEnSMARTEvent, /* SMART Event */
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AifEnBatteryNeedsRecond, /* The battery needs reconditioning */
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AifEnClusterEvent, /* Some cluster event */
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AifEnDiskSetEvent, /* A disk set event occured. */
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AifEnDiskSetEvent, /* A disk set event occurred. */
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AifEnContainerScsiEvent, /* a container event with no. and scsi id */
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AifEnPicBatteryEvent, /* An event gen. by pic_battery.c for an ABM */
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AifEnExpEvent, /* Exp. Event Type to replace CTPopUp messages */
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@ -1181,7 +1181,7 @@ aac_cam_complete(struct aac_command *cm)
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} else {
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/*
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* The SRB error codes just happen to match the CAM error
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* codes. How convienient!
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* codes. How convenient!
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*/
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ccb->ccb_h.status = srbr->srb_status;
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@ -265,7 +265,7 @@ aacraid_print_aif(struct aac_softc *sc, struct aac_aif_command *aif)
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device_printf(sc->aac_dev, "(ClusterEvent) event %d\n",
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aif->data.EN.data.ECLE.eventType);
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break;
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case AifEnDiskSetEvent: /* A disk set event occured. */
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case AifEnDiskSetEvent: /* A disk set event occurred. */
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device_printf(sc->aac_dev, "(DiskSetEvent) event %d "
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"diskset %jd creator %jd\n",
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aif->data.EN.data.EDS.eventType,
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@ -875,7 +875,7 @@ typedef enum {
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AifEnSMARTEvent, /* SMART Event */
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AifEnBatteryNeedsRecond, /* The battery needs reconditioning */
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AifEnClusterEvent, /* Some cluster event */
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AifEnDiskSetEvent, /* A disk set event occured. */
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AifEnDiskSetEvent, /* A disk set event occurred. */
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AifEnContainerScsiEvent, /* a container event with no. and scsi id */
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AifEnPicBatteryEvent, /* An event gen. by pic_battery.c for an ABM */
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AifEnExpEvent, /* Exp. Event Type to replace CTPopUp messages */
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@ -839,7 +839,7 @@ acpi_ibm_sysctl_init(struct acpi_ibm_softc *sc, int method)
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case ACPI_IBM_METHOD_BRIGHTNESS:
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case ACPI_IBM_METHOD_VOLUME:
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case ACPI_IBM_METHOD_MUTE:
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/* EC is required here, which was aready checked before */
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/* EC is required here, which was already checked before */
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return (TRUE);
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case ACPI_IBM_METHOD_THINKLIGHT:
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@ -1965,7 +1965,7 @@ acpi_probe_child(ACPI_HANDLE handle, UINT32 level, void *context, void **status)
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* Since we scan from \, be sure to skip system scope objects.
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* \_SB_ and \_TZ_ are defined in ACPICA as devices to work around
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* BIOS bugs. For example, \_SB_ is to allow \_SB_._INI to be run
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* during the intialization and \_TZ_ is to support Notify() on it.
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* during the initialization and \_TZ_ is to support Notify() on it.
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*/
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if (strcmp(handle_str, "\\_SB_") == 0 ||
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strcmp(handle_str, "\\_TZ_") == 0)
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@ -641,7 +641,7 @@ acpi_cpu_shutdown(device_t dev)
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disable_idle(device_get_softc(dev));
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/*
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* CPU devices are not truely detached and remain referenced,
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* CPU devices are not truly detached and remain referenced,
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* so their resources are not freed.
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*/
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@ -64,7 +64,7 @@ struct acpi_bif {
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char model[ACPI_CMBAT_MAXSTRLEN]; /* model identifier */
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char serial[ACPI_CMBAT_MAXSTRLEN]; /* Serial number */
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char type[ACPI_CMBAT_MAXSTRLEN]; /* Type */
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char oeminfo[ACPI_CMBAT_MAXSTRLEN]; /* OEM infomation */
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char oeminfo[ACPI_CMBAT_MAXSTRLEN]; /* OEM information */
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};
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struct acpi_bst {
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@ -633,7 +633,7 @@ adv_timeout(void *arg)
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* means that the driver attempts to clear only one error
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* condition at a time. In general, timeouts that occur
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* close together are related anyway, so there is no benefit
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* in attempting to handle errors in parrallel. Timeouts will
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* in attempting to handle errors in parallel. Timeouts will
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* be reinstated when the recovery process ends.
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*/
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adv_set_state(adv, ADV_IN_TIMEOUT);
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@ -1123,7 +1123,7 @@ adv_done(struct adv_softc *adv, union ccb *ccb, u_int done_stat,
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* from this initiator are in effect, but this
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* ignores multi-initiator setups and there is
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* evidence that the firmware gets its per-device
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* transaction counts screwed up occassionally.
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* transaction counts screwed up occasionally.
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*/
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ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
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if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
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@ -2060,7 +2060,7 @@ adv_reset_bus(struct adv_softc *adv, int initiate_bus_reset)
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/*offset*/0, ADV_TRANS_CUR);
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ADV_OUTW(adv, ADV_REG_PROG_COUNTER, ADV_MCODE_START_ADDR);
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/* Tell the XPT layer that a bus reset occured */
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/* Tell the XPT layer that a bus reset occurred */
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if (adv->path != NULL)
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xpt_async(AC_BUS_RESET, adv->path, NULL);
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@ -228,7 +228,7 @@ struct adv_ccb_info {
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#define ADV_CSW_SCSI_RESET_LATCH 0x0002
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#define ADV_CSW_INT_PENDING 0x0001
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/*
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* XXX I don't understand the relevence of the naming
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* XXX I don't understand the relevance of the naming
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* convention change here. What does CIW stand for?
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* Perhaps this is to differentiate read and write
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* values?
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@ -590,7 +590,7 @@ struct adv_scsiq_1 {
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u_int8_t target_lun; /* LUN - taken from our xs */
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u_int32_t data_addr; /*
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* physical addres of first
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* physical address of first
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* (possibly only) segment
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* to transfer.
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*/
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@ -793,7 +793,7 @@ u_int16_t adv_read_lram_16(struct adv_softc *adv, u_int16_t addr);
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void adv_write_lram_16(struct adv_softc *adv, u_int16_t addr,
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u_int16_t value);
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/* Intialization */
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/* Initialization */
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int adv_find_signature(struct resource *res);
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void adv_lib_init(struct adv_softc *adv);
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@ -563,7 +563,7 @@ typedef enum {
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ADW_FENONE = 0x0000,
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ADW_ULTRA = 0x0001, /* Supports 20MHz Transfers */
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ADW_ULTRA2 = 0x0002, /* Supports 40MHz Transfers */
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ADW_DT = 0x0004, /* Supports Double Transistion REQ/ACK*/
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ADW_DT = 0x0004, /* Supports Double Transition REQ/ACK */
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ADW_WIDE = 0x0008, /* Wide Channel */
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ADW_ASC3550_FE = ADW_ULTRA,
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ADW_ASC38C0800_FE = ADW_ULTRA2,
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@ -801,7 +801,7 @@ carrierbtov(struct adw_softc *adw, u_int32_t baddr)
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return (carrierbotov(adw, baddr - adw->carrier_busbase));
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}
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/* Intialization */
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/* Initialization */
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int adw_find_signature(struct adw_softc *adw);
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void adw_reset_chip(struct adw_softc *adw);
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int adw_reset_bus(struct adw_softc *adw);
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@ -301,7 +301,7 @@ aha_probe(struct aha_softc* aha)
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* This really should be replaced with the esetup command, since
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* that appears to be more reliable. This becomes more and more
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* true over time as we discover more cards that don't read the
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* geometry register consistantly.
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* geometry register consistently.
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*/
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if (aha->boardid <= 0x42) {
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/* Wait 10ms before reading */
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@ -1161,7 +1161,7 @@ ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_co
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struct ccb_hdr *ccb_h;
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cam_status error;
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/* Notify all clients that a BDR occured */
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/* Notify all clients that a BDR occurred */
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error = xpt_create_path(&path, /*periph*/NULL,
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cam_sim_path(aha->sim), accb->hccb.target,
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CAM_LUN_WILDCARD);
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@ -1204,7 +1204,7 @@ ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_co
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break;
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case AMBI_ABORT:
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case AMBI_ERROR:
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/* An error occured */
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/* An error occurred */
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if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
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csio->resid = 0;
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else
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@ -1747,7 +1747,7 @@ ahatimeout(void *arg)
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* means that the driver attempts to clear only one error
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* condition at a time. In general, timeouts that occur
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* close together are related anyway, so there is no benefit
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* in attempting to handle errors in parrallel. Timeouts will
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* in attempting to handle errors in parallel. Timeouts will
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* be reinstated when the recovery process ends.
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*/
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if ((accb->flags & ACCB_DEVICE_RESET) == 0) {
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@ -885,7 +885,7 @@ ahbintr_locked(struct ahb_softc *ahb)
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xpt_async(AC_BUS_RESET, ahb->path, NULL);
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break;
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}
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printf("Unsupported initiator selection AEN occured\n");
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printf("Unsupported initiator selection AEN occurred\n");
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break;
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case INTSTAT_IMMED_OK:
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case INTSTAT_IMMED_ERR:
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@ -1235,7 +1235,7 @@ ahbtimeout(void *arg)
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* means that the driver attempts to clear only one error
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* condition at a time. In general, timeouts that occur
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* close together are related anyway, so there is no benefit
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* in attempting to handle errors in parrallel. Timeouts will
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* in attempting to handle errors in parallel. Timeouts will
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* be reinstated when the recovery process ends.
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*/
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if ((ecb->state & ECB_DEVICE_RESET) == 0) {
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@ -64,7 +64,7 @@
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#define RSTBUS 0x10
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#define BUSDEF 0x0C4
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#define B0uS 0x00 /* give up bus immediatly */
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#define B0uS 0x00 /* give up bus immediately */
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#define B4uS 0x01 /* delay 4uSec. */
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#define B8uS 0x02 /* delay 8uSec. */
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@ -1303,7 +1303,7 @@ ahci_ch_intr_main(struct ahci_channel *ch, uint32_t istatus)
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err = 0;
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port = -1;
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}
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/* Complete all successfull commands. */
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/* Complete all successful commands. */
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ok = ch->rslots & ~cstatus;
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for (i = 0; i < ch->numslots; i++) {
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if ((ok >> i) & 1)
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@ -444,7 +444,7 @@ struct ahci_channel {
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int numtslotspd[16];/* Number of tagged slots per dev */
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int numhslots; /* Number of held slots */
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int recoverycmd; /* Our READ LOG active */
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int fatalerr; /* Fatal error happend */
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int fatalerr; /* Fatal error happened */
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int resetting; /* Hard-reset in progress. */
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int resetpolldiv; /* Hard-reset poll divider. */
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int listening; /* SUD bit is cleared. */
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@ -465,7 +465,7 @@ struct ahci_enclosure {
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device_t dev; /* Device handle */
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struct resource *r_memc; /* Control register */
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struct resource *r_memt; /* Transmit buffer */
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struct resource *r_memr; /* Recieve buffer */
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struct resource *r_memr; /* Receive buffer */
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struct cam_sim *sim;
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struct cam_path *path;
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struct mtx mtx; /* state lock */
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@ -202,7 +202,7 @@ alpm_attach(device_t dev)
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printf(" 55K");
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break;
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default:
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printf("unkown");
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printf("unknown");
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break;
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}
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printf("\n");
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@ -146,7 +146,7 @@ a_onchip_fifo_mem_core_read(struct resource *res, uint32_t off,
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return (val4);
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}
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/* The FIFO does an endian convertion, so we must not do it as well. */
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/* The FIFO does an endian conversion, so we must not do it as well. */
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/* XXX-BZ in fact we should do a htobe32 so le would be fine as well? */
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#define ATSE_TX_DATA_WRITE(sc, val4) \
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bus_write_4((sc)->atse_tx_mem_res, A_ONCHIP_FIFO_MEM_CORE_DATA, val4)
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@ -169,8 +169,8 @@ a_onchip_fifo_mem_core_read(struct resource *res, uint32_t off,
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A_ONCHIP_FIFO_MEM_CORE_STATUS_REG_FILL_LEVEL, \
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"RX_FILL", __func__, __LINE__)
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/* The FIFO does an endian convertion, so we must not do it as well. */
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/* XXX-BZ in fact we shoudl do a htobe32 so le would be fine as well? */
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/* The FIFO does an endian conversion, so we must not do it as well. */
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/* XXX-BZ in fact we should do a htobe32 so le would be fine as well? */
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#define ATSE_RX_DATA_READ(sc) \
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bus_read_4((sc)->atse_rx_mem_res, A_ONCHIP_FIFO_MEM_CORE_DATA)
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#define ATSE_RX_META_READ(sc) \
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@ -525,7 +525,7 @@ shutdown_out:
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/*
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* Bug-for-bug compatibility with Linux!
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* Some apps will send commands with inlen and outlen set to 0,
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* even though they expect data to be transfered to them from the
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* even though they expect data to be transferred to them from the
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* card. Linux accidentally allows this by allocating a 4KB
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* buffer for the transfer anyways, but it then throws it away
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* without copying it back to the app.
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@ -1784,7 +1784,7 @@ amr_start(struct amr_command *ac)
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/* Now we have a slot, we can map the command (unmapped in amr_complete). */
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if ((error = amr_mapcmd(ac)) == ENOMEM) {
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/*
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* Memroy resources are short, so free the slot and let this be tried
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* Memory resources are short, so free the slot and let this be tried
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* later.
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*/
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amr_freeslot(ac);
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@ -426,7 +426,7 @@ int an_alloc_memory(device_t dev, int rid, int size)
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}
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/*
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* Allocate a auxilary memory resource with the given resource id.
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* Allocate a auxiliary memory resource with the given resource id.
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*/
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int an_alloc_aux_memory(device_t dev, int rid, int size)
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{
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@ -276,7 +276,7 @@ struct an_reply {
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#define AN_EV_ALLOC 0x0008 /* async alloc/reclaim completed */
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#define AN_EV_TX_CPY 0x0400
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#define AN_EV_TX_EXC 0x0004 /* async xmit completed with failure */
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#define AN_EV_TX 0x0002 /* async xmit completed succesfully */
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#define AN_EV_TX 0x0002 /* async xmit completed successfully */
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#define AN_EV_RX 0x0001 /* async rx completed */
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#define AN_INTRS(x) \
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@ -650,7 +650,7 @@ asmc_init(device_t dev)
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goto nosms;
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/*
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* We are ready to recieve interrupts from the SMS.
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* We are ready to receive interrupts from the SMS.
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*/
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buf[0] = 0x01;
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ASMC_DPRINTF(("intok key\n"));
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@ -426,7 +426,7 @@ ata_default_registers(device_t dev)
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void
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ata_udelay(int interval)
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{
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/* for now just use DELAY, the timer/sleep subsytems are not there yet */
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/* for now just use DELAY, the timer/sleep subsystems are not there yet */
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if (1 || interval < (1000000/hz) || ata_delayed_attach)
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DELAY(interval);
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else
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@ -297,7 +297,7 @@ ata_pm_identify(device_t dev)
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/* get PM revision data */
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if (ch->hw.pm_read(dev, ATA_PM, 1, &pm_revision)) {
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device_printf(dev, "error getting PM revison data\n");
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device_printf(dev, "error getting PM revision data\n");
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return;
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}
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@ -103,7 +103,7 @@ ata_ite_chipinit(device_t dev)
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pci_write_config(dev, 0x56, 0x31, 1);
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ctlr->setmode = ata_ite_821x_setmode;
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/* No timing restrictions initally. */
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/* No timing restrictions initially. */
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ctlr->chipset_data = NULL;
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}
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ctlr->ch_attach = ata_ite_ch_attach;
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|
||||
@ -1807,7 +1807,7 @@ psmread(struct cdev *dev, struct uio *uio, int flag)
|
||||
if ((sc->state & PSM_VALID) == 0)
|
||||
return (EIO);
|
||||
|
||||
/* block until mouse activity occured */
|
||||
/* block until mouse activity occurred */
|
||||
s = spltty();
|
||||
while (sc->queue.count <= 0) {
|
||||
if (dev != sc->bdev) {
|
||||
@ -3008,7 +3008,7 @@ proc_synaptics(struct psm_softc *sc, packetbuf_t *pb, mousestatus_t *ms,
|
||||
if (synaction->queue_len < synaction->window_min)
|
||||
goto SYNAPTICS_END;
|
||||
|
||||
/* Is a scrolling action occuring? */
|
||||
/* Is a scrolling action occurring? */
|
||||
if (!synaction->in_taphold && !synaction->in_vscroll) {
|
||||
/*
|
||||
* A scrolling action must not conflict with a tap
|
||||
@ -3518,7 +3518,7 @@ psmsoftintr(void *arg)
|
||||
|
||||
case MOUSE_MODEL_NETSCROLL:
|
||||
/*
|
||||
* three addtional bytes encode buttons and
|
||||
* three additional bytes encode buttons and
|
||||
* wheel events
|
||||
*/
|
||||
ms.button |= (pb->ipacket[3] & MOUSE_PS2_BUTTON3DOWN) ?
|
||||
|
||||
@ -2361,7 +2361,7 @@ bce_nvram_erase_page(struct bce_softc *sc, u32 offset)
|
||||
BCE_NVM_COMMAND_DOIT;
|
||||
|
||||
/*
|
||||
* Clear the DONE bit separately, set the NVRAM adress to erase,
|
||||
* Clear the DONE bit separately, set the NVRAM address to erase,
|
||||
* and issue the erase command.
|
||||
*/
|
||||
REG_WR(sc, BCE_NVM_COMMAND, BCE_NVM_COMMAND_DONE);
|
||||
@ -7957,7 +7957,7 @@ bce_intr(void *xsc)
|
||||
goto bce_intr_exit;
|
||||
}
|
||||
|
||||
/* Ack the interrupt and stop others from occuring. */
|
||||
/* Ack the interrupt and stop others from occurring. */
|
||||
REG_WR(sc, BCE_PCICFG_INT_ACK_CMD,
|
||||
BCE_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM |
|
||||
BCE_PCICFG_INT_ACK_CMD_MASK_INT);
|
||||
|
||||
@ -6089,7 +6089,7 @@ struct l2_fhdr {
|
||||
/****************************************************************************/
|
||||
/* The following definitions refer to pre-defined locations in processor */
|
||||
/* memory space which allows the driver to enable particular functionality */
|
||||
/* within the firmware or read specfic information about the running */
|
||||
/* within the firmware or read specific information about the running */
|
||||
/* firmware. */
|
||||
/****************************************************************************/
|
||||
|
||||
@ -6174,7 +6174,7 @@ struct l2_fhdr {
|
||||
#define RX_IDX(x) ((x) & USABLE_RX_BD_PER_PAGE)
|
||||
|
||||
/*
|
||||
* To accomodate jumbo frames, the page chain should
|
||||
* To accommodate jumbo frames, the page chain should
|
||||
* be 4 times larger than the receive chain.
|
||||
*/
|
||||
#define DEFAULT_PG_PAGES (DEFAULT_RX_PAGES * 4)
|
||||
|
||||
@ -311,7 +311,7 @@
|
||||
/* SISO PA parameters are in the path0 spaces */
|
||||
#define SROM8_SISO 96
|
||||
|
||||
/* Legacy names for SISO PA paramters */
|
||||
/* Legacy names for SISO PA parameters */
|
||||
#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP)
|
||||
#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA)
|
||||
#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1)
|
||||
|
||||
@ -449,7 +449,7 @@ bhnd_alloc_resource_any(device_t dev, int type, int *rid, u_int flags)
|
||||
* BHND_BUS_ALLOC_RESOURCE.
|
||||
*
|
||||
* @retval 0 success
|
||||
* @retval non-zero an error occured while activating the resource.
|
||||
* @retval non-zero an error occurred while activating the resource.
|
||||
*/
|
||||
static inline int
|
||||
bhnd_activate_resource(device_t dev, int type, int rid,
|
||||
@ -469,7 +469,7 @@ bhnd_activate_resource(device_t dev, int type, int rid,
|
||||
* BHND_BUS_ALLOC_RESOURCE.
|
||||
*
|
||||
* @retval 0 success
|
||||
* @retval non-zero an error occured while activating the resource.
|
||||
* @retval non-zero an error occurred while activating the resource.
|
||||
*/
|
||||
static inline int
|
||||
bhnd_deactivate_resource(device_t dev, int type, int rid,
|
||||
@ -489,7 +489,7 @@ bhnd_deactivate_resource(device_t dev, int type, int rid,
|
||||
* BHND_ALLOC_RESOURCE.
|
||||
*
|
||||
* @retval 0 success
|
||||
* @retval non-zero an error occured while activating the resource.
|
||||
* @retval non-zero an error occurred while activating the resource.
|
||||
*/
|
||||
static inline int
|
||||
bhnd_release_resource(device_t dev, int type, int rid,
|
||||
|
||||
@ -421,14 +421,14 @@
|
||||
#define BHND_PKGID_BCM4314PCIE (8 | 2) /* 4314 QFN PCI (ARM-less) package id */
|
||||
#define BHND_PKGID_BCM4314SDIO_ARM (8 | 3) /* 4314 QFN SDIO (ARM-less) package id */
|
||||
#define BHND_PKGID_BCM4314SDIO_FPBGA (8 | 4) /* 4314 FpBGA SDIO package id */
|
||||
#define BHND_PKGID_BCM4314DEV (8 | 6) /* 4314 Developement package id */
|
||||
#define BHND_PKGID_BCM4314DEV (8 | 6) /* 4314 Development package id */
|
||||
|
||||
#define BHND_PKGID_BCM4707 1 /* 4707 package id */
|
||||
#define BHND_PKGID_BCM4708 2 /* 4708 package id */
|
||||
#define BHND_PKGID_BCM4709 0 /* 4709 package id */
|
||||
|
||||
#define BHND_PKGID_BCM4335_WLCSP (0x0) /* WLCSP Module/Mobile SDIO/HSIC. */
|
||||
#define BHND_PKGID_BCM4335_FCBGA (0x1) /* FCBGA PC/Embeded/Media PCIE/SDIO */
|
||||
#define BHND_PKGID_BCM4335_FCBGA (0x1) /* FCBGA PC/Embedded/Media PCIE/SDIO */
|
||||
#define BHND_PKGID_BCM4335_WLBGA (0x2) /* WLBGA COB/Mobile SDIO/HSIC. */
|
||||
#define BHND_PKGID_BCM4335_FCBGAD (0x3) /* FCBGA Debug Debug/Dev All if's. */
|
||||
#define BHND_PKGID_PKG_MASK_BCM4335 (0x3)
|
||||
@ -645,8 +645,8 @@
|
||||
#define BHND_BFL3_RCAL_WAR 0x00000008 /* acphy, rcal war active on this board (4335a0) */
|
||||
#define BHND_BFL3_TXGAINTBLID 0x00000070 /* acphy, txgain table id */
|
||||
#define BHND_BFL3_TXGAINTBLID_SHIFT 0x4 /* acphy, txgain table id shift bit */
|
||||
#define BHND_BFL3_TSSI_DIV_WAR 0x00000080 /* acphy, Seperate paparam for 20/40/80 */
|
||||
#define BHND_BFL3_TSSI_DIV_WAR_SHIFT 0x7 /* acphy, Seperate paparam for 20/40/80 shift bit */
|
||||
#define BHND_BFL3_TSSI_DIV_WAR 0x00000080 /* acphy, Separate paparam for 20/40/80 */
|
||||
#define BHND_BFL3_TSSI_DIV_WAR_SHIFT 0x7 /* acphy, Separate paparam for 20/40/80 shift bit */
|
||||
#define BHND_BFL3_FEMTBL_FROM_NVRAM 0x00000100 /* acphy, femctrl table is read from nvram */
|
||||
#define BHND_BFL3_FEMTBL_FROM_NVRAM_SHIFT 0x8 /* acphy, femctrl table is read from nvram */
|
||||
#define BHND_BFL3_AGC_CFG_2G 0x00000200 /* acphy, gain control configuration for 2G */
|
||||
|
||||
@ -1515,7 +1515,7 @@ bhndb_get_resource_list(device_t dev, device_t child)
|
||||
* Default bhndb(4) implementation of BHND_BUS_ACTIVATE_RESOURCE().
|
||||
*
|
||||
* For BHNDB_ADDRSPACE_NATIVE children, all resources may be assumed to
|
||||
* be actived by the bridge.
|
||||
* be activated by the bridge.
|
||||
*
|
||||
* For BHNDB_ADDRSPACE_BRIDGED children, attempts to activate a static register
|
||||
* window, a dynamic register window, or configures @p r as an indirect
|
||||
|
||||
@ -130,7 +130,7 @@ const struct bhndb_hw_priority bhndb_bcma_priority_table[] = {
|
||||
/*
|
||||
* Default Core Behavior
|
||||
*
|
||||
* All other cores are assumed to require effecient runtime access to
|
||||
* All other cores are assumed to require efficient runtime access to
|
||||
* the default device port, and if supported by the bus, an agent port.
|
||||
*/
|
||||
BHNDB_CLASS_PRIO(INVALID, -1, DEFAULT,
|
||||
@ -183,7 +183,7 @@ const struct bhndb_hw_priority bhndb_siba_priority_table[] = {
|
||||
/*
|
||||
* Default Core Behavior
|
||||
*
|
||||
* All other cores are assumed to require effecient runtime access to
|
||||
* All other cores are assumed to require efficient runtime access to
|
||||
* the device port.
|
||||
*/
|
||||
BHNDB_CLASS_PRIO(INVALID, -1, DEFAULT,
|
||||
|
||||
@ -420,7 +420,7 @@ siba_register_addrspaces(device_t dev, struct siba_devinfo *di,
|
||||
|
||||
/* Region numbers must be assigned in order, but our siba address
|
||||
* space IDs may be sparsely allocated; thus, we track
|
||||
* the region index seperately. */
|
||||
* the region index separately. */
|
||||
region_num = 0;
|
||||
|
||||
/* Register the device address space entries */
|
||||
|
||||
@ -337,7 +337,7 @@ siba_admatch_offset(uint8_t addrspace)
|
||||
* @param[out] size The parsed size.
|
||||
*
|
||||
* @retval 0 success
|
||||
* @retval non-zero a parse error occured.
|
||||
* @retval non-zero a parse error occurred.
|
||||
*/
|
||||
int
|
||||
siba_parse_admatch(uint32_t am, uint32_t *addr, uint32_t *size)
|
||||
|
||||
@ -356,7 +356,7 @@
|
||||
BSDI code removed. Will be restored later.
|
||||
|
||||
1.70 12 July 1999 Roger Hardiman <roger@freebsd.org>
|
||||
Reorganise OS device dependant parts (based on a port to
|
||||
Reorganise OS device dependent parts (based on a port to
|
||||
linux by Brad Parker).
|
||||
Make the driver compile on FreeBSD 2.2.x systems again.
|
||||
Change number of VBI lines from 16 to 12 for NTSC formats.
|
||||
@ -368,7 +368,7 @@
|
||||
Matt Brown <matt@dqc.org> added MSP3430G DBX initialisation.
|
||||
|
||||
1.71 30 Aug 1999 Roger Hardiman <roger@freebsd.org>
|
||||
Small cleanup of OS dependant code. Remove NPCI usage.
|
||||
Small cleanup of OS dependent code. Remove NPCI usage.
|
||||
Fix bug in AVerMedia detection.
|
||||
Update VBI support for the AleVT Teletext package. Parts
|
||||
from Juha Nurmela's driver <Juha.Nurmela@quicknet.inet.fi>
|
||||
|
||||
@ -132,7 +132,7 @@ set_audio( bktr_ptr_t bktr, int cmd )
|
||||
else
|
||||
#endif /* AUDIOMUX_DISCOVER */
|
||||
|
||||
/* check for existance of audio MUXes */
|
||||
/* check for existence of audio MUXes */
|
||||
if ( !bktr->card.audiomuxs[ 4 ] )
|
||||
return( -1 );
|
||||
|
||||
@ -308,7 +308,7 @@ init_BTSC( bktr_ptr_t bktr )
|
||||
|
||||
/*
|
||||
* setup the dbx chip
|
||||
* XXX FIXME: alot of work to be done here, this merely unmutes it.
|
||||
* XXX FIXME: a lot of work to be done here, this merely unmutes it.
|
||||
*/
|
||||
int
|
||||
set_BTSC( bktr_ptr_t bktr, int control )
|
||||
@ -471,7 +471,7 @@ void msp_read_id( bktr_ptr_t bktr ){
|
||||
* For the MSP3430G, we use fast autodetect mode
|
||||
* For the MSP3410/3415 there are two schemes for this
|
||||
* a) Fast autodetection - the chip is put into autodetect mode, and the function
|
||||
* returns immediatly. This works in most cases and is the Default Mode.
|
||||
* returns immediately. This works in most cases and is the Default Mode.
|
||||
* b) Slow mode. The function sets the MSP3410/3415 chip, then waits for feedback from
|
||||
* the chip and re-programs it if needed.
|
||||
*/
|
||||
@ -561,7 +561,7 @@ void msp_autodetect( bktr_ptr_t bktr ) {
|
||||
msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0008,0x0020);/* Loudspeaker set stereo*/
|
||||
/*
|
||||
set spatial effect strength to 50% enlargement
|
||||
set spatial effect mode b, stereo basewidth enlargment only
|
||||
set spatial effect mode b, stereo basewidth enlargement only
|
||||
*/
|
||||
msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0005,0x3f28);
|
||||
} else if (stereo > 0x8000) { /* bilingual mode */
|
||||
@ -573,7 +573,7 @@ void msp_autodetect( bktr_ptr_t bktr ) {
|
||||
msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0008,0x0030);/* Loudspeaker */
|
||||
/*
|
||||
set spatial effect strength to 50% enlargement
|
||||
set spatial effect mode a, stereo basewidth enlargment
|
||||
set spatial effect mode a, stereo basewidth enlargement
|
||||
and pseudo stereo effect with automatic high-pass filter
|
||||
*/
|
||||
msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0005,0x3f08);
|
||||
|
||||
@ -1217,7 +1217,7 @@ checkTuner:
|
||||
} /* end switch(card) */
|
||||
|
||||
|
||||
/* At this point, a goto checkDBX has not occured */
|
||||
/* At this point, a goto checkDBX has not occurred */
|
||||
/* We have not been able to select a Tuner */
|
||||
/* Some cards make use of the tuner address to */
|
||||
/* identify the make/model of tuner */
|
||||
|
||||
@ -256,7 +256,7 @@ typedef u_char bool_t;
|
||||
*/
|
||||
|
||||
#define MAX_VBI_LINES 16 /* Maximum for all vidoe formats */
|
||||
#define VBI_LINE_SIZE 2048 /* Store upto 2048 bytes per line */
|
||||
#define VBI_LINE_SIZE 2048 /* Store up to 2048 bytes per line */
|
||||
#define VBI_BUFFER_ITEMS 20 /* Number of frames we buffer */
|
||||
#define VBI_DATA_SIZE (VBI_LINE_SIZE * MAX_VBI_LINES * 2)
|
||||
#define VBI_BUFFER_SIZE (VBI_DATA_SIZE * VBI_BUFFER_ITEMS)
|
||||
@ -626,7 +626,7 @@ bktr_store_address(unit, BKTR_MEM_BUF, buf);
|
||||
init_audio_devices( bktr );
|
||||
|
||||
#ifdef BKTR_NEW_MSP34XX_DRIVER
|
||||
/* setup the kenrel thread */
|
||||
/* setup the kernel thread */
|
||||
err = msp_attach( bktr );
|
||||
if ( err != 0 ) /* error doing kernel thread stuff, disable msp3400c */
|
||||
bktr->card.msp3400c = 0;
|
||||
@ -1786,7 +1786,7 @@ video_ioctl( bktr_ptr_t bktr, int unit, ioctl_cmd_t cmd, caddr_t arg, struct thr
|
||||
&& bktr->video.addr == 0) {
|
||||
|
||||
/*****************************/
|
||||
/* *** OS Dependant code *** */
|
||||
/* *** OS Dependent code *** */
|
||||
/*****************************/
|
||||
#if defined(__NetBSD__) || defined(__OpenBSD__)
|
||||
bus_dmamap_t dmamap;
|
||||
@ -2369,7 +2369,7 @@ common_ioctl( bktr_ptr_t bktr, ioctl_cmd_t cmd, caddr_t arg )
|
||||
/* Tuner is MUX0, RCA is MUX1, S-Video is MUX2 */
|
||||
/* On the Hauppauge bt878 boards, */
|
||||
/* Tuner is MUX0, RCA is MUX3 */
|
||||
/* Unfortunatly Meteor driver codes DEV_RCA as DEV_0, so we */
|
||||
/* Unfortunately Meteor driver codes DEV_RCA as DEV_0, so we */
|
||||
/* stick with this system in our Meteor Emulation */
|
||||
|
||||
switch(*(unsigned long *)arg & METEOR_DEV_MASK) {
|
||||
|
||||
@ -40,7 +40,7 @@ __FBSDID("$FreeBSD$");
|
||||
* chipset.
|
||||
* Copyright Roger Hardiman and Amancio Hasty.
|
||||
*
|
||||
* bktr_os : This has all the Operating System dependant code,
|
||||
* bktr_os : This has all the Operating System dependent code,
|
||||
* probe/attach and open/close/ioctl/read/mmap
|
||||
* memory allocation
|
||||
* PCI bus interfacing
|
||||
@ -395,12 +395,12 @@ bktr_attach( device_t dev )
|
||||
fun = fun | 1; /* Enable writes to the sub-system vendor ID */
|
||||
|
||||
#if defined( BKTR_430_FX_MODE )
|
||||
if (bootverbose) printf("Using 430 FX chipset compatibilty mode\n");
|
||||
if (bootverbose) printf("Using 430 FX chipset compatibility mode\n");
|
||||
fun = fun | 2; /* Enable Intel 430 FX compatibility mode */
|
||||
#endif
|
||||
|
||||
#if defined( BKTR_SIS_VIA_MODE )
|
||||
if (bootverbose) printf("Using SiS/VIA chipset compatibilty mode\n");
|
||||
if (bootverbose) printf("Using SiS/VIA chipset compatibility mode\n");
|
||||
fun = fun | 4; /* Enable SiS/VIA compatibility mode (useful for
|
||||
OPTi chipset motherboards too */
|
||||
#endif
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
* chipset.
|
||||
* Copyright Roger Hardiman and Amancio Hasty.
|
||||
*
|
||||
* bktr_os : This has all the Operating System dependant code.
|
||||
* bktr_os : This has all the Operating System dependent code.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
@ -39,7 +39,7 @@
|
||||
*
|
||||
* FM-Mono
|
||||
* should work. The stereo modes are backward compatible to FM-mono,
|
||||
* therefore FM-Mono should be allways available.
|
||||
* therefore FM-Mono should be always available.
|
||||
*
|
||||
* FM-Stereo (B/G, used in germany)
|
||||
* should work, with autodetect
|
||||
@ -226,7 +226,7 @@ static struct MSP_INIT_DATA_DEM {
|
||||
MSP_CARRIER(10.7), MSP_CARRIER(10.7),
|
||||
0x00d0, 0x0480, 0x0020, 0x3000 },
|
||||
|
||||
/* Terrestial FM-mono + FM-stereo */
|
||||
/* Terrestrial FM-mono + FM-stereo */
|
||||
{ { 3, 18, 27, 48, 66, 72 }, { 3, 18, 27, 48, 66, 72 },
|
||||
MSP_CARRIER(5.5), MSP_CARRIER(5.5),
|
||||
0x00d0, 0x0480, 0x0030, 0x3000},
|
||||
|
||||
@ -1578,7 +1578,7 @@ btdone(struct bt_softc *bt, struct bt_ccb *bccb, bt_mbi_comp_code_t comp_code)
|
||||
struct ccb_hdr *ccb_h;
|
||||
cam_status error;
|
||||
|
||||
/* Notify all clients that a BDR occured */
|
||||
/* Notify all clients that a BDR occurred */
|
||||
error = xpt_create_path(&path, /*periph*/NULL,
|
||||
cam_sim_path(bt->sim),
|
||||
bccb->hccb.target_id,
|
||||
@ -1624,12 +1624,12 @@ btdone(struct bt_softc *bt, struct bt_ccb *bccb, bt_mbi_comp_code_t comp_code)
|
||||
case BMBI_ABORT:
|
||||
case BMBI_ERROR:
|
||||
if (bootverbose) {
|
||||
printf("bt: ccb %p - error %x occured. "
|
||||
printf("bt: ccb %p - error %x occurred. "
|
||||
"btstat = %x, sdstat = %x\n",
|
||||
(void *)bccb, comp_code, bccb->hccb.btstat,
|
||||
bccb->hccb.sdstat);
|
||||
}
|
||||
/* An error occured */
|
||||
/* An error occurred */
|
||||
switch(bccb->hccb.btstat) {
|
||||
case BTSTAT_DATARUN_ERROR:
|
||||
if (bccb->hccb.data_len == 0) {
|
||||
@ -2317,7 +2317,7 @@ bttimeout(void *arg)
|
||||
* means that the driver attempts to clear only one error
|
||||
* condition at a time. In general, timeouts that occur
|
||||
* close together are related anyway, so there is no benefit
|
||||
* in attempting to handle errors in parrallel. Timeouts will
|
||||
* in attempting to handle errors in parallel. Timeouts will
|
||||
* be reinstated when the recovery process ends.
|
||||
*/
|
||||
if ((bccb->flags & BCCB_DEVICE_RESET) == 0) {
|
||||
|
||||
@ -78,7 +78,7 @@ __FBSDID("$FreeBSD$");
|
||||
#define EISA_IRQ_TYPE 0x08D
|
||||
#define LEVEL 0x40
|
||||
|
||||
/* Definitions for the AMI Series 48 controler */
|
||||
/* Definitions for the AMI Series 48 controller */
|
||||
#define AMI_EISA_IOSIZE 0x500 /* Two separate ranges?? */
|
||||
#define AMI_EISA_SLOT_OFFSET 0x800
|
||||
#define AMI_EISA_IOCONF 0x000
|
||||
|
||||
@ -3747,7 +3747,7 @@ bwi_rx_radiotap(struct bwi_softc *sc, struct mbuf *m,
|
||||
if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
|
||||
sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_WEP;
|
||||
|
||||
sc->sc_rx_th.wr_tsf = hdr->rxh_tsf; /* No endian convertion */
|
||||
sc->sc_rx_th.wr_tsf = hdr->rxh_tsf; /* No endian conversion */
|
||||
sc->sc_rx_th.wr_rate = rate;
|
||||
sc->sc_rx_th.wr_antsignal = rssi;
|
||||
sc->sc_rx_th.wr_antnoise = noise;
|
||||
|
||||
@ -2221,7 +2221,7 @@ storm_memset_eq_prod(struct bxe_softc *sc,
|
||||
/*
|
||||
* Post a slowpath command.
|
||||
*
|
||||
* A slowpath command is used to propogate a configuration change through
|
||||
* A slowpath command is used to propagate a configuration change through
|
||||
* the controller in a controlled manner, allowing each STORM processor and
|
||||
* other H/W blocks to phase in the change. The commands sent on the
|
||||
* slowpath are referred to as ramrods. Depending on the ramrod used the
|
||||
@ -4248,7 +4248,7 @@ bxe_nic_unload(struct bxe_softc *sc,
|
||||
|
||||
/*
|
||||
* Nothing to do during unload if previous bxe_nic_load()
|
||||
* did not completed succesfully - all resourses are released.
|
||||
* did not completed successfully - all resourses are released.
|
||||
*/
|
||||
if ((sc->state == BXE_STATE_CLOSED) ||
|
||||
(sc->state == BXE_STATE_ERROR)) {
|
||||
@ -4762,7 +4762,7 @@ bxe_dump_mbuf(struct bxe_softc *sc,
|
||||
* Checks to ensure the 13 bd sliding window is >= MSS for TSO.
|
||||
* Check that (13 total bds - 3 bds) = 10 bd window >= MSS.
|
||||
* The window: 3 bds are = 1 for headers BD + 2 for parse BD and last BD
|
||||
* The headers comes in a seperate bd in FreeBSD so 13-3=10.
|
||||
* The headers comes in a separate bd in FreeBSD so 13-3=10.
|
||||
* Returns: 0 if OK to send, 1 if packet needs further defragmentation
|
||||
*/
|
||||
static int
|
||||
@ -7990,7 +7990,7 @@ bxe_attn_int_deasserted2(struct bxe_softc *sc,
|
||||
mask1 = REG_RD(sc, PXP2_REG_PXP2_INT_MASK_1);
|
||||
val0 = REG_RD(sc, PXP2_REG_PXP2_INT_STS_0);
|
||||
/*
|
||||
* If the olny PXP2_EOP_ERROR_BIT is set in
|
||||
* If the only PXP2_EOP_ERROR_BIT is set in
|
||||
* STS0 and STS1 - clear it
|
||||
*
|
||||
* probably we lose additional attentions between
|
||||
@ -10627,7 +10627,7 @@ bxe_set_234_gates(struct bxe_softc *sc,
|
||||
(!close) ? (val | HC_CONFIG_0_REG_BLOCK_DISABLE_0) :
|
||||
(val & ~(uint32_t)HC_CONFIG_0_REG_BLOCK_DISABLE_0));
|
||||
} else {
|
||||
/* Prevent incomming interrupts in IGU */
|
||||
/* Prevent incoming interrupts in IGU */
|
||||
val = REG_RD(sc, IGU_REG_BLOCK_CONFIGURATION);
|
||||
|
||||
REG_WR(sc, IGU_REG_BLOCK_CONFIGURATION,
|
||||
|
||||
@ -1294,7 +1294,7 @@ static void elink_ets_e3b0_set_credit_upper_bound_nig(
|
||||
* Will return the NIG ETS registers to init values.Except
|
||||
* credit_upper_bound.
|
||||
* That isn't used in this configuration (No WFQ is enabled) and will be
|
||||
* configured acording to spec
|
||||
* configured according to spec.
|
||||
*.
|
||||
******************************************************************************/
|
||||
static void elink_ets_e3b0_nig_disabled(const struct elink_params *params,
|
||||
@ -1411,7 +1411,7 @@ static void elink_ets_e3b0_set_credit_upper_bound_pbf(
|
||||
* Will return the PBF ETS registers to init values.Except
|
||||
* credit_upper_bound.
|
||||
* That isn't used in this configuration (No WFQ is enabled) and will be
|
||||
* configured acording to spec
|
||||
* configured according to spec.
|
||||
*.
|
||||
******************************************************************************/
|
||||
static void elink_ets_e3b0_pbf_disabled(const struct elink_params *params)
|
||||
@ -1469,7 +1469,7 @@ static void elink_ets_e3b0_pbf_disabled(const struct elink_params *params)
|
||||
}
|
||||
/******************************************************************************
|
||||
* Description:
|
||||
* E3B0 disable will return basicly the values to init values.
|
||||
* E3B0 disable will return basically the values to init values.
|
||||
*.
|
||||
******************************************************************************/
|
||||
static elink_status_t elink_ets_e3b0_disabled(const struct elink_params *params,
|
||||
@ -1492,7 +1492,7 @@ static elink_status_t elink_ets_e3b0_disabled(const struct elink_params *params,
|
||||
|
||||
/******************************************************************************
|
||||
* Description:
|
||||
* Disable will return basicly the values to init values.
|
||||
* Disable will return basically the values to init values.
|
||||
*
|
||||
******************************************************************************/
|
||||
elink_status_t elink_ets_disabled(struct elink_params *params,
|
||||
@ -3762,7 +3762,7 @@ static elink_status_t elink_eee_initial_config(struct elink_params *params,
|
||||
{
|
||||
vars->eee_status |= ((uint32_t) mode) << SHMEM_EEE_SUPPORTED_SHIFT;
|
||||
|
||||
/* Propogate params' bits --> vars (for migration exposure) */
|
||||
/* Propagate params' bits --> vars (for migration exposure) */
|
||||
if (params->eee_mode & ELINK_EEE_MODE_ENABLE_LPI)
|
||||
vars->eee_status |= SHMEM_EEE_LPI_REQUESTED_BIT;
|
||||
else
|
||||
@ -14632,7 +14632,7 @@ static void elink_check_over_curr(struct elink_params *params,
|
||||
vars->phy_flags &= ~PHY_OVER_CURRENT_FLAG;
|
||||
}
|
||||
|
||||
/* Returns 0 if no change occured since last check; 1 otherwise. */
|
||||
/* Returns 0 if no change occurred since last check; 1 otherwise. */
|
||||
static uint8_t elink_analyze_link_error(struct elink_params *params,
|
||||
struct elink_vars *vars, uint32_t status,
|
||||
uint32_t phy_flag, uint32_t link_flag, uint8_t notify)
|
||||
|
||||
@ -1670,7 +1670,7 @@ bxe_stats_init(struct bxe_softc *sc)
|
||||
bxe_port_stats_base_init(sc);
|
||||
}
|
||||
|
||||
/* mark the end of statistics initializiation */
|
||||
/* mark the end of statistics initialization */
|
||||
sc->stats_init = FALSE;
|
||||
}
|
||||
|
||||
|
||||
@ -264,7 +264,7 @@ struct bxe_eth_stats {
|
||||
uint32_t mbuf_alloc_sge;
|
||||
uint32_t mbuf_alloc_tpa;
|
||||
|
||||
/* num. of times tx queue full occured */
|
||||
/* num. of times tx queue full occurred */
|
||||
uint32_t tx_queue_full_return;
|
||||
};
|
||||
|
||||
@ -370,7 +370,7 @@ struct bxe_eth_q_stats {
|
||||
uint32_t mbuf_alloc_sge;
|
||||
uint32_t mbuf_alloc_tpa;
|
||||
|
||||
/* num. of times tx queue full occured */
|
||||
/* num. of times tx queue full occurred */
|
||||
uint32_t tx_queue_full_return;
|
||||
};
|
||||
|
||||
|
||||
@ -8188,7 +8188,7 @@ union fcoe_kcqe_params
|
||||
struct fcoe_kcqe
|
||||
{
|
||||
uint32_t fcoe_conn_id /* Drivers connection ID (only 16 bits are used) */;
|
||||
uint32_t completion_status /* 0=command completed succesfuly, 1=command failed */;
|
||||
uint32_t completion_status /* 0=command completed successfully, 1=command failed */;
|
||||
uint32_t fcoe_conn_context_id /* Context ID of the FCoE connection */;
|
||||
union fcoe_kcqe_params params /* command-specific parameters */;
|
||||
uint16_t qe_self_seq /* Self identifying sequence number */;
|
||||
@ -9464,7 +9464,7 @@ union iscsi_kcqe_params
|
||||
struct iscsi_kcqe
|
||||
{
|
||||
uint32_t iscsi_conn_id /* Drivers connection ID (only 16 bits are used) */;
|
||||
uint32_t completion_status /* 0=command completed succesfuly, 1=command failed */;
|
||||
uint32_t completion_status /* 0=command completed successfully, 1=command failed */;
|
||||
uint32_t iscsi_conn_context_id /* Context ID of the iSCSI connection */;
|
||||
union iscsi_kcqe_params params /* command-specific parameters */;
|
||||
#if defined(__BIG_ENDIAN)
|
||||
@ -10241,7 +10241,7 @@ struct tstorm_tcp_st_context_section
|
||||
uint16_t mid_mac_address /* TX source MAC MID-16 */;
|
||||
uint16_t msb_mac_address /* TX source MAC MSB-16 */;
|
||||
#endif
|
||||
uint32_t rightmost_received_seq /* The maximum sequence ever recieved - used for The New Patent */;
|
||||
uint32_t rightmost_received_seq /* The maximum sequence ever received - used for The New Patent */;
|
||||
};
|
||||
|
||||
/*
|
||||
@ -11694,7 +11694,7 @@ struct flow_control_configuration
|
||||
struct function_start_data
|
||||
{
|
||||
uint8_t function_mode /* the function mode */;
|
||||
uint8_t allow_npar_tx_switching /* If set, inter-pf tx switching is allowed in Switch Independant function mode. (E2/E3 Only) */;
|
||||
uint8_t allow_npar_tx_switching /* If set, inter-pf tx switching is allowed in Switch Independent function mode. (E2/E3 Only) */;
|
||||
uint16_t sd_vlan_tag /* value of Vlan in case of switch depended multi-function mode */;
|
||||
uint16_t vif_id /* value of VIF id in case of NIV multi-function mode */;
|
||||
uint8_t path_id;
|
||||
@ -11712,7 +11712,7 @@ struct function_start_data
|
||||
uint8_t sd_accept_mf_clss_fail /* If set, accept packets that fail Multi-Function Switch-Dependent classification. Only one VNIC on the port can have this set to 1 */;
|
||||
uint8_t sd_accept_mf_clss_fail_match_ethtype /* If set, accepted packets must match the ethertype of sd_clss_fail_ethtype */;
|
||||
uint16_t sd_accept_mf_clss_fail_ethtype /* Ethertype to match in the case of sd_accept_mf_clss_fail_match_ethtype */;
|
||||
uint16_t sd_vlan_eth_type /* Value of ether-type to use in the case of switch dependant multi-function mode. Setting this to 0 uses the default value of 0x8100 */;
|
||||
uint16_t sd_vlan_eth_type /* Value of ether-type to use in the case of switch dependent multi-function mode. Setting this to 0 uses the default value of 0x8100 */;
|
||||
uint8_t sd_vlan_force_pri_flg /* If set, the SD Vlan Priority is forced to the value of the sd_vlan_pri_force_val field regardless of the DCB or inband VLAN priority. */;
|
||||
uint8_t sd_vlan_force_pri_val /* value to force SD Vlan Priority if sd_vlan_pri_force_flg is set */;
|
||||
uint8_t c2s_pri_tt_valid /* When set, c2s_pri_trans_table is valid */;
|
||||
@ -11754,7 +11754,7 @@ struct function_update_data
|
||||
uint8_t sd_vlan_eth_type_change_flg /* If set, the SD VLAN Ethertype is changed according to the field sd_vlan_eth_type */;
|
||||
uint8_t reserved1;
|
||||
uint16_t sd_vlan_tag /* New value of Outer Vlan in case of switch depended multi-function mode */;
|
||||
uint16_t sd_vlan_eth_type /* New value of ether-type in the case of switch dependant multi-function mode. Setting this to 0 restores the default value of 0x8100 */;
|
||||
uint16_t sd_vlan_eth_type /* New value of ether-type in the case of switch dependent multi-function mode. Setting this to 0 restores the default value of 0x8100 */;
|
||||
uint16_t reserved0;
|
||||
uint32_t reserved2;
|
||||
};
|
||||
@ -12564,7 +12564,7 @@ struct ustorm_toe_prefetched_bd
|
||||
uint32_t __addr_hi /* receive payload base address - Single continuous buffer (page) pointer */;
|
||||
#if defined(__BIG_ENDIAN)
|
||||
uint16_t flags;
|
||||
#define __USTORM_TOE_PREFETCHED_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the begining of an application buffer */
|
||||
#define __USTORM_TOE_PREFETCHED_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the beginning of an application buffer */
|
||||
#define __USTORM_TOE_PREFETCHED_BD_START_SHIFT 0
|
||||
#define __USTORM_TOE_PREFETCHED_BD_END (0x1<<1) /* BitField flagsbd command flags this bd is the end of an application buffer */
|
||||
#define __USTORM_TOE_PREFETCHED_BD_END_SHIFT 1
|
||||
@ -12578,7 +12578,7 @@ struct ustorm_toe_prefetched_bd
|
||||
#elif defined(__LITTLE_ENDIAN)
|
||||
uint16_t __buf_un_used /* Number of bytes left for placement in the pre fetched application/grq bd 0 size for buffer is not valid */;
|
||||
uint16_t flags;
|
||||
#define __USTORM_TOE_PREFETCHED_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the begining of an application buffer */
|
||||
#define __USTORM_TOE_PREFETCHED_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the beginning of an application buffer */
|
||||
#define __USTORM_TOE_PREFETCHED_BD_START_SHIFT 0
|
||||
#define __USTORM_TOE_PREFETCHED_BD_END (0x1<<1) /* BitField flagsbd command flags this bd is the end of an application buffer */
|
||||
#define __USTORM_TOE_PREFETCHED_BD_END_SHIFT 1
|
||||
@ -12609,9 +12609,9 @@ struct ustorm_toe_st_context
|
||||
#define USTORM_TOE_ST_CONTEXT_RESERVED0 (0x1F<<3) /* BitField flags2various state flags */
|
||||
#define USTORM_TOE_ST_CONTEXT_RESERVED0_SHIFT 3
|
||||
uint8_t __indirection_shift /* Offset in bits of the cupid of this connection on the 64Bits fetched from internal memoy */;
|
||||
uint16_t indirection_ram_offset /* address offset in internal memory from the begining of the table consisting the cpu id of this connection (Only 12 bits are used) */;
|
||||
uint16_t indirection_ram_offset /* address offset in internal memory from the beginning of the table consisting the cpu id of this connection (Only 12 bits are used) */;
|
||||
#elif defined(__LITTLE_ENDIAN)
|
||||
uint16_t indirection_ram_offset /* address offset in internal memory from the begining of the table consisting the cpu id of this connection (Only 12 bits are used) */;
|
||||
uint16_t indirection_ram_offset /* address offset in internal memory from the beginning of the table consisting the cpu id of this connection (Only 12 bits are used) */;
|
||||
uint8_t __indirection_shift /* Offset in bits of the cupid of this connection on the 64Bits fetched from internal memoy */;
|
||||
uint8_t flags2;
|
||||
#define USTORM_TOE_ST_CONTEXT_IGNORE_GRQ_PUSH (0x1<<0) /* BitField flags2various state flags we will ignore grq push unless it is ping pong test */
|
||||
@ -12637,8 +12637,8 @@ struct ustorm_toe_st_context
|
||||
uint32_t initial_rcv_wnd /* the maximal advertized window */;
|
||||
uint32_t __bytes_cons /* the last rq_available_bytes producer that was read from host - used to know how many bytes were added */;
|
||||
uint32_t __prev_consumed_grq_bytes /* the last rq_available_bytes producer that was read from host - used to know how many bytes were added */;
|
||||
uint32_t prev_rcv_win_right_edge /* siquence of the last bytes that can be recieved - used to know how many bytes were added */;
|
||||
uint32_t rcv_nxt /* Receive sequence: next expected - of the right most recieved packet */;
|
||||
uint32_t prev_rcv_win_right_edge /* siquence of the last bytes that can be received - used to know how many bytes were added */;
|
||||
uint32_t rcv_nxt /* Receive sequence: next expected - of the right most received packet */;
|
||||
struct ustorm_toe_prefetched_isle_bd __isle_bd /* prefetched bd for the isle */;
|
||||
struct ustorm_toe_ring_params pen_ring_params /* peninsula ring params */;
|
||||
struct ustorm_toe_prefetched_bd __pen_bd_0 /* peninsula prefetched bd for the peninsula */;
|
||||
@ -12839,7 +12839,7 @@ struct toe_rx_bd
|
||||
uint32_t addr_hi /* receive payload base address - Single continuous buffer (page) pointer */;
|
||||
#if defined(__BIG_ENDIAN)
|
||||
uint16_t flags;
|
||||
#define TOE_RX_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the begining of an application buffer */
|
||||
#define TOE_RX_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the beginning of an application buffer */
|
||||
#define TOE_RX_BD_START_SHIFT 0
|
||||
#define TOE_RX_BD_END (0x1<<1) /* BitField flagsbd command flags this bd is the end of an application buffer */
|
||||
#define TOE_RX_BD_END_SHIFT 1
|
||||
@ -12853,7 +12853,7 @@ struct toe_rx_bd
|
||||
#elif defined(__LITTLE_ENDIAN)
|
||||
uint16_t size /* Size of the buffer pointed by the BD */;
|
||||
uint16_t flags;
|
||||
#define TOE_RX_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the begining of an application buffer */
|
||||
#define TOE_RX_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the beginning of an application buffer */
|
||||
#define TOE_RX_BD_START_SHIFT 0
|
||||
#define TOE_RX_BD_END (0x1<<1) /* BitField flagsbd command flags this bd is the end of an application buffer */
|
||||
#define TOE_RX_BD_END_SHIFT 1
|
||||
@ -12935,7 +12935,7 @@ struct toe_rx_cqe
|
||||
*/
|
||||
struct toe_rx_db_data
|
||||
{
|
||||
uint32_t rcv_win_right_edge /* siquence of the last bytes that can be recieved */;
|
||||
uint32_t rcv_win_right_edge /* siquence of the last bytes that can be received */;
|
||||
uint32_t bytes_prod /* cyclic counter of posted bytes */;
|
||||
#if defined(__BIG_ENDIAN)
|
||||
uint8_t reserved1 /* reserved */;
|
||||
|
||||
@ -321,7 +321,7 @@ static inline void ecore_dcb_config_qm(struct bxe_softc *sc, enum cos_mode mode,
|
||||
|
||||
|
||||
/*
|
||||
* congestion managment port init api description
|
||||
* congestion management port init api description
|
||||
* the api works as follows:
|
||||
* the driver should pass the cmng_init_input struct, the port_init function
|
||||
* will prepare the required internal ram structure which will be passed back
|
||||
|
||||
@ -1949,7 +1949,7 @@ void ecore_init_mcast_obj(struct bxe_softc *sc,
|
||||
* the current command will be enqueued to the tail of the
|
||||
* pending commands list.
|
||||
*
|
||||
* Return: 0 is operation was successfull and there are no pending completions,
|
||||
* Return: 0 is operation was successful and there are no pending completions,
|
||||
* negative if there were errors, positive if there are pending
|
||||
* completions.
|
||||
*/
|
||||
|
||||
@ -406,7 +406,7 @@ cardbus_read_tuple_conf(device_t cbdev, device_t child, uint32_t start,
|
||||
}
|
||||
|
||||
/*
|
||||
* Read the CIS data out of memroy. We indirect through the bus space
|
||||
* Read the CIS data out of memory. We indirect through the bus space
|
||||
* routines to ensure proper byte ordering conversions when necessary.
|
||||
*/
|
||||
static int
|
||||
|
||||
@ -623,7 +623,7 @@ void ce_stop_chan (ce_chan_t *c)
|
||||
|
||||
/* XXXRIK: This function should be for comleteness, but for now I
|
||||
* don't use it. So I just start to write and didn't finished it yet.
|
||||
* It and it is VERY BUGGY!!! Do not use it. If you realy
|
||||
* It and it is VERY BUGGY!!! Do not use it. If you really
|
||||
* need it ask me to fix it or rewrite it by your self.
|
||||
* Note: most buggy part of it in ce_on_config_stop!
|
||||
*/
|
||||
|
||||
@ -2448,7 +2448,7 @@ static int ng_ce_rmnode (node_p node)
|
||||
NG_NODE_UNREF (node);
|
||||
}
|
||||
#if __FreeBSD_version >= 502120
|
||||
NG_NODE_REVIVE(node); /* Persistant node */
|
||||
NG_NODE_REVIVE(node); /* Persistent node */
|
||||
#else
|
||||
node->nd_flags &= ~NG_INVALID;
|
||||
#endif
|
||||
|
||||
@ -284,7 +284,7 @@ cesa_free_request(struct cesa_softc *sc, struct cesa_request *cr)
|
||||
STAILQ_CONCAT(&sc->sc_free_sdesc, &cr->cr_sdesc);
|
||||
CESA_UNLOCK(sc, sdesc);
|
||||
|
||||
/* Unload DMA memory asociated with request */
|
||||
/* Unload DMA memory associated with request */
|
||||
if (cr->cr_dmap_loaded) {
|
||||
bus_dmamap_unload(sc->sc_data_dtag, cr->cr_dmap);
|
||||
cr->cr_dmap_loaded = 0;
|
||||
@ -705,7 +705,7 @@ cesa_create_chain_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
|
||||
/*
|
||||
* Fill in current packet with data. Break if there is
|
||||
* no more data in current DMA segment or an error
|
||||
* occured.
|
||||
* occurred.
|
||||
*/
|
||||
size = cesa_fill_packet(sc, &cp, &seg);
|
||||
if (size <= 0) {
|
||||
@ -1260,7 +1260,7 @@ cesa_detach(device_t dev)
|
||||
/* Relase I/O and IRQ resources */
|
||||
bus_release_resources(dev, cesa_res_spec, sc->sc_res);
|
||||
|
||||
/* Destory mutexes */
|
||||
/* Destroy mutexes */
|
||||
mtx_destroy(&sc->sc_sessions_lock);
|
||||
mtx_destroy(&sc->sc_requests_lock);
|
||||
mtx_destroy(&sc->sc_sdesc_lock);
|
||||
|
||||
@ -58,7 +58,7 @@ typedef STAILQ_HEAD(, ciss_request) cr_qhead_t;
|
||||
|
||||
/*
|
||||
* Interrupt reduction can be controlled by tuning the interrupt
|
||||
* coalesce delay and count paramters. The delay (in microseconds)
|
||||
* coalesce delay and count parameters. The delay (in microseconds)
|
||||
* defers delivery of interrupts to increase the chance of there being
|
||||
* more than one completed command ready when the interrupt is
|
||||
* delivered. The count expedites the delivery of the interrupt when
|
||||
|
||||
@ -235,7 +235,7 @@ cmx_release_resources(device_t dev)
|
||||
}
|
||||
|
||||
/*
|
||||
* Bus independant device attachment routine. Creates the
|
||||
* Bus independent device attachment routine. Creates the
|
||||
* character device node.
|
||||
*/
|
||||
int
|
||||
@ -258,7 +258,7 @@ cmx_attach(device_t dev)
|
||||
}
|
||||
|
||||
/*
|
||||
* Bus independant device detachment routine. Makes sure all
|
||||
* Bus independent device detachment routine. Makes sure all
|
||||
* allocated resources are freed, callouts disabled and waiting
|
||||
* processes unblocked.
|
||||
*/
|
||||
|
||||
@ -72,7 +72,7 @@ cmx_pccard_probe(device_t dev)
|
||||
}
|
||||
|
||||
/*
|
||||
* Attach to the pccard, and call bus independant attach and
|
||||
* Attach to the pccard, and call bus independent attach and
|
||||
* resource allocation routines.
|
||||
*/
|
||||
static int
|
||||
|
||||
@ -2171,7 +2171,7 @@ static int ng_cp_rmnode (node_p node)
|
||||
NG_NODE_SET_PRIVATE (node, NULL);
|
||||
NG_NODE_UNREF (node);
|
||||
}
|
||||
NG_NODE_REVIVE(node); /* Persistant node */
|
||||
NG_NODE_REVIVE(node); /* Persistent node */
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -180,7 +180,7 @@ wait_eeprom_ready(struct cs_softc *sc)
|
||||
*
|
||||
* Before we issue the command, we should be !busy, so that will
|
||||
* be fast. The datasheet suggests that clock out from the part
|
||||
* per word will be on the order of 25us, which is consistant with
|
||||
* per word will be on the order of 25us, which is consistent with
|
||||
* the 1MHz serial clock and 16bits... We should never hit 100,
|
||||
* let alone 15,000 here. The original code did an unconditional
|
||||
* 30ms DELAY here. Bad Kharma. cs_readreg takes ~2us.
|
||||
|
||||
@ -100,7 +100,7 @@ static int cx_reset (port_t port)
|
||||
|
||||
cx_cmd (port, CCR_RSTALL);
|
||||
|
||||
/* Firmware revision code should clear imediately. */
|
||||
/* Firmware revision code should clear immediately. */
|
||||
/* Wait up to 10 msec for revision code to appear again. */
|
||||
for (count=0; count<20000; ++count)
|
||||
if (inb(GFRCR(port)) != 0)
|
||||
|
||||
@ -2453,7 +2453,7 @@ static int ng_cx_rmnode (node_p node)
|
||||
NG_NODE_SET_PRIVATE (node, NULL);
|
||||
NG_NODE_UNREF (node);
|
||||
}
|
||||
NG_NODE_REVIVE(node); /* Persistant node */
|
||||
NG_NODE_REVIVE(node); /* Persistent node */
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -651,7 +651,7 @@ struct t3_vpd {
|
||||
*
|
||||
* Read a 32-bit word from a location in VPD EEPROM using the card's PCI
|
||||
* VPD ROM capability. A zero is written to the flag bit when the
|
||||
* addres is written to the control register. The hardware device will
|
||||
* address is written to the control register. The hardware device will
|
||||
* set the flag to 1 when 4 bytes have been read into the data register.
|
||||
*/
|
||||
int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data)
|
||||
@ -1031,7 +1031,7 @@ static int flash_wait_op(adapter_t *adapter, int attempts, int delay)
|
||||
* Read the specified number of 32-bit words from the serial flash.
|
||||
* If @byte_oriented is set the read data is stored as a byte array
|
||||
* (i.e., big-endian), otherwise as 32-bit words in the platform's
|
||||
* natural endianess.
|
||||
* natural endianness.
|
||||
*/
|
||||
int t3_read_flash(adapter_t *adapter, unsigned int addr, unsigned int nwords,
|
||||
u32 *data, int byte_oriented)
|
||||
@ -1068,7 +1068,7 @@ int t3_read_flash(adapter_t *adapter, unsigned int addr, unsigned int nwords,
|
||||
* Writes up to a page of data (256 bytes) to the serial flash starting
|
||||
* at the given address.
|
||||
* If @byte_oriented is set the write data is stored as a 32-bit
|
||||
* big-endian array, otherwise in the processor's native endianess.
|
||||
* big-endian array, otherwise in the processor's native endianness.
|
||||
*
|
||||
*/
|
||||
static int t3_write_flash(adapter_t *adapter, unsigned int addr,
|
||||
@ -1738,7 +1738,7 @@ struct intr_info {
|
||||
*
|
||||
* A table driven interrupt handler that applies a set of masks to an
|
||||
* interrupt status word and performs the corresponding actions if the
|
||||
* interrupts described by the mask have occured. The actions include
|
||||
* interrupts described by the mask have occurred. The actions include
|
||||
* optionally printing a warning or alert message, and optionally
|
||||
* incrementing a stat counter. The table is terminated by an entry
|
||||
* specifying mask 0. Returns the number of fatal interrupt conditions.
|
||||
@ -3338,7 +3338,7 @@ static void __devinit init_mtus(unsigned short mtus[])
|
||||
{
|
||||
/*
|
||||
* See draft-mathis-plpmtud-00.txt for the values. The min is 88 so
|
||||
* it can accomodate max size TCP/IP headers when SACK and timestamps
|
||||
* it can accommodate max size TCP/IP headers when SACK and timestamps
|
||||
* are enabled and still have at least 8 bytes of payload.
|
||||
*/
|
||||
mtus[0] = 88;
|
||||
|
||||
@ -633,7 +633,7 @@ cxio_hal_ctrl_qp_write_mem(struct cxio_rdev *rdev_p, u32 addr,
|
||||
{
|
||||
u32 i, nr_wqe, copy_len;
|
||||
u8 *copy_data;
|
||||
u8 wr_len, utx_len; /* lenght in 8 byte flit */
|
||||
u8 wr_len, utx_len; /* length in 8 byte flit */
|
||||
enum t3_wr_flags flag;
|
||||
__be64 *wqe;
|
||||
u64 utx_cmd;
|
||||
|
||||
@ -633,7 +633,7 @@ struct t3_swrq {
|
||||
* A T3 WQ implements both the SQ and RQ.
|
||||
*/
|
||||
struct t3_wq {
|
||||
union t3_wr *queue; /* DMA accessable memory */
|
||||
union t3_wr *queue; /* DMA accessible memory */
|
||||
bus_addr_t dma_addr; /* DMA address for HW */
|
||||
u32 error; /* 1 once we go to ERROR */
|
||||
u32 qpid;
|
||||
|
||||
@ -861,7 +861,7 @@ calc_opt0l(struct socket *so, int rcv_bufsize)
|
||||
KASSERT(rcv_bufsize <= M_RCV_BUFSIZ,
|
||||
("%s: rcv_bufsize (%d) is too high", __func__, rcv_bufsize));
|
||||
|
||||
if (so != NULL) /* optional because noone cares about IP TOS */
|
||||
if (so != NULL) /* optional because no one cares about IP TOS */
|
||||
opt0l |= V_TOS(INP_TOS(sotoinpcb(so)));
|
||||
|
||||
return (htobe32(opt0l));
|
||||
|
||||
@ -621,7 +621,7 @@ struct sge_wrq {
|
||||
|
||||
/*
|
||||
* Scratch space for work requests that wrap around after reaching the
|
||||
* status page, and some infomation about the last WR that used it.
|
||||
* status page, and some information about the last WR that used it.
|
||||
*/
|
||||
uint16_t ss_pidx;
|
||||
uint16_t ss_len;
|
||||
|
||||
@ -2706,7 +2706,7 @@ int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data)
|
||||
}
|
||||
|
||||
/*
|
||||
* Grab the returned data, swizzle it into our endianess and
|
||||
* Grab the returned data, swizzle it into our endianness and
|
||||
* return success.
|
||||
*/
|
||||
t4_os_pci_read_cfg4(adapter, base + PCI_VPD_DATA, data);
|
||||
@ -7739,7 +7739,7 @@ static void read_filter_mode_and_ingress_config(struct adapter *adap)
|
||||
|
||||
/*
|
||||
* If TP_INGRESS_CONFIG.VNID == 0, then TP_VLAN_PRI_MAP.VNIC_ID
|
||||
* represents the presense of an Outer VLAN instead of a VNIC ID.
|
||||
* represents the presence of an Outer VLAN instead of a VNIC ID.
|
||||
*/
|
||||
if ((tpp->ingress_config & F_VNIC) == 0)
|
||||
tpp->vnic_shift = -1;
|
||||
@ -9121,7 +9121,7 @@ int t4_config_watchdog(struct adapter *adapter, unsigned int mbox,
|
||||
/*
|
||||
* The watchdog command expects a timeout in units of 10ms so we need
|
||||
* to convert it here (via rounding) and force a minimum of one 10ms
|
||||
* "tick" if the timeout is non-zero but the convertion results in 0
|
||||
* "tick" if the timeout is non-zero but the conversion results in 0
|
||||
* ticks.
|
||||
*/
|
||||
ticks = (timeout + 5)/10;
|
||||
|
||||
@ -214,7 +214,7 @@ t4_ddp_set_map(struct cxgbei_data *ci, void *iccp,
|
||||
|
||||
/*
|
||||
* on T4, if we use a mix of IMMD and DSGL with ULP_MEM_WRITE,
|
||||
* the order would not be garanteed, so we will stick with IMMD
|
||||
* the order would not be guaranteed, so we will stick with IMMD
|
||||
*/
|
||||
gl->tid = toep->tid;
|
||||
gl->port_id = toep->vi->pi->port_id;
|
||||
|
||||
@ -17,7 +17,7 @@
|
||||
# finite. This requires balancing the configuration/operation needs of
|
||||
# device drivers across OSes and a large number of customer application.
|
||||
#
|
||||
# Some of the more important resources to allocate and their constaints are:
|
||||
# Some of the more important resources to allocate and their constraints are:
|
||||
# 1. Virtual Interfaces: 128.
|
||||
# 2. Ingress Queues with Free Lists: 1024. PCI-E SR-IOV Virtual Functions
|
||||
# must use a power of 2 Ingress Queues.
|
||||
@ -275,7 +275,7 @@
|
||||
# to directly select the type of Physical Function to which they wish to be
|
||||
# attached.
|
||||
#
|
||||
# Note that the actual values used for the PCI-E Intelectual Property will be
|
||||
# Note that the actual values used for the PCI-E Intellectual Property will be
|
||||
# 1 less than those below since that's the way it "counts" things. For
|
||||
# readability, we use the number we actually mean ...
|
||||
#
|
||||
|
||||
@ -35,7 +35,7 @@
|
||||
********************************/
|
||||
|
||||
enum fw_retval {
|
||||
FW_SUCCESS = 0, /* completed sucessfully */
|
||||
FW_SUCCESS = 0, /* completed successfully */
|
||||
FW_EPERM = 1, /* operation not permitted */
|
||||
FW_ENOENT = 2, /* no such file or directory */
|
||||
FW_EIO = 5, /* input/output error; hw bad */
|
||||
@ -8635,7 +8635,7 @@ enum pcie_fw_eval {
|
||||
**********************************************/
|
||||
|
||||
/*
|
||||
* this register is available as 32-bit of persistent storage (accross
|
||||
* this register is available as 32-bit of persistent storage (across
|
||||
* PL_RST based chip-reset) for boot drivers (i.e. firmware and driver
|
||||
* will not write it)
|
||||
*/
|
||||
|
||||
@ -17,7 +17,7 @@
|
||||
# finite. This requires balancing the configuration/operation needs of
|
||||
# device drivers across OSes and a large number of customer application.
|
||||
#
|
||||
# Some of the more important resources to allocate and their constaints are:
|
||||
# Some of the more important resources to allocate and their constraints are:
|
||||
# 1. Virtual Interfaces: 128.
|
||||
# 2. Ingress Queues with Free Lists: 1024. PCI-E SR-IOV Virtual Functions
|
||||
# must use a power of 2 Ingress Queues.
|
||||
@ -292,7 +292,7 @@
|
||||
# to directly select the type of Physical Function to which they wish to be
|
||||
# attached.
|
||||
#
|
||||
# Note that the actual values used for the PCI-E Intelectual Property will be
|
||||
# Note that the actual values used for the PCI-E Intellectual Property will be
|
||||
# 1 less than those below since that's the way it "counts" things. For
|
||||
# readability, we use the number we actually mean ...
|
||||
#
|
||||
|
||||
@ -18,7 +18,7 @@
|
||||
# are finite. This requires balancing the configuration/operation needs of
|
||||
# device drivers across OSes and a large number of customer application.
|
||||
#
|
||||
# Some of the more important resources to allocate and their constaints are:
|
||||
# Some of the more important resources to allocate and their constraints are:
|
||||
# 1. Virtual Interfaces: 256.
|
||||
# 2. Ingress Queues with Free Lists: 1024.
|
||||
# 3. Egress Queues: 128K.
|
||||
@ -309,7 +309,7 @@
|
||||
# to directly select the type of Physical Function to which they wish to be
|
||||
# attached.
|
||||
#
|
||||
# Note that the actual values used for the PCI-E Intelectual Property will be
|
||||
# Note that the actual values used for the PCI-E Intellectual Property will be
|
||||
# 1 less than those below since that's the way it "counts" things. For
|
||||
# readability, we use the number we actually mean ...
|
||||
#
|
||||
|
||||
@ -87,7 +87,7 @@ struct tid_info {
|
||||
u_int nstids;
|
||||
u_int stid_base;
|
||||
u_int stids_in_use;
|
||||
u_int nstids_free_head; /* # of available stids at the begining */
|
||||
u_int nstids_free_head; /* # of available stids at the beginning */
|
||||
struct stid_head stids;
|
||||
|
||||
struct mtx atid_lock __aligned(CACHE_LINE_SIZE);
|
||||
|
||||
@ -156,7 +156,7 @@ struct t4_filter_tuple {
|
||||
uint16_t dport; /* destination port */
|
||||
|
||||
/*
|
||||
* A combination of these (upto 36 bits) is available. TP_VLAN_PRI_MAP
|
||||
* A combination of these (up to 36 bits) is available. TP_VLAN_PRI_MAP
|
||||
* is used to select the global mode and all filters are limited to the
|
||||
* set of fields allowed by the global mode.
|
||||
*/
|
||||
|
||||
@ -59,7 +59,7 @@ __FBSDID("$FreeBSD$");
|
||||
* can change state or increment its ref count during allocation as both of
|
||||
* these perform lookups.
|
||||
*
|
||||
* Note: We do not take refereces to ifnets in this module because both
|
||||
* Note: We do not take references to ifnets in this module because both
|
||||
* the TOE and the sockets already hold references to the interfaces and the
|
||||
* lifetime of an L2T entry is fully contained in the lifetime of the TOE.
|
||||
*/
|
||||
|
||||
@ -4146,7 +4146,7 @@ vi_full_init(struct vi_info *vi)
|
||||
|
||||
if (extra) {
|
||||
if_printf(ifp,
|
||||
"global RSS config (0x%x) cannot be accomodated.\n",
|
||||
"global RSS config (0x%x) cannot be accommodated.\n",
|
||||
hashconfig);
|
||||
}
|
||||
if (extra & RSS_HASHTYPE_RSS_IPV4)
|
||||
@ -5207,7 +5207,7 @@ cxgbe_sysctls(struct port_info *pi)
|
||||
SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, #name, CTLFLAG_RD, \
|
||||
&pi->stats.name, desc)
|
||||
|
||||
/* We get these from port_stats and they may be stale by upto 1s */
|
||||
/* We get these from port_stats and they may be stale by up to 1s */
|
||||
SYSCTL_ADD_T4_PORTSTAT(rx_ovflow0,
|
||||
"# drops due to buffer-group 0 overflows");
|
||||
SYSCTL_ADD_T4_PORTSTAT(rx_ovflow1,
|
||||
|
||||
@ -282,7 +282,7 @@ mp_ring_enqueue(struct mp_ring *r, void **items, int n, int budget)
|
||||
/*
|
||||
* Wait for other producers who got in ahead of us to enqueue their
|
||||
* items, one producer at a time. It is our turn when the ring's
|
||||
* pidx_tail reaches the begining of our reservation (pidx_start).
|
||||
* pidx_tail reaches the beginning of our reservation (pidx_start).
|
||||
*/
|
||||
while (ns.pidx_tail != pidx_start) {
|
||||
cpu_spinwait();
|
||||
|
||||
@ -3547,7 +3547,7 @@ ring_fl_db(struct adapter *sc, struct sge_fl *fl)
|
||||
}
|
||||
|
||||
/*
|
||||
* Fills up the freelist by allocating upto 'n' buffers. Buffers that are
|
||||
* Fills up the freelist by allocating up to 'n' buffers. Buffers that are
|
||||
* recycled do not count towards this allocation budget.
|
||||
*
|
||||
* Returns non-zero to indicate that this freelist should be added to the list
|
||||
@ -3569,7 +3569,7 @@ refill_fl(struct adapter *sc, struct sge_fl *fl, int n)
|
||||
FL_LOCK_ASSERT_OWNED(fl);
|
||||
|
||||
/*
|
||||
* We always stop at the begining of the hardware descriptor that's just
|
||||
* We always stop at the beginning of the hardware descriptor that's just
|
||||
* before the one with the hw cidx. This is to avoid hw pidx = hw cidx,
|
||||
* which would mean an empty freelist to the chip.
|
||||
*/
|
||||
|
||||
@ -175,7 +175,7 @@ typedef struct {
|
||||
#define TULIP_CMD_SCRAMBLER 0x01000000L /* (RW) Scrambler Mode (21140) */
|
||||
#define TULIP_CMD_PCSFUNCTION 0x00800000L /* (RW) PCS Function (21140) */
|
||||
#define TULIP_CMD_TXTHRSHLDCTL 0x00400000L /* (RW) Transmit Threshold Mode (21140) */
|
||||
#define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Foward (21140) */
|
||||
#define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Forward (21140) */
|
||||
#define TULIP_CMD_NOHEARTBEAT 0x00080000L /* (RW) No Heartbeat (21140) */
|
||||
#define TULIP_CMD_PORTSELECT 0x00040000L /* (RW) Post Select (100Mb) (21140) */
|
||||
#define TULIP_CMD_ENHCAPTEFFCT 0x00040000L /* (RW) Enhanced Capture Effecty (21041) */
|
||||
|
||||
@ -419,7 +419,7 @@ tulip_linkup(tulip_softc_t * const sc, tulip_media_t media)
|
||||
* We could set probe_timeout to 0 but setting to 3000 puts this
|
||||
* in one central place and the only matters is tulip_link is
|
||||
* followed by a tulip_timeout. Therefore setting it should not
|
||||
* result in aberrant behavour.
|
||||
* result in aberrant behaviour.
|
||||
*/
|
||||
sc->tulip_probe_timeout = 3000;
|
||||
sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
|
||||
|
||||
@ -842,7 +842,7 @@ static const struct {
|
||||
|
||||
/*
|
||||
* This driver supports a maximum of 32 tulip boards.
|
||||
* This should be enough for the forseeable future.
|
||||
* This should be enough for the foreseeable future.
|
||||
*/
|
||||
#define TULIP_MAX_DEVICES 32
|
||||
|
||||
|
||||
@ -1083,7 +1083,7 @@ typedef struct dpt_softc {
|
||||
|
||||
/*
|
||||
* Every object on a unit can have a receiver, if it treats
|
||||
* us as a target. We do that so that separate and independant
|
||||
* us as a target. We do that so that separate and independent
|
||||
* clients can consume received buffers.
|
||||
*/
|
||||
|
||||
@ -1245,7 +1245,7 @@ dpt_softc_t *dpt_minor2softc(int minor_no);
|
||||
#endif /* _KERNEL */
|
||||
|
||||
/*
|
||||
* This function substracts one timval structure from another,
|
||||
* This function subtracts one timval structure from another,
|
||||
* Returning the result in usec.
|
||||
* It assumes that less than 4 billion usecs passed form start to end.
|
||||
* If times are sensless, ~0 is returned.
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
/*
|
||||
* dpt_scsi.c: SCSI dependant code for the DPT driver
|
||||
* dpt_scsi.c: SCSI dependent code for the DPT driver
|
||||
*
|
||||
* credits: Assisted by Mike Neuffer in the early low level DPT code
|
||||
* Thanx to Mark Salyzyn of DPT for his assistance.
|
||||
@ -95,7 +95,7 @@ devclass_t dpt_devclass;
|
||||
|
||||
/*
|
||||
* These will have to be setup by parameters passed at boot/load time. For
|
||||
* perfromance reasons, we make them constants for the time being.
|
||||
* performance reasons, we make them constants for the time being.
|
||||
*/
|
||||
#define dpt_min_segs DPT_MAX_SEGS
|
||||
#define dpt_max_segs DPT_MAX_SEGS
|
||||
@ -598,7 +598,7 @@ dpt_detect_cache(dpt_softc_t *dpt, dpt_ccb_t *dccb, u_int32_t dccb_busaddr,
|
||||
mtx_assert(&dpt->lock, MA_OWNED);
|
||||
|
||||
/*
|
||||
* Default setting, for best perfromance..
|
||||
* Default setting, for best performance..
|
||||
* This is what virtually all cards default to..
|
||||
*/
|
||||
dpt->cache_type = DPT_CACHE_WRITEBACK;
|
||||
@ -1878,7 +1878,7 @@ dpt_reset_hba(dpt_softc_t *dpt)
|
||||
ccb->cp_msg[0] = HA_IDENTIFY_MSG | HA_DISCO_RECO;
|
||||
ccb->cp_scsi_cmd = 0; /* Should be ignored */
|
||||
|
||||
/* Lock up the submitted queue. We are very persistant here */
|
||||
/* Lock up the submitted queue. We are very persistent here */
|
||||
while (dpt->queue_status & DPT_SUBMITTED_QUEUE_ACTIVE) {
|
||||
DELAY(100);
|
||||
}
|
||||
|
||||
@ -812,7 +812,7 @@ struct drm_fence_arg {
|
||||
*/
|
||||
#define DRM_BO_HINT_WAIT_LAZY 0x00000008
|
||||
/*
|
||||
* The client has compute relocations refering to this buffer using the
|
||||
* The client has compute relocations referring to this buffer using the
|
||||
* offset in the presumed_offset field. If that offset ends up matching
|
||||
* where this buffer lands, the kernel is free to skip executing those
|
||||
* relocations
|
||||
|
||||
@ -668,7 +668,7 @@ static int drm_do_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *reque
|
||||
dma->buflist[i + dma->buf_count] = &entry->buflist[i];
|
||||
}
|
||||
|
||||
/* No allocations failed, so now we can replace the orginal pagelist
|
||||
/* No allocations failed, so now we can replace the original pagelist
|
||||
* with the new one.
|
||||
*/
|
||||
free(dma->pagelist, DRM_MEM_PAGES);
|
||||
|
||||
@ -43,7 +43,7 @@ int drm_mmap(struct cdev *kdev, vm_ooffset_t offset, vm_paddr_t *paddr,
|
||||
|
||||
/* d_mmap gets called twice, we can only reference file_priv during
|
||||
* the first call. We need to assume that if error is EBADF the
|
||||
* call was succesful and the client is authenticated.
|
||||
* call was successful and the client is authenticated.
|
||||
*/
|
||||
error = devfs_get_cdevpriv((void **)&file_priv);
|
||||
if (error == ENOENT) {
|
||||
|
||||
@ -307,7 +307,7 @@ typedef struct drm_i915_private {
|
||||
* Flag if the hardware appears to be wedged.
|
||||
*
|
||||
* This is set when attempts to idle the device timeout.
|
||||
* It prevents command submission from occuring and makes
|
||||
* It prevents command submission from occurring and makes
|
||||
* every pending request fail
|
||||
*/
|
||||
int wedged;
|
||||
|
||||
@ -709,10 +709,10 @@ static int mach64_dma_dispatch_blit(struct drm_device * dev,
|
||||
* XXX: This is overkill. The most efficient solution would be having
|
||||
* two sets of buffers (one set private for vertex data, the other set
|
||||
* client-writable for blits). However that would bring more complexity
|
||||
* and would break backward compatability. The solution currently
|
||||
* and would break backward compatibility. The solution currently
|
||||
* implemented is keeping all buffers private, allowing to secure the
|
||||
* driver, without increasing complexity at the expense of some speed
|
||||
* transfering data.
|
||||
* transferring data.
|
||||
*/
|
||||
verify_ret = copy_from_user_blit(GETBUFPTR(copy_buf), blit->buf, used);
|
||||
|
||||
|
||||
@ -433,7 +433,7 @@ int mga_driver_load(struct drm_device *dev, unsigned long flags)
|
||||
* Bootstrap the driver for AGP DMA.
|
||||
*
|
||||
* \todo
|
||||
* Investigate whether there is any benifit to storing the WARP microcode in
|
||||
* Investigate whether there is any benefit to storing the WARP microcode in
|
||||
* AGP memory. If not, the microcode may as well always be put in PCI
|
||||
* memory.
|
||||
*
|
||||
|
||||
@ -108,7 +108,7 @@ __FBSDID("$FreeBSD$");
|
||||
*/
|
||||
#define MGA_NR_SAREA_CLIPRECTS 8
|
||||
|
||||
/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
|
||||
/* 2 heaps (1 for card, 1 for agp), each divided into up to 128
|
||||
* regions, subject to a minimum region size of (1<<16) == 64k.
|
||||
*
|
||||
* Clients may subdivide regions internally, but when sharing between
|
||||
|
||||
@ -231,7 +231,7 @@ void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
|
||||
u32 agp_base_lo = agp_base & 0xffffffff;
|
||||
u32 r6xx_agp_base = (agp_base >> 22) & 0x3ffff;
|
||||
|
||||
/* R6xx/R7xx must be aligned to a 4MB boundry */
|
||||
/* R6xx/R7xx must be aligned to a 4MB boundary */
|
||||
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
|
||||
RADEON_WRITE(R700_MC_VM_AGP_BASE, r6xx_agp_base);
|
||||
else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
|
||||
|
||||
@ -618,7 +618,7 @@ typedef struct drm_radeon_vertex2 {
|
||||
} drm_radeon_vertex2_t;
|
||||
|
||||
/* v1.3 - obsoletes drm_radeon_vertex2
|
||||
* - allows arbitarily large cliprect list
|
||||
* - allows arbitrarily large cliprect list
|
||||
* - allows updating of tcl packet, vector and scalar state
|
||||
* - allows memory-efficient description of state updates
|
||||
* - allows state to be emitted without a primitive
|
||||
|
||||
@ -365,7 +365,7 @@ typedef struct drm_radeon_private {
|
||||
|
||||
u32 scratch_ages[5];
|
||||
|
||||
/* starting from here on, data is preserved accross an open */
|
||||
/* starting from here on, data is preserved across an open */
|
||||
uint32_t flags; /* see radeon_chip_flags */
|
||||
unsigned long fb_aper_offset;
|
||||
|
||||
|
||||
@ -950,7 +950,7 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev,
|
||||
}
|
||||
|
||||
/* hyper z clear */
|
||||
/* no docs available, based on reverse engeneering by Stephane Marchesin */
|
||||
/* no docs available, based on reverse engineering by Stephane Marchesin */
|
||||
if ((flags & (RADEON_DEPTH | RADEON_STENCIL))
|
||||
&& (flags & RADEON_CLEAR_FASTZ)) {
|
||||
|
||||
@ -1064,7 +1064,7 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev,
|
||||
/* judging by the first tile offset needed, could possibly
|
||||
directly address/clear 4x4 tiles instead of 8x2 * 4x4
|
||||
macro tiles, though would still need clear mask for
|
||||
right/bottom if truely 4x4 granularity is desired ? */
|
||||
right/bottom if truly 4x4 granularity is desired ? */
|
||||
OUT_RING(tileoffset * 16);
|
||||
/* the number of tiles to clear */
|
||||
OUT_RING(nrtilesx + 1);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user