cxgbe(4): Use opaque cookies or tid range-checks to determine the
intended recipient of a CPL when it can't be determined solely from the opcode. Retire the per-queue handlers for such CPLs in favor of the new scheme. Sponsored by: Chelsio Communications
This commit is contained in:
Navdeep Parhar
parent
44af5666d9
commit
4535e8046f
@ -365,6 +365,19 @@ enum {
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NM_BUSY = 2,
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};
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enum {
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CPL_COOKIE_RESERVED = 0,
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CPL_COOKIE_FILTER,
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CPL_COOKIE_DDP0,
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CPL_COOKIE_DDP1,
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CPL_COOKIE_TOM,
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CPL_COOKIE_AVAILABLE1,
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CPL_COOKIE_AVAILABLE2,
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CPL_COOKIE_AVAILABLE3,
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NUM_CPL_COOKIES = 8 /* Limited by M_COOKIE. Do not increase. */
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};
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struct sge_iq;
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struct rss_header;
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typedef int (*cpl_handler_t)(struct sge_iq *, const struct rss_header *,
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@ -379,8 +392,6 @@ struct sge_iq {
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uint32_t flags;
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volatile int state;
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struct adapter *adapter;
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cpl_handler_t set_tcb_rpl;
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cpl_handler_t l2t_write_rpl;
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struct iq_desc *desc; /* KVA of descriptor ring */
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int8_t intr_pktc_idx; /* packet count threshold index */
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uint8_t gen; /* generation bit */
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@ -1203,9 +1214,10 @@ int parse_pkt(struct adapter *, struct mbuf **);
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void *start_wrq_wr(struct sge_wrq *, int, struct wrq_cookie *);
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void commit_wrq_wr(struct sge_wrq *, void *, struct wrq_cookie *);
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int tnl_cong(struct port_info *, int);
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int t4_register_an_handler(an_handler_t);
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int t4_register_fw_msg_handler(int, fw_msg_handler_t);
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int t4_register_cpl_handler(int, cpl_handler_t);
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void t4_register_an_handler(an_handler_t);
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void t4_register_fw_msg_handler(int, fw_msg_handler_t);
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void t4_register_cpl_handler(int, cpl_handler_t);
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void t4_register_shared_cpl_handler(int, cpl_handler_t, int);
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/* t4_tracer.c */
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struct t4_tracer;
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@ -617,8 +617,6 @@ static int del_filter(struct adapter *, struct t4_filter *);
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static void clear_filter(struct filter_entry *);
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static int set_filter_wr(struct adapter *, int);
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static int del_filter_wr(struct adapter *, int);
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static int set_tcb_rpl(struct sge_iq *, const struct rss_header *,
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struct mbuf *);
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static int get_sge_context(struct adapter *, struct t4_sge_context *);
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static int load_fw(struct adapter *, struct t4_data *);
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static int load_cfg(struct adapter *, struct t4_data *);
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@ -9269,22 +9267,6 @@ t4_filter_rpl(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
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return (0);
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}
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static int
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set_tcb_rpl(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
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{
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MPASS(iq->set_tcb_rpl != NULL);
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return (iq->set_tcb_rpl(iq, rss, m));
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}
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static int
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l2t_write_rpl(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
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{
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MPASS(iq->l2t_write_rpl != NULL);
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return (iq->l2t_write_rpl(iq, rss, m));
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}
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static int
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get_sge_context(struct adapter *sc, struct t4_sge_context *cntxt)
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{
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@ -10556,8 +10538,10 @@ mod_event(module_t mod, int cmd, void *arg)
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sx_xlock(&mlu);
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if (loaded++ == 0) {
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t4_sge_modload();
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t4_register_cpl_handler(CPL_SET_TCB_RPL, set_tcb_rpl);
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t4_register_cpl_handler(CPL_L2T_WRITE_RPL, l2t_write_rpl);
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t4_register_shared_cpl_handler(CPL_SET_TCB_RPL,
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t4_filter_rpl, CPL_COOKIE_FILTER);
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t4_register_shared_cpl_handler(CPL_L2T_WRITE_RPL,
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do_l2t_write_rpl, CPL_COOKIE_FILTER);
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t4_register_cpl_handler(CPL_TRACE_PKT, t4_trace_pkt);
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t4_register_cpl_handler(CPL_T5_TRACE_PKT, t5_trace_pkt);
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sx_init(&t4_list_lock, "T4/T5 adapters");
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@ -285,98 +285,122 @@ static counter_u64_t extfree_rels;
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an_handler_t t4_an_handler;
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fw_msg_handler_t t4_fw_msg_handler[NUM_FW6_TYPES];
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cpl_handler_t t4_cpl_handler[NUM_CPL_CMDS];
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cpl_handler_t set_tcb_rpl_handlers[NUM_CPL_COOKIES];
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cpl_handler_t l2t_write_rpl_handlers[NUM_CPL_COOKIES];
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static int
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an_not_handled(struct sge_iq *iq, const struct rsp_ctrl *ctrl)
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{
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#ifdef INVARIANTS
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panic("%s: async notification on iq %p (ctrl %p)", __func__, iq, ctrl);
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#else
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log(LOG_ERR, "%s: async notification on iq %p (ctrl %p)\n",
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__func__, iq, ctrl);
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#endif
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return (EDOOFUS);
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}
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int
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void
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t4_register_an_handler(an_handler_t h)
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{
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uintptr_t *loc, new;
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uintptr_t *loc;
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new = h ? (uintptr_t)h : (uintptr_t)an_not_handled;
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loc = (uintptr_t *) &t4_an_handler;
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atomic_store_rel_ptr(loc, new);
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MPASS(h == NULL || t4_an_handler == NULL);
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return (0);
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loc = (uintptr_t *)&t4_an_handler;
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atomic_store_rel_ptr(loc, (uintptr_t)h);
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}
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static int
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fw_msg_not_handled(struct adapter *sc, const __be64 *rpl)
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{
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const struct cpl_fw6_msg *cpl =
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__containerof(rpl, struct cpl_fw6_msg, data[0]);
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#ifdef INVARIANTS
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panic("%s: fw_msg type %d", __func__, cpl->type);
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#else
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log(LOG_ERR, "%s: fw_msg type %d\n", __func__, cpl->type);
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#endif
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return (EDOOFUS);
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}
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int
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void
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t4_register_fw_msg_handler(int type, fw_msg_handler_t h)
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{
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uintptr_t *loc, new;
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if (type >= nitems(t4_fw_msg_handler))
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return (EINVAL);
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uintptr_t *loc;
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MPASS(type < nitems(t4_fw_msg_handler));
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MPASS(h == NULL || t4_fw_msg_handler[type] == NULL);
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/*
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* These are dispatched by the handler for FW{4|6}_CPL_MSG using the CPL
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* handler dispatch table. Reject any attempt to install a handler for
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* this subtype.
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*/
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if (type == FW_TYPE_RSSCPL || type == FW6_TYPE_RSSCPL)
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return (EINVAL);
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MPASS(type != FW_TYPE_RSSCPL);
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MPASS(type != FW6_TYPE_RSSCPL);
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new = h ? (uintptr_t)h : (uintptr_t)fw_msg_not_handled;
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loc = (uintptr_t *) &t4_fw_msg_handler[type];
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atomic_store_rel_ptr(loc, new);
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loc = (uintptr_t *)&t4_fw_msg_handler[type];
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atomic_store_rel_ptr(loc, (uintptr_t)h);
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}
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return (0);
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void
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t4_register_cpl_handler(int opcode, cpl_handler_t h)
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{
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uintptr_t *loc;
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MPASS(opcode < nitems(t4_cpl_handler));
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MPASS(h == NULL || t4_cpl_handler[opcode] == NULL);
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loc = (uintptr_t *)&t4_cpl_handler[opcode];
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atomic_store_rel_ptr(loc, (uintptr_t)h);
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}
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static int
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cpl_not_handled(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
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set_tcb_rpl_handler(struct sge_iq *iq, const struct rss_header *rss,
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struct mbuf *m)
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{
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const struct cpl_set_tcb_rpl *cpl = (const void *)(rss + 1);
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u_int tid;
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int cookie;
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#ifdef INVARIANTS
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panic("%s: opcode 0x%02x on iq %p with payload %p",
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__func__, rss->opcode, iq, m);
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#else
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log(LOG_ERR, "%s: opcode 0x%02x on iq %p with payload %p\n",
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__func__, rss->opcode, iq, m);
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m_freem(m);
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#endif
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return (EDOOFUS);
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MPASS(m == NULL);
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tid = GET_TID(cpl);
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if (is_ftid(iq->adapter, tid)) {
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/*
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* The return code for filter-write is put in the CPL cookie so
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* we have to rely on the hardware tid (is_ftid) to determine
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* that this is a response to a filter.
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*/
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cookie = CPL_COOKIE_FILTER;
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} else {
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cookie = G_COOKIE(cpl->cookie);
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}
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MPASS(cookie > CPL_COOKIE_RESERVED);
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MPASS(cookie < nitems(set_tcb_rpl_handlers));
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return (set_tcb_rpl_handlers[cookie](iq, rss, m));
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}
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int
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t4_register_cpl_handler(int opcode, cpl_handler_t h)
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static int
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l2t_write_rpl_handler(struct sge_iq *iq, const struct rss_header *rss,
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struct mbuf *m)
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{
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uintptr_t *loc, new;
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const struct cpl_l2t_write_rpl *rpl = (const void *)(rss + 1);
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unsigned int cookie;
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if (opcode >= nitems(t4_cpl_handler))
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return (EINVAL);
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MPASS(m == NULL);
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new = h ? (uintptr_t)h : (uintptr_t)cpl_not_handled;
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loc = (uintptr_t *) &t4_cpl_handler[opcode];
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atomic_store_rel_ptr(loc, new);
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cookie = GET_TID(rpl) & F_SYNC_WR ? CPL_COOKIE_TOM : CPL_COOKIE_FILTER;
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return (l2t_write_rpl_handlers[cookie](iq, rss, m));
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}
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return (0);
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static void
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t4_init_shared_cpl_handlers(void)
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{
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t4_register_cpl_handler(CPL_SET_TCB_RPL, set_tcb_rpl_handler);
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t4_register_cpl_handler(CPL_L2T_WRITE_RPL, l2t_write_rpl_handler);
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}
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void
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t4_register_shared_cpl_handler(int opcode, cpl_handler_t h, int cookie)
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{
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uintptr_t *loc;
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MPASS(opcode < nitems(t4_cpl_handler));
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MPASS(cookie > CPL_COOKIE_RESERVED);
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MPASS(cookie < NUM_CPL_COOKIES);
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MPASS(t4_cpl_handler[opcode] != NULL);
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switch (opcode) {
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case CPL_SET_TCB_RPL:
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loc = (uintptr_t *)&set_tcb_rpl_handlers[cookie];
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break;
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case CPL_L2T_WRITE_RPL:
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loc = (uintptr_t *)&l2t_write_rpl_handlers[cookie];
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break;
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default:
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MPASS(0);
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return;
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}
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MPASS(h == NULL || *loc == (uintptr_t)NULL);
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atomic_store_rel_ptr(loc, (uintptr_t)h);
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}
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/*
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@ -385,7 +409,6 @@ t4_register_cpl_handler(int opcode, cpl_handler_t h)
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void
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t4_sge_modload(void)
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{
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int i;
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if (fl_pktshift < 0 || fl_pktshift > 7) {
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printf("Invalid hw.cxgbe.fl_pktshift value (%d),"
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@ -425,12 +448,7 @@ t4_sge_modload(void)
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counter_u64_zero(extfree_refs);
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counter_u64_zero(extfree_rels);
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t4_an_handler = an_not_handled;
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for (i = 0; i < nitems(t4_fw_msg_handler); i++)
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t4_fw_msg_handler[i] = fw_msg_not_handled;
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for (i = 0; i < nitems(t4_cpl_handler); i++)
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t4_cpl_handler[i] = cpl_not_handled;
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t4_init_shared_cpl_handlers();
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t4_register_cpl_handler(CPL_FW4_MSG, handle_fw_msg);
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t4_register_cpl_handler(CPL_FW6_MSG, handle_fw_msg);
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t4_register_cpl_handler(CPL_SGE_EGR_UPDATE, handle_sge_egr_update);
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@ -2901,11 +2919,8 @@ alloc_fwq(struct adapter *sc)
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init_iq(fwq, sc, 0, 0, FW_IQ_QSIZE);
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if (sc->flags & IS_VF)
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intr_idx = 0;
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else {
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else
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intr_idx = sc->intr_count > 1 ? 1 : 0;
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fwq->set_tcb_rpl = t4_filter_rpl;
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fwq->l2t_write_rpl = do_l2t_write_rpl;
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}
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rc = alloc_iq_fl(&sc->port[0]->vi[0], fwq, NULL, intr_idx, -1);
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if (rc != 0) {
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device_printf(sc->dev,
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@ -1902,44 +1902,6 @@ do_fw4_ack(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
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return (0);
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}
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int
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do_set_tcb_rpl(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
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{
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struct adapter *sc = iq->adapter;
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const struct cpl_set_tcb_rpl *cpl = (const void *)(rss + 1);
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unsigned int tid = GET_TID(cpl);
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struct toepcb *toep;
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#ifdef INVARIANTS
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unsigned int opcode = G_CPL_OPCODE(be32toh(OPCODE_TID(cpl)));
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#endif
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KASSERT(opcode == CPL_SET_TCB_RPL,
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("%s: unexpected opcode 0x%x", __func__, opcode));
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KASSERT(m == NULL, ("%s: wasn't expecting payload", __func__));
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MPASS(iq != &sc->sge.fwq);
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toep = lookup_tid(sc, tid);
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if (toep->ulp_mode == ULP_MODE_TCPDDP) {
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handle_ddp_tcb_rpl(toep, cpl);
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return (0);
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}
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/*
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* TOM and/or other ULPs don't request replies for CPL_SET_TCB or
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* CPL_SET_TCB_FIELD requests. This can easily change and when it does
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* the dispatch code will go here.
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*/
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#ifdef INVARIANTS
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panic("%s: Unexpected CPL_SET_TCB_RPL for tid %u on iq %p", __func__,
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tid, iq);
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#else
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log(LOG_ERR, "%s: Unexpected CPL_SET_TCB_RPL for tid %u on iq %p\n",
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__func__, tid, iq);
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#endif
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return (0);
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}
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void
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t4_set_tcb_field(struct adapter *sc, struct sge_wrq *wrq, struct toepcb *toep,
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uint16_t word, uint64_t mask, uint64_t val, int reply, int cookie)
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@ -1949,6 +1911,9 @@ t4_set_tcb_field(struct adapter *sc, struct sge_wrq *wrq, struct toepcb *toep,
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struct ofld_tx_sdesc *txsd;
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MPASS((cookie & ~M_COOKIE) == 0);
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if (reply) {
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MPASS(cookie != CPL_COOKIE_RESERVED);
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}
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wr = alloc_wrqe(sizeof(*req), wrq);
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if (wr == NULL) {
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@ -626,11 +626,17 @@ enum {
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DDP_BUF1_INVALIDATED
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};
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void
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handle_ddp_tcb_rpl(struct toepcb *toep, const struct cpl_set_tcb_rpl *cpl)
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CTASSERT(DDP_BUF0_INVALIDATED == CPL_COOKIE_DDP0);
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static int
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do_ddp_tcb_rpl(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
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{
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struct adapter *sc = iq->adapter;
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const struct cpl_set_tcb_rpl *cpl = (const void *)(rss + 1);
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unsigned int tid = GET_TID(cpl);
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unsigned int db_idx;
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struct inpcb *inp = toep->inp;
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struct toepcb *toep;
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struct inpcb *inp;
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struct ddp_buffer *db;
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struct kaiocb *job;
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long copied;
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@ -638,6 +644,8 @@ handle_ddp_tcb_rpl(struct toepcb *toep, const struct cpl_set_tcb_rpl *cpl)
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if (cpl->status != CPL_ERR_NONE)
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panic("XXX: tcp_rpl failed: %d", cpl->status);
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toep = lookup_tid(sc, tid);
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inp = toep->inp;
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switch (cpl->cookie) {
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case V_WORD(W_TCB_RX_DDP_FLAGS) | V_COOKIE(DDP_BUF0_INVALIDATED):
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case V_WORD(W_TCB_RX_DDP_FLAGS) | V_COOKIE(DDP_BUF1_INVALIDATED):
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@ -645,6 +653,7 @@ handle_ddp_tcb_rpl(struct toepcb *toep, const struct cpl_set_tcb_rpl *cpl)
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* XXX: This duplicates a lot of code with handle_ddp_data().
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*/
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db_idx = G_COOKIE(cpl->cookie) - DDP_BUF0_INVALIDATED;
|
||||
MPASS(db_idx < nitems(toep->ddp.db));
|
||||
INP_WLOCK(inp);
|
||||
DDP_LOCK(toep);
|
||||
db = &toep->ddp.db[db_idx];
|
||||
@ -689,6 +698,8 @@ handle_ddp_tcb_rpl(struct toepcb *toep, const struct cpl_set_tcb_rpl *cpl)
|
||||
panic("XXX: unknown tcb_rpl offset %#x, cookie %#x",
|
||||
G_WORD(cpl->cookie), G_COOKIE(cpl->cookie));
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
void
|
||||
@ -1941,6 +1952,10 @@ void
|
||||
t4_ddp_mod_load(void)
|
||||
{
|
||||
|
||||
t4_register_shared_cpl_handler(CPL_SET_TCB_RPL, do_ddp_tcb_rpl,
|
||||
CPL_COOKIE_DDP0);
|
||||
t4_register_shared_cpl_handler(CPL_SET_TCB_RPL, do_ddp_tcb_rpl,
|
||||
CPL_COOKIE_DDP1);
|
||||
t4_register_cpl_handler(CPL_RX_DATA_DDP, do_rx_data_ddp);
|
||||
t4_register_cpl_handler(CPL_RX_DDP_COMPLETE, do_rx_ddp_complete);
|
||||
TAILQ_INIT(&ddp_orphan_pagesets);
|
||||
|
||||
@ -1330,8 +1330,7 @@ t4_tom_activate(struct adapter *sc)
|
||||
struct tom_data *td;
|
||||
struct toedev *tod;
|
||||
struct vi_info *vi;
|
||||
struct sge_ofld_rxq *ofld_rxq;
|
||||
int i, j, rc, v;
|
||||
int i, rc, v;
|
||||
|
||||
ASSERT_SYNCHRONIZED_OP(sc);
|
||||
|
||||
@ -1398,10 +1397,6 @@ t4_tom_activate(struct adapter *sc)
|
||||
for_each_port(sc, i) {
|
||||
for_each_vi(sc->port[i], v, vi) {
|
||||
TOEDEV(vi->ifp) = &td->tod;
|
||||
for_each_ofld_rxq(vi, j, ofld_rxq) {
|
||||
ofld_rxq->iq.set_tcb_rpl = do_set_tcb_rpl;
|
||||
ofld_rxq->iq.l2t_write_rpl = do_l2t_write_rpl2;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1504,6 +1499,8 @@ t4_tom_mod_load(void)
|
||||
struct protosw *tcp_protosw, *tcp6_protosw;
|
||||
|
||||
/* CPL handlers */
|
||||
t4_register_shared_cpl_handler(CPL_L2T_WRITE_RPL, do_l2t_write_rpl2,
|
||||
CPL_COOKIE_TOM);
|
||||
t4_init_connect_cpl_handlers();
|
||||
t4_init_listen_cpl_handlers();
|
||||
t4_init_cpl_io_handlers();
|
||||
@ -1568,6 +1565,7 @@ t4_tom_mod_unload(void)
|
||||
t4_uninit_connect_cpl_handlers();
|
||||
t4_uninit_listen_cpl_handlers();
|
||||
t4_uninit_cpl_io_handlers();
|
||||
t4_register_shared_cpl_handler(CPL_L2T_WRITE_RPL, NULL, CPL_COOKIE_TOM);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
@ -390,7 +390,6 @@ void t4_set_tcb_field(struct adapter *, struct sge_wrq *, struct toepcb *,
|
||||
uint16_t, uint64_t, uint64_t, int, int);
|
||||
void t4_push_frames(struct adapter *sc, struct toepcb *toep, int drop);
|
||||
void t4_push_pdus(struct adapter *sc, struct toepcb *toep, int drop);
|
||||
int do_set_tcb_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *);
|
||||
|
||||
/* t4_ddp.c */
|
||||
int t4_init_ppod_region(struct ppod_region *, struct t4_range *, u_int,
|
||||
@ -416,7 +415,6 @@ void ddp_queue_toep(struct toepcb *);
|
||||
void release_ddp_resources(struct toepcb *toep);
|
||||
void handle_ddp_close(struct toepcb *, struct tcpcb *, uint32_t);
|
||||
void handle_ddp_indicate(struct toepcb *);
|
||||
void handle_ddp_tcb_rpl(struct toepcb *, const struct cpl_set_tcb_rpl *);
|
||||
void insert_ddp_data(struct toepcb *, uint32_t);
|
||||
const struct offload_settings *lookup_offload_policy(struct adapter *, int,
|
||||
struct mbuf *, uint16_t, struct inpcb *);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user