From 46abd6a27e7333b45dd5735ac23b64361634a138 Mon Sep 17 00:00:00 2001 From: Stanislav Galabov Date: Fri, 6 Mar 2020 08:50:18 +0000 Subject: [PATCH] Add Gigabit Ethernet support for RT3883 and RT2880 Ralink/Mediatek SoCs Submitted by: yamori813@yahoo.co.jp Reported by: yamori813@yahoo.co.jp Reviewed by: sgalabov, ray Obtained from: yamori813@yahoo.co.jp Differential Revision: https://reviews.freebsd.org/D22618 --- sys/dev/rt/if_rt.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/sys/dev/rt/if_rt.c b/sys/dev/rt/if_rt.c index 2bb81fe98c79..2c9c503ccf91 100644 --- a/sys/dev/rt/if_rt.c +++ b/sys/dev/rt/if_rt.c @@ -101,6 +101,7 @@ __FBSDID("$FreeBSD$"); #define RT_CHIPID_RT2880 0x2880 #define RT_CHIPID_RT3050 0x3050 +#define RT_CHIPID_RT3883 0x3883 #define RT_CHIPID_RT5350 0x5350 #define RT_CHIPID_MT7620 0x7620 #define RT_CHIPID_MT7621 0x7621 @@ -111,7 +112,7 @@ static const struct ofw_compat_data rt_compat_data[] = { { "ralink,rt2880-eth", RT_CHIPID_RT2880 }, { "ralink,rt3050-eth", RT_CHIPID_RT3050 }, { "ralink,rt3352-eth", RT_CHIPID_RT3050 }, - { "ralink,rt3883-eth", RT_CHIPID_RT3050 }, + { "ralink,rt3883-eth", RT_CHIPID_RT3883 }, { "ralink,rt5350-eth", RT_CHIPID_RT5350 }, { "ralink,mt7620a-eth", RT_CHIPID_MT7620 }, { "mediatek,mt7620-eth", RT_CHIPID_MT7620 }, @@ -355,10 +356,18 @@ rt_attach(device_t dev) struct rt_softc *sc; struct ifnet *ifp; int error, i; +#ifdef FDT + phandle_t node; + char fdtval[32]; +#endif sc = device_get_softc(dev); sc->dev = dev; +#ifdef FDT + node = ofw_bus_get_node(sc->dev); +#endif + mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK, MTX_DEF | MTX_RECURSE); @@ -480,8 +489,16 @@ rt_attach(device_t dev) GDM_DST_PORT_CPU << GDM_OFRC_P_SHIFT /* fwd Other to CPU */ )); - if (sc->rt_chipid == RT_CHIPID_RT2880) - RT_WRITE(sc, MDIO_CFG, MDIO_2880_100T_INIT); +#ifdef FDT + if (sc->rt_chipid == RT_CHIPID_RT2880 || + sc->rt_chipid == RT_CHIPID_RT3883) { + if (OF_getprop(node, "port-mode", fdtval, sizeof(fdtval)) > 0 && + strcmp(fdtval, "gigasw") == 0) + RT_WRITE(sc, MDIO_CFG, MDIO_2880_GIGA_INIT); + else + RT_WRITE(sc, MDIO_CFG, MDIO_2880_100T_INIT); + } +#endif /* allocate Tx and Rx rings */ for (i = 0; i < RT_SOFTC_TX_RING_COUNT; i++) { @@ -2912,7 +2929,7 @@ rtmdio_probe(device_t dev) if (!ofw_bus_is_compatible(dev, "ralink,rt2880-mdio")) return (ENXIO); - device_set_desc(dev, "FV built-in ethernet interface, MDIO controller"); + device_set_desc(dev, "RT built-in ethernet interface, MDIO controller"); return(0); }