Improve device mode (gadget) stall handling.

Some hardware easily comes out of sync with regard to whether the current or
the next control transfer should be stalled, if a stall command is always
issued before receiving the SETUP packet. After this patch the stall command
will only be issued when a transfer should actually be stalled.

Submitted by:	Hans Petter Selasky
This commit is contained in:
Andrew Thompson 2009-05-21 17:39:21 +00:00
parent b47fd40452
commit 476183df94
10 changed files with 25 additions and 10 deletions

View File

@ -848,7 +848,7 @@ at91dci_setup_standard_chain_sub(struct at91dci_std_temp *temp)
td->remainder = temp->len;
td->fifo_bank = 0;
td->error = 0;
td->did_stall = 0;
td->did_stall = temp->did_stall;
td->short_pkt = temp->short_pkt;
td->alt_next = temp->setup_alt_next;
}
@ -879,6 +879,7 @@ at91dci_setup_standard_chain(struct usb2_xfer *xfer)
temp.td_next = xfer->td_start[0];
temp.offset = 0;
temp.setup_alt_next = xfer->flags_int.short_frames_ok;
temp.did_stall = !xfer->flags_int.control_stall;
sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
ep_no = (xfer->endpoint & UE_ADDR);

View File

@ -169,6 +169,7 @@ struct at91dci_std_temp {
* short_pkt = 1: transfer should not be short terminated
*/
uint8_t setup_alt_next;
uint8_t did_stall;
};
struct at91dci_config_desc {

View File

@ -751,7 +751,7 @@ atmegadci_setup_standard_chain_sub(struct atmegadci_std_temp *temp)
td->offset = temp->offset;
td->remainder = temp->len;
td->error = 0;
td->did_stall = 0;
td->did_stall = temp->did_stall;
td->short_pkt = temp->short_pkt;
td->alt_next = temp->setup_alt_next;
}
@ -782,6 +782,7 @@ atmegadci_setup_standard_chain(struct usb2_xfer *xfer)
temp.td_next = xfer->td_start[0];
temp.offset = 0;
temp.setup_alt_next = xfer->flags_int.short_frames_ok;
temp.did_stall = !xfer->flags_int.control_stall;
sc = ATMEGA_BUS2SC(xfer->xroot->bus);
ep_no = (xfer->endpoint & UE_ADDR);

View File

@ -222,6 +222,7 @@ struct atmegadci_std_temp {
* short_pkt = 1: transfer should not be short terminated
*/
uint8_t setup_alt_next;
uint8_t did_stall;
};
struct atmegadci_config_desc {

View File

@ -1099,7 +1099,7 @@ musbotg_setup_standard_chain_sub(struct musbotg_std_temp *temp)
td->offset = temp->offset;
td->remainder = temp->len;
td->error = 0;
td->did_stall = 0;
td->did_stall = temp->did_stall;
td->short_pkt = temp->short_pkt;
td->alt_next = temp->setup_alt_next;
}
@ -1129,6 +1129,7 @@ musbotg_setup_standard_chain(struct usb2_xfer *xfer)
temp.td_next = xfer->td_start[0];
temp.offset = 0;
temp.setup_alt_next = xfer->flags_int.short_frames_ok;
temp.did_stall = !xfer->flags_int.control_stall;
sc = MUSBOTG_BUS2SC(xfer->xroot->bus);
ep_no = (xfer->endpoint & UE_ADDR);

View File

@ -332,6 +332,7 @@ struct musbotg_std_temp {
* short_pkt = 1: transfer should not be short terminated
*/
uint8_t setup_alt_next;
uint8_t did_stall;
};
struct musbotg_config_desc {

View File

@ -410,10 +410,10 @@ repeat:
/* read out EPCON register */
/* enable RX input */
if (!td->did_stall) {
if (!td->did_enable) {
uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
USS820_EPCON, 0xFF, USS820_EPCON_RXIE);
td->did_stall = 1;
td->did_enable = 1;
}
return (1); /* not complete */
}
@ -573,10 +573,10 @@ repeat:
* Enable TX output, which must happen after that we have written
* data into the FIFO. This is undocumented.
*/
if (!td->did_stall) {
if (!td->did_enable) {
uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
USS820_EPCON, 0xFF, USS820_EPCON_TXOE);
td->did_stall = 1;
td->did_enable = 1;
}
/* check remainder */
if (td->remainder == 0) {
@ -813,7 +813,8 @@ uss820dci_setup_standard_chain_sub(struct uss820_std_temp *temp)
td->offset = temp->offset;
td->remainder = temp->len;
td->error = 0;
td->did_stall = 0;
td->did_enable = 0;
td->did_stall = temp->did_stall;
td->short_pkt = temp->short_pkt;
td->alt_next = temp->setup_alt_next;
}
@ -843,6 +844,7 @@ uss820dci_setup_standard_chain(struct usb2_xfer *xfer)
temp.td_next = xfer->td_start[0];
temp.offset = 0;
temp.setup_alt_next = xfer->flags_int.short_frames_ok;
temp.did_stall = !xfer->flags_int.control_stall;
sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
ep_no = (xfer->endpoint & UE_ADDR);

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@ -280,6 +280,7 @@ struct uss820dci_td {
uint8_t short_pkt:1;
uint8_t support_multi_buffer:1;
uint8_t did_stall:1;
uint8_t did_enable:1;
};
struct uss820_std_temp {
@ -296,6 +297,7 @@ struct uss820_std_temp {
* short_pkt = 1: transfer should not be short terminated
*/
uint8_t setup_alt_next;
uint8_t did_stall;
};
struct uss820dci_config_desc {

View File

@ -371,6 +371,7 @@ struct usb2_xfer_flags_int {
uint8_t control_hdr:1; /* set if control header should be
* sent */
uint8_t control_act:1; /* set if control transfer is active */
uint8_t control_stall:1; /* set if control transfer should be stalled */
uint8_t short_frames_ok:1; /* filtered version */
uint8_t short_xfer_ok:1; /* filtered version */

View File

@ -1225,9 +1225,13 @@ usb2_start_hardware_sub(struct usb2_xfer *xfer)
usb2_frlength_t len;
/* Check for control endpoint stall */
if (xfer->flags.stall_pipe) {
/* no longer active */
if (xfer->flags.stall_pipe && xfer->flags_int.control_act) {
/* the control transfer is no longer active */
xfer->flags_int.control_stall = 1;
xfer->flags_int.control_act = 0;
} else {
/* don't stall control transfer by default */
xfer->flags_int.control_stall = 0;
}
/* Check for invalid number of frames */