isp(4): Allow more than 2 ports to read WWNs from NVRAM.
It appears at least on QLE2694L cards 3rd and 4th ports follow the same NVRAM addressing logic as the first two. In lack of proper documentation this guess is as good as it can be. MFC after: 1 week Sponsored by: iXsystems, Inc.
This commit is contained in:
parent
27bb8830d5
commit
483e464ed4
@ -4333,12 +4333,7 @@ isp_read_nvram_2400(ispsoftc_t *isp)
|
||||
uint32_t addr, csum, lwrds, *dptr;
|
||||
uint8_t nvram_data[ISP2400_NVRAM_SIZE];
|
||||
|
||||
if (isp->isp_port) {
|
||||
addr = ISP2400_NVRAM_PORT1_ADDR;
|
||||
} else {
|
||||
addr = ISP2400_NVRAM_PORT0_ADDR;
|
||||
}
|
||||
|
||||
addr = ISP2400_NVRAM_PORT_ADDR(isp->isp_port);
|
||||
dptr = (uint32_t *) nvram_data;
|
||||
for (lwrds = 0; lwrds < ISP2400_NVRAM_SIZE >> 2; lwrds++) {
|
||||
isp_rd_2400_nvram(isp, addr++, dptr++);
|
||||
|
@ -213,8 +213,7 @@ typedef struct {
|
||||
/*
|
||||
* Qlogic 2400 NVRAM is an array of 512 bytes with a 32 bit checksum.
|
||||
*/
|
||||
#define ISP2400_NVRAM_PORT0_ADDR 0x80
|
||||
#define ISP2400_NVRAM_PORT1_ADDR 0x180
|
||||
#define ISP2400_NVRAM_PORT_ADDR(c) (0x100 * (c) + 0x80)
|
||||
#define ISP2400_NVRAM_SIZE 512
|
||||
|
||||
#define ISP2400_NVRAM_VERSION(c) ((c)[4] | ((c)[5] << 8))
|
||||
|
Loading…
x
Reference in New Issue
Block a user