Break out the AR9285 analog registers from ar5416/ar5416phy.h and put
them in a new header file, ar9002/ar9285_an.h. Shuffle the AR9280 analog registers in ar5416/ar541phy.h into a contiguous spot.
This commit is contained in:
Adrian Chadd
parent
a5669965bd
commit
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@ -78,27 +78,6 @@
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#define AR_RTC_DERIVED_CLK_PERIOD_S 1
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#endif /* AH_SUPPORT_AR9130 */
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/* AR9280: rf long shift registers */
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#define AR_AN_RF2G1_CH0 0x7810
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#define AR_AN_RF5G1_CH0 0x7818
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#define AR_AN_RF2G1_CH1 0x7834
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#define AR_AN_RF5G1_CH1 0x783C
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#define AR_AN_TOP2 0x7894
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#define AR_AN_SYNTH9 0x7868
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#define AR9285_AN_RF2G1 0x7820
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#define AR9285_AN_RF2G2 0x7824
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#define AR9285_AN_RF2G3 0x7828
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#define AR9285_AN_RF2G4 0x782C
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#define AR9285_AN_RF2G6 0x7834
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#define AR9285_AN_RF2G7 0x7838
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#define AR9285_AN_RF2G8 0x783C
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#define AR9285_AN_RF2G9 0x7840
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#define AR9285_AN_RXTXBB1 0x7854
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#define AR9285_AN_TOP2 0x7868
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#define AR9285_AN_TOP3 0x786c
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#define AR9285_AN_TOP4 0x7870
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#define AR9285_AN_TOP4_DEFAULT 0x10142c00
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#define AR_RESET_TSF 0x8020
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#define AR_RXFIFO_CFG 0x8114
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#define AR_PHY_ERR_1 0x812c
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@ -374,6 +353,13 @@
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#define AR_RTC_PLL_CLKSEL_S 8
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/* AR9280: rf long shift registers */
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#define AR_AN_RF2G1_CH0 0x7810
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#define AR_AN_RF5G1_CH0 0x7818
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#define AR_AN_RF2G1_CH1 0x7834
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#define AR_AN_RF5G1_CH1 0x783C
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#define AR_AN_TOP2 0x7894
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#define AR_AN_SYNTH9 0x7868
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#define AR_AN_RF2G1_CH0_OB 0x03800000
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#define AR_AN_RF2G1_CH0_OB_S 23
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#define AR_AN_RF2G1_CH0_DB 0x1C000000
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@ -408,85 +394,9 @@
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#define AR_AN_SYNTH9_REFDIVA 0xf8000000
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#define AR_AN_SYNTH9_REFDIVA_S 27
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/* AR9285 Analog registers */
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#define AR9285_AN_RF2G1_ENPACAL 0x00000800
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#define AR9285_AN_RF2G1_ENPACAL_S 11
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#define AR9285_AN_RF2G1_PDPADRV1 0x02000000
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#define AR9285_AN_RF2G1_PDPADRV1_S 25
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#define AR9285_AN_RF2G1_PDPADRV2 0x01000000
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#define AR9285_AN_RF2G1_PDPADRV2_S 24
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#define AR9285_AN_RF2G1_PDPAOUT 0x00800000
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#define AR9285_AN_RF2G1_PDPAOUT_S 23
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#define AR9285_AN_RF2G2_OFFCAL 0x00001000
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#define AR9285_AN_RF2G2_OFFCAL_S 12
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#define AR9285_AN_RF2G3_PDVCCOMP 0x02000000
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#define AR9285_AN_RF2G3_PDVCCOMP_S 25
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#define AR9285_AN_RF2G3_OB_0 0x00E00000
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#define AR9285_AN_RF2G3_OB_0_S 21
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#define AR9285_AN_RF2G3_OB_1 0x001C0000
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#define AR9285_AN_RF2G3_OB_1_S 18
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#define AR9285_AN_RF2G3_OB_2 0x00038000
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#define AR9285_AN_RF2G3_OB_2_S 15
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#define AR9285_AN_RF2G3_OB_3 0x00007000
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#define AR9285_AN_RF2G3_OB_3_S 12
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#define AR9285_AN_RF2G3_OB_4 0x00000E00
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#define AR9285_AN_RF2G3_OB_4_S 9
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#define AR9285_AN_RF2G3_DB1_0 0x000001C0
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#define AR9285_AN_RF2G3_DB1_0_S 6
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#define AR9285_AN_RF2G3_DB1_1 0x00000038
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#define AR9285_AN_RF2G3_DB1_1_S 3
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#define AR9285_AN_RF2G3_DB1_2 0x00000007
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#define AR9285_AN_RF2G3_DB1_2_S 0
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#define AR9285_AN_RF2G4_DB1_3 0xE0000000
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#define AR9285_AN_RF2G4_DB1_3_S 29
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#define AR9285_AN_RF2G4_DB1_4 0x1C000000
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#define AR9285_AN_RF2G4_DB1_4_S 26
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#define AR9285_AN_RF2G4_DB2_0 0x03800000
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#define AR9285_AN_RF2G4_DB2_0_S 23
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#define AR9285_AN_RF2G4_DB2_1 0x00700000
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#define AR9285_AN_RF2G4_DB2_1_S 20
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#define AR9285_AN_RF2G4_DB2_2 0x000E0000
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#define AR9285_AN_RF2G4_DB2_2_S 17
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#define AR9285_AN_RF2G4_DB2_3 0x0001C000
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#define AR9285_AN_RF2G4_DB2_3_S 14
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#define AR9285_AN_RF2G4_DB2_4 0x00003800
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#define AR9285_AN_RF2G4_DB2_4_S 11
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#define AR9285_AN_RF2G6_CCOMP 0x00007800
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#define AR9285_AN_RF2G6_CCOMP_S 11
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#define AR9285_AN_RF2G6_OFFS 0x03f00000
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#define AR9285_AN_RF2G6_OFFS_S 20
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#define AR9271_AN_RF2G6_OFFS 0x07f00000
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#define AR9271_AN_RF2G6_OFFS_S 20
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#define AR9285_AN_RF2G7_PWDDB 0x00000002
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#define AR9285_AN_RF2G7_PWDDB_S 1
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#define AR9285_AN_RF2G7_PADRVGN2TAB0 0xE0000000
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#define AR9285_AN_RF2G7_PADRVGN2TAB0_S 29
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#define AR9285_AN_RF2G8_PADRVGN2TAB0 0x0001C000
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#define AR9285_AN_RF2G8_PADRVGN2TAB0_S 14
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#define AR9285_AN_RXTXBB1_PDRXTXBB1 0x00000020
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#define AR9285_AN_RXTXBB1_PDRXTXBB1_S 5
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#define AR9285_AN_RXTXBB1_PDV2I 0x00000080
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#define AR9285_AN_RXTXBB1_PDV2I_S 7
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#define AR9285_AN_RXTXBB1_PDDACIF 0x00000100
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#define AR9285_AN_RXTXBB1_PDDACIF_S 8
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#define AR9285_AN_RXTXBB1_SPARE9 0x00000001
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#define AR9285_AN_RXTXBB1_SPARE9_S 0
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#define AR9285_AN_TOP3_XPABIAS_LVL 0x0000000C
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#define AR9285_AN_TOP3_XPABIAS_LVL_S 2
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#define AR9285_AN_TOP3_PWDDAC 0x00800000
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#define AR9285_AN_TOP3_PWDDAC_S 23
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/* Sleep control */
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#define AR5416_SLEEP1_CAB_TIMEOUT 0xFFE00000 /* Cab timeout (TU) */
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#define AR5416_SLEEP1_CAB_TIMEOUT_S 22
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@ -36,6 +36,7 @@
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#include "ar5416/ar5416phy.h"
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#include "ar9002/ar9002phy.h"
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#include "ar9002/ar9285phy.h"
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#include "ar9002/ar9285an.h"
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#include "ar9002/ar9285_cal.h"
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@ -37,6 +37,7 @@
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#include "ar5416/ar5416phy.h"
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#include "ar9002/ar9002phy.h"
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#include "ar9002/ar9285phy.h"
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#include "ar9002/ar9285an.h"
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/* Eeprom versioning macros. Returns true if the version is equal or newer than the ver specified */
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#define EEP_MINOR(_ah) \
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124
sys/dev/ath/ath_hal/ar9002/ar9285an.h
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124
sys/dev/ath/ath_hal/ar9002/ar9285an.h
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@ -0,0 +1,124 @@
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/*
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* Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
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* Copyright (c) 2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef __AR9285_AN_H__
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#define __AR9285_AN_H__
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/* AR9285 Analog register definitions */
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#define AR9285_AN_RF2G1 0x7820
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#define AR9285_AN_RF2G1_ENPACAL 0x00000800
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#define AR9285_AN_RF2G1_ENPACAL_S 11
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#define AR9285_AN_RF2G1_PDPADRV1 0x02000000
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#define AR9285_AN_RF2G1_PDPADRV1_S 25
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#define AR9285_AN_RF2G1_PDPADRV2 0x01000000
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#define AR9285_AN_RF2G1_PDPADRV2_S 24
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#define AR9285_AN_RF2G1_PDPAOUT 0x00800000
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#define AR9285_AN_RF2G1_PDPAOUT_S 23
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#define AR9285_AN_RF2G2 0x7824
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#define AR9285_AN_RF2G2_OFFCAL 0x00001000
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#define AR9285_AN_RF2G2_OFFCAL_S 12
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#define AR9285_AN_RF2G3 0x7828
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#define AR9285_AN_RF2G3_PDVCCOMP 0x02000000
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#define AR9285_AN_RF2G3_PDVCCOMP_S 25
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#define AR9285_AN_RF2G3_OB_0 0x00E00000
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#define AR9285_AN_RF2G3_OB_0_S 21
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#define AR9285_AN_RF2G3_OB_1 0x001C0000
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#define AR9285_AN_RF2G3_OB_1_S 18
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#define AR9285_AN_RF2G3_OB_2 0x00038000
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#define AR9285_AN_RF2G3_OB_2_S 15
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#define AR9285_AN_RF2G3_OB_3 0x00007000
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#define AR9285_AN_RF2G3_OB_3_S 12
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#define AR9285_AN_RF2G3_OB_4 0x00000E00
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#define AR9285_AN_RF2G3_OB_4_S 9
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#define AR9285_AN_RF2G3_DB1_0 0x000001C0
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#define AR9285_AN_RF2G3_DB1_0_S 6
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#define AR9285_AN_RF2G3_DB1_1 0x00000038
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#define AR9285_AN_RF2G3_DB1_1_S 3
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#define AR9285_AN_RF2G3_DB1_2 0x00000007
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#define AR9285_AN_RF2G3_DB1_2_S 0
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#define AR9285_AN_RF2G4 0x782C
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#define AR9285_AN_RF2G4_DB1_3 0xE0000000
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#define AR9285_AN_RF2G4_DB1_3_S 29
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#define AR9285_AN_RF2G4_DB1_4 0x1C000000
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#define AR9285_AN_RF2G4_DB1_4_S 26
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#define AR9285_AN_RF2G4_DB2_0 0x03800000
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#define AR9285_AN_RF2G4_DB2_0_S 23
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#define AR9285_AN_RF2G4_DB2_1 0x00700000
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#define AR9285_AN_RF2G4_DB2_1_S 20
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#define AR9285_AN_RF2G4_DB2_2 0x000E0000
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#define AR9285_AN_RF2G4_DB2_2_S 17
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#define AR9285_AN_RF2G4_DB2_3 0x0001C000
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#define AR9285_AN_RF2G4_DB2_3_S 14
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#define AR9285_AN_RF2G4_DB2_4 0x00003800
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#define AR9285_AN_RF2G4_DB2_4_S 11
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#define AR9285_AN_RF2G6 0x7834
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#define AR9285_AN_RF2G6_CCOMP 0x00007800
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#define AR9285_AN_RF2G6_CCOMP_S 11
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#define AR9285_AN_RF2G6_OFFS 0x03f00000
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#define AR9285_AN_RF2G6_OFFS_S 20
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#define AR9285_AN_RF2G7 0x7838
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#define AR9285_AN_RF2G7_PWDDB 0x00000002
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#define AR9285_AN_RF2G7_PWDDB_S 1
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#define AR9285_AN_RF2G7_PADRVGN2TAB0 0xE0000000
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#define AR9285_AN_RF2G7_PADRVGN2TAB0_S 29
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#define AR9285_AN_RF2G8 0x783C
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#define AR9285_AN_RF2G8_PADRVGN2TAB0 0x0001C000
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#define AR9285_AN_RF2G8_PADRVGN2TAB0_S 14
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#define AR9285_AN_RF2G9 0x7840
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#define AR9285_AN_RXTXBB1 0x7854
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#define AR9285_AN_RXTXBB1_PDRXTXBB1 0x00000020
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#define AR9285_AN_RXTXBB1_PDRXTXBB1_S 5
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#define AR9285_AN_RXTXBB1_PDV2I 0x00000080
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#define AR9285_AN_RXTXBB1_PDV2I_S 7
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#define AR9285_AN_RXTXBB1_PDDACIF 0x00000100
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#define AR9285_AN_RXTXBB1_PDDACIF_S 8
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#define AR9285_AN_RXTXBB1_SPARE9 0x00000001
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#define AR9285_AN_RXTXBB1_SPARE9_S 0
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#define AR9285_AN_TOP2 0x7868
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#define AR9285_AN_TOP3 0x786c
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#define AR9285_AN_TOP3_XPABIAS_LVL 0x0000000C
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#define AR9285_AN_TOP3_XPABIAS_LVL_S 2
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#define AR9285_AN_TOP3_PWDDAC 0x00800000
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#define AR9285_AN_TOP3_PWDDAC_S 23
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#define AR9285_AN_TOP4 0x7870
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#define AR9285_AN_TOP4_DEFAULT 0x10142c00
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#endif /* __AR9285_AN_H__ */
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