Add support for the 3Com 556 and 556B mini-pci adapters used on some
laptops. I've checked that this still works with the other cards and it works with the 3c556 that I have access to, but I want to check that it works with the 556B mentioned in PR #20878 before I close out the PR and merge to -stable.
This commit is contained in:
Bill Paul
parent
b7823d1fde
commit
4e2499823f
@ -55,6 +55,8 @@
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* 3Com 3c980C-TX 10/100Mbps server adapter (Tornado ASIC)
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* 3Com 3cSOHO100-TX 10/100Mbps/RJ-45 (Hurricane ASIC)
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* 3Com 3c450-TX 10/100Mbps/RJ-45 (Tornado ASIC)
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* 3Com 3c556 10/100Mbps/RJ-45 (MiniPCI, Hurricane ASIC)
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* 3Com 3c556B 10/100Mbps/RJ-45 (MiniPCI, Hurricane ASIC)
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* Dell Optiplex GX1 on-board 3c918 10/100Mbps/RJ-45
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* Dell on-board 3c920 10/100Mbps/RJ-45
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* Dell Precision on-board 3c905B 10/100Mbps/RJ-45
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@ -186,6 +188,10 @@ static struct xl_type xl_devs[] = {
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"3Com 3cSOHO100-TX OfficeConnect" },
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{ TC_VENDORID, TC_DEVICEID_TORNADO_HOMECONNECT,
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"3Com 3c450-TX HomeConnect" },
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{ TC_VENDORID, TC_DEVICEID_HURRICANE_556,
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"3Com 3c556 Fast Etherlink XL" },
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{ TC_VENDORID, TC_DEVICEID_HURRICANE_556B,
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"3Com 3c556B Fast Etherlink XL" },
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{ 0, 0, NULL }
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};
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@ -532,6 +538,8 @@ static int xl_miibus_readreg(dev, phy, reg)
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struct xl_softc *sc;
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struct xl_mii_frame frame;
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sc = device_get_softc(dev);
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/*
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* Pretend that PHYs are only available at MII address 24.
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* This is to guard against problems with certain 3Com ASIC
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@ -539,11 +547,9 @@ static int xl_miibus_readreg(dev, phy, reg)
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* control registers at all MII addresses. This can cause
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* the miibus code to attach the same PHY several times over.
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*/
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if (phy != 24)
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if ((!(sc->xl_flags & XL_FLAG_PHYOK)) && phy != 24)
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return(0);
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sc = device_get_softc(dev);
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bzero((char *)&frame, sizeof(frame));
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frame.mii_phyaddr = phy;
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@ -560,11 +566,11 @@ static int xl_miibus_writereg(dev, phy, reg, data)
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struct xl_softc *sc;
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struct xl_mii_frame frame;
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if (phy != 24)
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return(0);
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sc = device_get_softc(dev);
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if ((!(sc->xl_flags & XL_FLAG_PHYOK)) && phy != 24)
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return(0);
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bzero((char *)&frame, sizeof(frame));
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frame.mii_phyaddr = phy;
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@ -686,14 +692,25 @@ static int xl_read_eeprom(sc, dest, off, cnt, swap)
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{
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int err = 0, i;
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u_int16_t word = 0, *ptr;
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#define EEPROM_5BIT_OFFSET(A) ((((A) << 2) & 0x7F00) | ((A) & 0x003F))
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/* WARNING! DANGER!
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* It's easy to accidentally overwrite the rom content!
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* Note: the 3c575 uses 8bit EEPROM offsets.
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*/
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XL_SEL_WIN(0);
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if (xl_eeprom_wait(sc))
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return(1);
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if (sc->xl_flags & XL_FLAG_EEPROM_OFFSET_30)
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off += 0x30;
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for (i = 0; i < cnt; i++) {
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CSR_WRITE_2(sc, XL_W0_EE_CMD, XL_EE_READ | (off + i));
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if (sc->xl_flags & XL_FLAG_8BITROM)
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CSR_WRITE_2(sc, XL_W0_EE_CMD, (2<<8) | (off + i));
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else
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CSR_WRITE_2(sc, XL_W0_EE_CMD,
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XL_EE_READ | EEPROM_5BIT_OFFSET(off + i));
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err = xl_eeprom_wait(sc);
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if (err)
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break;
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@ -984,7 +1001,8 @@ static void xl_reset(sc)
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register int i;
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XL_SEL_WIN(0);
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RESET);
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RESET |
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((sc->xl_flags & XL_FLAG_WEIRDRESET)?0xFF:0));
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for (i = 0; i < XL_TIMEOUT; i++) {
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DELAY(10);
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@ -1003,6 +1021,12 @@ static void xl_reset(sc)
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET);
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xl_wait(sc);
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if (sc->xl_flags & XL_FLAG_WEIRDRESET) {
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XL_SEL_WIN(2);
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CSR_WRITE_2(sc, XL_W2_RESET_OPTIONS, CSR_READ_2(sc,
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XL_W2_RESET_OPTIONS) | 0x4010);
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}
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/* Wait a little while for the chip to get its brains in order. */
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DELAY(100000);
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return;
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@ -1126,6 +1150,8 @@ static void xl_choose_xcvr(sc, verbose)
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printf("xl%d: guessing 10baseFL\n", sc->xl_unit);
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break;
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case TC_DEVICEID_BOOMERANG_10_100BT: /* 3c905-TX */
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case TC_DEVICEID_HURRICANE_556: /* 3c556 */
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case TC_DEVICEID_HURRICANE_556B: /* 3c556B */
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sc->xl_media = XL_MEDIAOPT_MII;
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sc->xl_xcvr = XL_XCVR_MII;
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if (verbose)
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@ -1186,6 +1212,14 @@ static int xl_attach(dev)
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sc = device_get_softc(dev);
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unit = device_get_unit(dev);
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sc->xl_flags = 0;
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if (pci_get_device(dev) == TC_DEVICEID_HURRICANE_556 ||
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pci_get_device(dev) == TC_DEVICEID_HURRICANE_556B)
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sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK |
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XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET;
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if (pci_get_device(dev) == TC_DEVICEID_HURRICANE_556)
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sc->xl_flags |= XL_FLAG_8BITROM;
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/*
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* If this is a 3c905B, we have to check one extra thing.
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* The 905B supports power management and may be placed in
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@ -1264,12 +1298,31 @@ static int xl_attach(dev)
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sc->xl_btag = rman_get_bustag(sc->xl_res);
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sc->xl_bhandle = rman_get_bushandle(sc->xl_res);
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if (sc->xl_flags & XL_FLAG_FUNCREG) {
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rid = XL_PCI_FUNCMEM;
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sc->xl_fres = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
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0, ~0, 1, RF_ACTIVE);
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if (sc->xl_fres == NULL) {
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printf ("xl%d: couldn't map ports/memory\n", unit);
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bus_release_resource(dev, XL_RES, XL_RID, sc->xl_res);
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error = ENXIO;
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goto fail;
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}
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sc->xl_ftag = rman_get_bustag(sc->xl_fres);
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sc->xl_fhandle = rman_get_bushandle(sc->xl_fres);
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}
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rid = 0;
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sc->xl_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
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RF_SHAREABLE | RF_ACTIVE);
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if (sc->xl_irq == NULL) {
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printf("xl%d: couldn't map interrupt\n", unit);
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if (sc->xl_fres != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY,
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XL_PCI_FUNCMEM, sc->xl_fres);
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bus_release_resource(dev, XL_RES, XL_RID, sc->xl_res);
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error = ENXIO;
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goto fail;
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@ -1280,6 +1333,9 @@ static int xl_attach(dev)
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if (error) {
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->xl_irq);
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if (sc->xl_fres != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY,
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XL_PCI_FUNCMEM, sc->xl_fres);
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bus_release_resource(dev, XL_RES, XL_RID, sc->xl_res);
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printf("xl%d: couldn't set up irq\n", unit);
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goto fail;
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@ -1295,6 +1351,9 @@ static int xl_attach(dev)
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printf("xl%d: failed to read station address\n", sc->xl_unit);
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bus_teardown_intr(dev, sc->xl_irq, sc->xl_intrhand);
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->xl_irq);
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if (sc->xl_fres != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY,
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XL_PCI_FUNCMEM, sc->xl_fres);
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bus_release_resource(dev, XL_RES, XL_RID, sc->xl_res);
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error = ENXIO;
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goto fail;
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@ -1316,6 +1375,9 @@ static int xl_attach(dev)
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printf("xl%d: no memory for list buffers!\n", unit);
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bus_teardown_intr(dev, sc->xl_irq, sc->xl_intrhand);
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->xl_irq);
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if (sc->xl_fres != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY,
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XL_PCI_FUNCMEM, sc->xl_fres);
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bus_release_resource(dev, XL_RES, XL_RID, sc->xl_res);
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error = ENXIO;
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goto fail;
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@ -1524,6 +1586,9 @@ static int xl_detach(dev)
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bus_teardown_intr(dev, sc->xl_irq, sc->xl_intrhand);
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->xl_irq);
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if (sc->xl_fres != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY,
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XL_PCI_FUNCMEM, sc->xl_fres);
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bus_release_resource(dev, XL_RES, XL_RID, sc->xl_res);
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ifmedia_removeall(&sc->ifmedia);
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@ -2545,6 +2610,7 @@ static void xl_init(xsc)
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ACK|0xFF);
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STAT_ENB|XL_INTRS);
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ENB|XL_INTRS);
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if (sc->xl_flags & XL_FLAG_FUNCREG) bus_space_write_4 (sc->xl_ftag, sc->xl_fhandle, 4, 0x8000);
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/* Set the RX early threshold */
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_THRESH|(XL_PACKET_SIZE >>2));
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@ -2814,6 +2880,7 @@ static void xl_stop(sc)
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ACK|XL_STAT_INTLATCH);
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STAT_ENB|0);
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ENB|0);
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if (sc->xl_flags & XL_FLAG_FUNCREG) bus_space_write_4 (sc->xl_ftag, sc->xl_fhandle, 4, 0x8000);
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/* Stop the stats updater. */
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untimeout(xl_stats_update, sc, sc->xl_stat_ch);
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@ -548,6 +548,12 @@ struct xl_mii_frame {
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#define XL_TYPE_905B 1
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#define XL_TYPE_90X 2
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#define XL_FLAG_FUNCREG 0x0001
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#define XL_FLAG_PHYOK 0x0002
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#define XL_FLAG_EEPROM_OFFSET_30 0x0004
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#define XL_FLAG_WEIRDRESET 0x0008
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#define XL_FLAG_8BITROM 0x0010
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struct xl_softc {
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struct arpcom arpcom; /* interface info */
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struct ifmedia ifmedia; /* media info */
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@ -569,6 +575,10 @@ struct xl_softc {
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struct xl_list_data *xl_ldata;
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struct xl_chain_data xl_cdata;
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struct callout_handle xl_stat_ch;
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int xl_flags;
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struct resource *xl_fres;
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bus_space_handle_t xl_fhandle;
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bus_space_tag_t xl_ftag;
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};
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#define xl_rx_goodframes(x) \
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@ -641,6 +651,8 @@ struct xl_stats {
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#define TC_DEVICEID_TORNADO_10_100BT_SERV 0x9805
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#define TC_DEVICEID_HURRICANE_SOHO100TX 0x7646
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#define TC_DEVICEID_TORNADO_HOMECONNECT 0x4500
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#define TC_DEVICEID_HURRICANE_556 0x6055
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#define TC_DEVICEID_HURRICANE_556B 0x6056
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/*
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* PCI low memory base and low I/O base register, and
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@ -657,6 +669,7 @@ struct xl_stats {
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#define XL_PCI_HEADER_TYPE 0x0E
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#define XL_PCI_LOIO 0x10
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#define XL_PCI_LOMEM 0x14
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#define XL_PCI_FUNCMEM 0x18
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#define XL_PCI_BIOSROM 0x30
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#define XL_PCI_INTLINE 0x3C
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#define XL_PCI_INTPIN 0x3D
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