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o) Remove some CPU_CNMIPS-related magical thinking about the status register's

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contents for user programs.
o) Conditionalize the installation of an XTLB handler on ABI, not CPU family.
This commit is contained in:
Juli Mallett 2012-03-10 06:54:37 +00:00
parent fd71d13eb6
commit 4f32220bf6
3 changed files with 2 additions and 16 deletions
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3
sys/mips/mips/machdep.c
View File

@ -347,8 +347,7 @@ mips_vector_init(void)
bcopy(MipsTLBMiss, (void *)MIPS_UTLB_MISS_EXC_VEC,
MipsTLBMissEnd - MipsTLBMiss);
#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM)
/* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses */
#ifdef __mips_n64
bcopy(MipsTLBMiss, (void *)MIPS_XTLB_MISS_EXC_VEC,
MipsTLBMissEnd - MipsTLBMiss);
#endif

4
sys/mips/mips/pm_machdep.c
View File

@ -490,10 +490,6 @@ exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
td->td_frame->sr |= MIPS_SR_PX;
#elif defined(__mips_n64)
td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
#endif
#ifdef CPU_CNMIPS
td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX |
MIPS_SR_KX | MIPS_SR_SX;
#endif
/*
* FREEBSD_DEVELOPERS_FIXME:

11
sys/mips/mips/vm_machdep.c
View File

@ -406,12 +406,7 @@ cpu_set_upcall(struct thread *td, struct thread *td0)
pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
/* Dont set IE bit in SR. sched lock release will take care of it */
pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
(MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
#ifdef CPU_CNMIPS
pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_COP_0_BIT |
MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
#endif
(MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
/*
* FREEBSD_DEVELOPERS_FIXME:
@ -475,10 +470,6 @@ cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
#elif defined(__mips_n64)
td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
#endif
#ifdef CPU_CNMIPS
tf->sr |= MIPS_SR_INT_IE | MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_UX |
MIPS_SR_KX;
#endif
/* tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
/**XXX the above may now be wrong -- mips2 implements this as panic */
/*