Allocate separate DMA area for synchronous IOCB execution.
Usually IOCBs should be put on queue for asynchronous processing and should not require additional DMA memory. But there are some cases like aborts and resets that for external reasons has to be synchronous. Give those cases separate 2*64 byte DMA area to decouple them from other DMA scratch area users, using it for asynchronous requests.
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0d63fc3ed8
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4ff970c462
@ -4667,31 +4667,25 @@ isp_control(ispsoftc_t *isp, ispctl_t ctl, ...)
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tmf->tmf_tidlo = lp->portid;
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tmf->tmf_tidhi = lp->portid >> 16;
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tmf->tmf_vpidx = ISP_GET_VPIDX(isp, chan);
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isp_put_24xx_tmf(isp, tmf, isp->isp_iocb);
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MEMORYBARRIER(isp, SYNC_IFORDEV, 0, QENTRY_LEN, chan);
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fcp->sendmarker = 1;
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isp_prt(isp, ISP_LOGALL, "Chan %d Reset N-Port Handle 0x%04x @ Port 0x%06x", chan, lp->handle, lp->portid);
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MBSINIT(&mbs, MBOX_EXEC_COMMAND_IOCB_A64, MBLOGALL,
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MBCMD_DEFAULT_TIMEOUT + tmf->tmf_timeout * 1000000);
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mbs.param[1] = QENTRY_LEN;
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mbs.param[2] = DMA_WD1(fcp->isp_scdma);
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mbs.param[3] = DMA_WD0(fcp->isp_scdma);
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mbs.param[6] = DMA_WD3(fcp->isp_scdma);
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mbs.param[7] = DMA_WD2(fcp->isp_scdma);
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if (FC_SCRATCH_ACQUIRE(isp, chan)) {
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isp_prt(isp, ISP_LOGERR, sacq);
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break;
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}
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isp_put_24xx_tmf(isp, tmf, fcp->isp_scratch);
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MEMORYBARRIER(isp, SYNC_SFORDEV, 0, QENTRY_LEN, chan);
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fcp->sendmarker = 1;
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mbs.param[2] = DMA_WD1(isp->isp_iocb_dma);
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mbs.param[3] = DMA_WD0(isp->isp_iocb_dma);
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mbs.param[6] = DMA_WD3(isp->isp_iocb_dma);
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mbs.param[7] = DMA_WD2(isp->isp_iocb_dma);
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isp_mboxcmd(isp, &mbs);
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if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
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FC_SCRATCH_RELEASE(isp, chan);
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if (mbs.param[0] != MBOX_COMMAND_COMPLETE)
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break;
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}
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MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN, QENTRY_LEN, chan);
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MEMORYBARRIER(isp, SYNC_IFORCPU, QENTRY_LEN, QENTRY_LEN, chan);
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sp = (isp24xx_statusreq_t *) local;
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isp_get_24xx_response(isp, &((isp24xx_statusreq_t *)fcp->isp_scratch)[1], sp);
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FC_SCRATCH_RELEASE(isp, chan);
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isp_get_24xx_response(isp, &((isp24xx_statusreq_t *)isp->isp_iocb)[1], sp);
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if (sp->req_completion_status == 0) {
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return (0);
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}
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@ -4731,7 +4725,7 @@ isp_control(ispsoftc_t *isp, ispctl_t ctl, ...)
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break;
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}
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if (IS_24XX(isp)) {
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isp24xx_abrt_t local, *ab = &local, *ab2;
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isp24xx_abrt_t local, *ab = &local;
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fcparam *fcp;
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fcportdb_t *lp;
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@ -4755,31 +4749,23 @@ isp_control(ispsoftc_t *isp, ispctl_t ctl, ...)
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ab->abrt_tidlo = lp->portid;
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ab->abrt_tidhi = lp->portid >> 16;
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ab->abrt_vpidx = ISP_GET_VPIDX(isp, chan);
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isp_put_24xx_abrt(isp, ab, isp->isp_iocb);
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MEMORYBARRIER(isp, SYNC_IFORDEV, 0, 2 * QENTRY_LEN, chan);
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ISP_MEMZERO(&mbs, sizeof (mbs));
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MBSINIT(&mbs, MBOX_EXEC_COMMAND_IOCB_A64, MBLOGALL, 5000000);
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mbs.param[1] = QENTRY_LEN;
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mbs.param[2] = DMA_WD1(fcp->isp_scdma);
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mbs.param[3] = DMA_WD0(fcp->isp_scdma);
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mbs.param[6] = DMA_WD3(fcp->isp_scdma);
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mbs.param[7] = DMA_WD2(fcp->isp_scdma);
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mbs.param[2] = DMA_WD1(isp->isp_iocb_dma);
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mbs.param[3] = DMA_WD0(isp->isp_iocb_dma);
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mbs.param[6] = DMA_WD3(isp->isp_iocb_dma);
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mbs.param[7] = DMA_WD2(isp->isp_iocb_dma);
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if (FC_SCRATCH_ACQUIRE(isp, chan)) {
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isp_prt(isp, ISP_LOGERR, sacq);
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break;
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}
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isp_put_24xx_abrt(isp, ab, fcp->isp_scratch);
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ab2 = (isp24xx_abrt_t *) &((uint8_t *)fcp->isp_scratch)[QENTRY_LEN];
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ab2->abrt_nphdl = 0xdeaf;
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MEMORYBARRIER(isp, SYNC_SFORDEV, 0, 2 * QENTRY_LEN, chan);
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isp_mboxcmd(isp, &mbs);
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if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
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FC_SCRATCH_RELEASE(isp, chan);
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if (mbs.param[0] != MBOX_COMMAND_COMPLETE)
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break;
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}
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MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN, QENTRY_LEN, chan);
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isp_get_24xx_abrt(isp, ab2, ab);
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FC_SCRATCH_RELEASE(isp, chan);
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MEMORYBARRIER(isp, SYNC_IFORCPU, QENTRY_LEN, QENTRY_LEN, chan);
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isp_get_24xx_abrt(isp, &((isp24xx_abrt_t *)isp->isp_iocb)[1], ab);
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if (ab->abrt_nphdl == ISP24XX_ABRT_OKAY) {
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return (0);
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}
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@ -293,10 +293,12 @@ struct isposinfo {
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bus_dma_tag_t reqdmat;
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bus_dma_tag_t respdmat;
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bus_dma_tag_t atiodmat;
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bus_dma_tag_t iocbdmat;
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bus_dma_tag_t scdmat;
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bus_dmamap_t reqmap;
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bus_dmamap_t respmap;
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bus_dmamap_t atiomap;
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bus_dmamap_t iocbmap;
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/*
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* Command and transaction related related stuff
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@ -441,6 +443,14 @@ case SYNC_ATIOQ: \
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bus_dmamap_sync(isp->isp_osinfo.atiodmat, \
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isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD); \
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break; \
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case SYNC_IFORDEV: \
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bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \
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break; \
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case SYNC_IFORCPU: \
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bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \
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break; \
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default: \
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break; \
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}
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@ -469,6 +479,14 @@ case SYNC_REG: \
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bus_barrier(isp->isp_osinfo.regs, offset, size, \
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BUS_SPACE_BARRIER_WRITE); \
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break; \
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case SYNC_IFORDEV: \
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bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
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BUS_DMASYNC_PREWRITE); \
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break; \
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case SYNC_IFORCPU: \
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bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
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BUS_DMASYNC_POSTWRITE); \
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break; \
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default: \
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break; \
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}
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@ -1730,9 +1730,23 @@ isp_pci_mbxdma(ispsoftc_t *isp)
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if (IS_FC(isp)) {
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if (isp_dma_tag_create(isp->isp_osinfo.dmat, 64, slim,
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BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
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ISP_FC_SCRLEN, 1, ISP_FC_SCRLEN, 0, &isp->isp_osinfo.scdmat)) {
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2*QENTRY_LEN, 1, 2*QENTRY_LEN, 0, &isp->isp_osinfo.iocbdmat)) {
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goto bad;
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}
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if (bus_dmamem_alloc(isp->isp_osinfo.iocbdmat,
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(void **)&base, BUS_DMA_COHERENT, &isp->isp_osinfo.iocbmap) != 0)
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goto bad;
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isp->isp_iocb = base;
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im.error = 0;
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if (bus_dmamap_load(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap,
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base, 2*QENTRY_LEN, imc, &im, 0) || im.error)
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goto bad;
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isp->isp_iocb_dma = im.maddr;
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if (isp_dma_tag_create(isp->isp_osinfo.dmat, 64, slim,
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BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
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ISP_FC_SCRLEN, 1, ISP_FC_SCRLEN, 0, &isp->isp_osinfo.scdmat))
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goto bad;
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for (cmap = 0; cmap < isp->isp_nchan; cmap++) {
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struct isp_fc *fc = ISP_FC_PC(isp, cmap);
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if (bus_dmamem_alloc(isp->isp_osinfo.scdmat,
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@ -1791,7 +1805,8 @@ bad:
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while (--cmap >= 0) {
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struct isp_fc *fc = ISP_FC_PC(isp, cmap);
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bus_dmamap_unload(isp->isp_osinfo.scdmat, fc->scmap);
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bus_dmamem_free(isp->isp_osinfo.scdmat, base, fc->scmap);
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bus_dmamem_free(isp->isp_osinfo.scdmat,
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FCPARAM(isp, cmap)->isp_scratch, fc->scmap);
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while (fc->nexus_free_list) {
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struct isp_nexus *n = fc->nexus_free_list;
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fc->nexus_free_list = n->next;
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@ -1799,6 +1814,10 @@ bad:
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}
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}
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bus_dma_tag_destroy(isp->isp_osinfo.scdmat);
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bus_dmamap_unload(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap);
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bus_dmamem_free(isp->isp_osinfo.iocbdmat, isp->isp_iocb,
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isp->isp_osinfo.iocbmap);
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bus_dma_tag_destroy(isp->isp_osinfo.iocbdmat);
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}
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bad1:
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if (isp->isp_rquest_dma != 0) {
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@ -130,6 +130,8 @@ struct ispmdvec {
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#define SYNC_SFORCPU 3 /* scratch, sync for CPU */
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#define SYNC_REG 4 /* for registers */
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#define SYNC_ATIOQ 5 /* atio result queue (24xx) */
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#define SYNC_IFORDEV 6 /* synchrounous IOCB, sync for ISP */
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#define SYNC_IFORCPU 7 /* synchrounous IOCB, sync for CPU */
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/*
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* Request/Response Queue defines and macros.
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@ -595,6 +597,12 @@ struct ispsoftc {
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isp_hdl_t *isp_xflist;
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isp_hdl_t *isp_xffree;
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/*
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* DMA mapped in area for synchronous IOCB requests.
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*/
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void * isp_iocb;
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XS_DMA_ADDR_T isp_iocb_dma;
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/*
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* request/result queue pointers and DMA handles for them.
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*/
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