Fix ordering of legacy IRQ reservations.
Submitted by: Jeremiah Lott jlott at averesystems dot com
This commit is contained in:
parent
ce625ec719
commit
50dc0db3f0
@ -1008,6 +1008,16 @@ init_pci(struct vmctx *ctx)
|
||||
pci_emul_membase32 = vm_get_lowmem_limit(ctx);
|
||||
pci_emul_membase64 = PCI_EMUL_MEMBASE64;
|
||||
|
||||
/*
|
||||
* Allow ISA IRQs 5,10,11,12, and 15 to be available for
|
||||
* generic use
|
||||
*/
|
||||
lirq[5].li_generic = 1;
|
||||
lirq[10].li_generic = 1;
|
||||
lirq[11].li_generic = 1;
|
||||
lirq[12].li_generic = 1;
|
||||
lirq[15].li_generic = 1;
|
||||
|
||||
for (slot = 0; slot < MAXSLOTS; slot++) {
|
||||
for (func = 0; func < MAXFUNCS; func++) {
|
||||
si = &pci_slotinfo[slot][func];
|
||||
@ -1022,16 +1032,6 @@ init_pci(struct vmctx *ctx)
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Allow ISA IRQs 5,10,11,12, and 15 to be available for
|
||||
* generic use
|
||||
*/
|
||||
lirq[5].li_generic = 1;
|
||||
lirq[10].li_generic = 1;
|
||||
lirq[11].li_generic = 1;
|
||||
lirq[12].li_generic = 1;
|
||||
lirq[15].li_generic = 1;
|
||||
|
||||
/*
|
||||
* The guest physical memory map looks like the following:
|
||||
* [0, lowmem) guest system memory
|
||||
|
Loading…
Reference in New Issue
Block a user