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Vendor import of llvm release_80 branch r354130:

Browse Source 
https://llvm.org/svn/llvm-project/llvm/branches/release_80@354130
This commit is contained in:
Dimitry Andric 2019-02-15 20:48:51 +00:00
parent e79719ce60
commit 519e1985ae
108 changed files with 3524 additions and 2912 deletions
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5
CMakeLists.txt
View File

@ -383,9 +383,12 @@ option(LLVM_ENABLE_EXPENSIVE_CHECKS "Enable expensive checks" OFF)
set(LLVM_ABI_BREAKING_CHECKS "WITH_ASSERTS" CACHE STRING
"Enable abi-breaking checks. Can be WITH_ASSERTS, FORCE_ON or FORCE_OFF.")
option(LLVM_FORCE_USE_OLD_HOST_TOOLCHAIN
option(LLVM_FORCE_USE_OLD_TOOLCHAIN
"Set to ON to force using an old, unsupported host toolchain." OFF)
option(LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN
"Set to ON to only warn when using a toolchain which is about to be deprecated, instead of emitting an error." OFF)
option(LLVM_USE_INTEL_JITEVENTS
"Use Intel JIT API to inform Intel(R) VTune(TM) Amplifier XE 2011 about JIT code"
OFF)

4
bindings/go/llvm/ir_test.go
View File

@ -31,7 +31,7 @@ func testAttribute(t *testing.T, name string) {
fn.AddFunctionAttr(attr)
newattr := fn.GetEnumFunctionAttribute(kind)
if attr != newattr {
t.Errorf("got attribute mask %d, want %d", newattr, attr)
t.Errorf("got attribute %p, want %p", newattr.C, attr.C)
}
text := mod.String()
@ -42,7 +42,7 @@ func testAttribute(t *testing.T, name string) {
fn.RemoveEnumFunctionAttribute(kind)
newattr = fn.GetEnumFunctionAttribute(kind)
if !newattr.IsNil() {
t.Errorf("got attribute mask %d, want 0", newattr)
t.Errorf("got attribute %p, want 0", newattr.C)
}
}

130
cmake/modules/CheckCompilerVersion.cmake
View File

@ -1,52 +1,94 @@
# Check if the host compiler is new enough. LLVM requires at least GCC 4.8,
# MSVC 2015 (Update 3), or Clang 3.1.
# Check if the host compiler is new enough.
# These versions are updated based on the following policy:
# llvm.org/docs/DeveloperPolicy.html#toolchain
include(CheckCXXSourceCompiles)
if(NOT DEFINED LLVM_COMPILER_CHECKED)
set(LLVM_COMPILER_CHECKED ON)
set(GCC_MIN 4.8)
set(GCC_SOFT_ERROR 5.1)
set(CLANG_MIN 3.1)
set(CLANG_SOFT_ERROR 3.5)
set(APPLECLANG_MIN 3.1)
set(APPLECLANG_SOFT_ERROR 6.0)
set(MSVC_MIN 19.00.24213.1)
set(MSVC_SOFT_ERROR 19.1)
if(NOT LLVM_FORCE_USE_OLD_TOOLCHAIN)
if(CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 4.8)
message(FATAL_ERROR "Host GCC version must be at least 4.8!")
endif()
elseif(CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 3.1)
message(FATAL_ERROR "Host Clang version must be at least 3.1!")
endif()
# Map the above GCC versions to dates: https://gcc.gnu.org/develop.html#timeline
set(GCC_MIN_DATE 20130322)
set(GCC_SOFT_ERROR_DATE 20150422)
if (CMAKE_CXX_SIMULATE_ID MATCHES "MSVC")
if (CMAKE_CXX_SIMULATE_VERSION VERSION_LESS 19.0)
message(FATAL_ERROR "Host Clang must have at least -fms-compatibility-version=19.0")
endif()
set(CLANG_CL 1)
elseif(NOT LLVM_ENABLE_LIBCXX)
# Otherwise, test that we aren't using too old of a version of libstdc++
# with the Clang compiler. This is tricky as there is no real way to
# check the version of libstdc++ directly. Instead we test for a known
# bug in libstdc++4.6 that is fixed in libstdc++4.7.
set(OLD_CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS})
set(OLD_CMAKE_REQUIRED_LIBRARIES ${CMAKE_REQUIRED_LIBRARIES})
set(CMAKE_REQUIRED_FLAGS "${CMAKE_REQUIRED_FLAGS} -std=c++0x")
check_cxx_source_compiles("
#include <atomic>
std::atomic<float> x(0.0f);
int main() { return (float)x; }"
LLVM_NO_OLD_LIBSTDCXX)
if(NOT LLVM_NO_OLD_LIBSTDCXX)
message(FATAL_ERROR "Host Clang must be able to find libstdc++4.8 or newer!")
endif()
set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS})
set(CMAKE_REQUIRED_LIBRARIES ${OLD_CMAKE_REQUIRED_LIBRARIES})
endif()
elseif(CMAKE_CXX_COMPILER_ID MATCHES "MSVC")
if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 19.0)
message(FATAL_ERROR "Host Visual Studio must be at least 2015")
elseif(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 19.00.24213.1)
message(WARNING "Host Visual Studio should at least be 2015 Update 3 (MSVC 19.00.24213.1)"
" due to miscompiles from earlier versions")
endif()
if(DEFINED LLVM_COMPILER_CHECKED)
return()
endif()
set(LLVM_COMPILER_CHECKED ON)
if(LLVM_FORCE_USE_OLD_TOOLCHAIN)
return()
endif()
function(check_compiler_version NAME NICE_NAME MINIMUM_VERSION SOFT_ERROR_VERSION)
if(NOT CMAKE_CXX_COMPILER_ID STREQUAL NAME)
return()
endif()
if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS MINIMUM_VERSION)
message(FATAL_ERROR "Host ${NICE_NAME} version must be at least ${MINIMUM_VERSION}, your version is ${CMAKE_CXX_COMPILER_VERSION}.")
elseif(CMAKE_CXX_COMPILER_VERSION VERSION_LESS SOFT_ERROR_VERSION)
if(LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN)
message(WARNING "Host ${NICE_NAME} version should be at least ${SOFT_ERROR_VERSION} because LLVM will soon use new C++ features which your toolchain version doesn't support. Your version is ${CMAKE_CXX_COMPILER_VERSION}. Ignoring because you've set LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN, but very soon your toolchain won't be supported.")
else()
message(FATAL_ERROR "Host ${NICE_NAME} version should be at least ${SOFT_ERROR_VERSION} because LLVM will soon use new C++ features which your toolchain version doesn't support. Your version is ${CMAKE_CXX_COMPILER_VERSION}. You can temporarily opt out using LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN, but very soon your toolchain won't be supported.")
endif()
endif()
endfunction(check_compiler_version)
check_compiler_version("GNU" "GCC" ${GCC_MIN} ${GCC_SOFT_ERROR})
check_compiler_version("Clang" "Clang" ${CLANG_MIN} ${CLANG_SOFT_ERROR})
check_compiler_version("AppleClang" "Apple Clang" ${APPLECLANG_MIN} ${APPLECLANG_SOFT_ERROR})
check_compiler_version("MSVC" "Visual Studio" ${MSVC_MIN} ${MSVC_SOFT_ERROR})
if(CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
if (CMAKE_CXX_SIMULATE_ID MATCHES "MSVC")
if (CMAKE_CXX_SIMULATE_VERSION VERSION_LESS MSVC_MIN)
message(FATAL_ERROR "Host Clang must have at least -fms-compatibility-version=${MSVC_MIN}, your version is ${CMAKE_CXX_COMPILER_VERSION}.")
endif()
set(CLANG_CL 1)
elseif(NOT LLVM_ENABLE_LIBCXX)
# Test that we aren't using too old of a version of libstdc++.
set(OLD_CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS})
set(OLD_CMAKE_REQUIRED_LIBRARIES ${CMAKE_REQUIRED_LIBRARIES})
set(CMAKE_REQUIRED_FLAGS "${CMAKE_REQUIRED_FLAGS} -std=c++0x")
check_cxx_source_compiles("
#include <iosfwd>
#if defined(__GLIBCXX__)
#if __GLIBCXX__ < ${GCC_MIN_DATE}
#error Unsupported libstdc++ version
#endif
#endif
int main() { return 0; }
"
LLVM_LIBSTDCXX_MIN)
if(NOT LLVM_LIBSTDCXX_MIN)
message(FATAL_ERROR "libstdc++ version must be at least ${GCC_MIN}.")
endif()
check_cxx_source_compiles("
#include <iosfwd>
#if defined(__GLIBCXX__)
#if __GLIBCXX__ < ${GCC_SOFT_ERROR_DATE}
#error Unsupported libstdc++ version
#endif
#endif
int main() { return 0; }
"
LLVM_LIBSTDCXX_SOFT_ERROR)
if(NOT LLVM_LIBSTDCXX_SOFT_ERROR)
if(LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN)
message(WARNING "libstdc++ version should be at least ${GCC_SOFT_ERROR} because LLVM will soon use new C++ features which your toolchain version doesn't support. Ignoring because you've set LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN, but very soon your toolchain won't be supported.")
else()
message(FATAL_ERROR "libstdc++ version should be at least ${GCC_SOFT_ERROR} because LLVM will soon use new C++ features which your toolchain version doesn't support. You can temporarily opt out using LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN, but very soon your toolchain won't be supported.")
endif()
endif()
set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS})
set(CMAKE_REQUIRED_LIBRARIES ${OLD_CMAKE_REQUIRED_LIBRARIES})
endif()
endif()

1
cmake/modules/CrossCompile.cmake
View File

@ -52,6 +52,7 @@ function(llvm_create_cross_target_internal target_name toolchain buildtype)
-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="${experimental_targets_to_build_arg}"
-DLLVM_DEFAULT_TARGET_TRIPLE="${TARGET_TRIPLE}"
-DLLVM_TARGET_ARCH="${LLVM_TARGET_ARCH}"
-DLLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN="${LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN}"
${build_type_flags} ${linker_flag} ${external_clang_dir}
WORKING_DIRECTORY ${LLVM_${target_name}_BUILD}
DEPENDS CREATE_LLVM_${target_name}

9
docs/CMake.rst
View File

@ -573,6 +573,15 @@ LLVM-specific variables
options, which are passed to the CCACHE_MAXSIZE and CCACHE_DIR environment
variables, respectively.
**LLVM_FORCE_USE_OLD_TOOLCHAIN**:BOOL
If enabled, the compiler and standard library versions won't be checked. LLVM
may not compile at all, or might fail at runtime due to known bugs in these
toolchains.
**LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN**:BOOL
If enabled, the compiler version check will only warn when using a toolchain
which is about to be deprecated, instead of emitting an error.
CMake Caches
============

43
docs/DeveloperPolicy.rst
View File

@ -22,7 +22,7 @@ This policy is also designed to accomplish the following objectives:
#. Make life as simple and easy for contributors as possible.
#. Keep the tip of tree as stable as possible.
#. Keep the top of tree as stable as possible.
#. Establish awareness of the project's :ref:`copyright, license, and patent
policies <copyright-license-patents>` with contributors to the project.
@ -638,6 +638,47 @@ In essences, these rules are necessary for targets to gain and retain their
status, but also markers to define bit-rot, and will be used to clean up the
tree from unmaintained targets.
.. _toolchain:
Updating Toolchain Requirements
-------------------------------
We intend to require newer toolchains as time goes by. This means LLVM's
codebase can use newer versions of C++ as they get standardized. Requiring newer
toolchains to build LLVM can be painful for those building LLVM; therefore, it
will only be done through the following process:
* Generally, try to support LLVM and GCC versions from the last 3 years at a
minimum. This time-based guideline is not strict: we may support much older
compilers, or decide to support fewer versions.
* An RFC is sent to the `llvm-dev mailing list <http://lists.llvm.org/mailman/listinfo/llvm-dev>`_
- Detail upsides of the version increase (e.g. which newer C++ language or
library features LLVM should use; avoid miscompiles in particular compiler
versions, etc).
- Detail downsides on important platforms (e.g. Ubuntu LTS status).
* Once the RFC reaches consensus, update the CMake toolchain version checks as
well as the :doc:`getting started<GettingStarted>` guide. We want to
soft-error when developers compile LLVM. We say "soft-error" because the
error can be turned into a warning using a CMake flag. This is an important
step: LLVM still doesn't have code which requires the new toolchains, but it
soon will. If you compile LLVM but don't read the mailing list, we should
tell you!
* Ensure that at least one LLVM release has had this soft-error. Not all
developers compile LLVM top-of-tree. These release-bound developers should
also be told about upcoming changes.
* Turn the soft-error into a hard-error after said LLVM release has branched.
* Update the :doc:`coding standards<CodingStandards>` to allow the new
features we've explicitly approved in the RFC.
* Start using the new features in LLVM's codebase.
.. _copyright-license-patents:
Copyright, License, and Patents

61
docs/GettingStarted.rst
View File

@ -170,7 +170,7 @@ uses the package and provides other details.
Package Version Notes
=========================================================== ============ ==========================================
`GNU Make <http://savannah.gnu.org/projects/make>`_ 3.79, 3.79.1 Makefile/build processor
`GCC <http://gcc.gnu.org/>`_ >=4.8.0 C/C++ compiler\ :sup:`1`
`GCC <http://gcc.gnu.org/>`_ >=5.1.0 C/C++ compiler\ :sup:`1`
`python <http://www.python.org/>`_ >=2.7 Automated test suite\ :sup:`2`
`zlib <http://zlib.net>`_ >=1.2.3.4 Compression library\ :sup:`3`
=========================================================== ============ ==========================================
@ -220,15 +220,25 @@ Host C++ Toolchain, both Compiler and Standard Library
------------------------------------------------------
LLVM is very demanding of the host C++ compiler, and as such tends to expose
bugs in the compiler. We are also planning to follow improvements and
developments in the C++ language and library reasonably closely. As such, we
require a modern host C++ toolchain, both compiler and standard library, in
order to build LLVM.
bugs in the compiler. We also attempt to follow improvements and developments in
the C++ language and library reasonably closely. As such, we require a modern
host C++ toolchain, both compiler and standard library, in order to build LLVM.
For the most popular host toolchains we check for specific minimum versions in
our build systems:
LLVM is written using the subset of C++ documented in :doc:`coding
standards<CodingStandards>`. To enforce this language version, we check the most
popular host toolchains for specific minimum versions in our build systems:
* Clang 3.5
* Apple Clang 6.0
* GCC 5.1
* Visual Studio 2017
The below versions currently soft-error as we transition to the new compiler
versions listed above. The LLVM codebase is currently known to compile correctly
with the following compilers, though this will change in the near future:
* Clang 3.1
* Apple Clang 3.1
* GCC 4.8
* Visual Studio 2015 (Update 3)
@ -282,33 +292,36 @@ The first step is to get a recent GCC toolchain installed. The most common
distribution on which users have struggled with the version requirements is
Ubuntu Precise, 12.04 LTS. For this distribution, one easy option is to install
the `toolchain testing PPA`_ and use it to install a modern GCC. There is
a really nice discussions of this on the `ask ubuntu stack exchange`_. However,
not all users can use PPAs and there are many other distributions, so it may be
necessary (or just useful, if you're here you *are* doing compiler development
after all) to build and install GCC from source. It is also quite easy to do
these days.
a really nice discussions of this on the `ask ubuntu stack exchange`_ and a
`github gist`_ with updated commands. However, not all users can use PPAs and
there are many other distributions, so it may be necessary (or just useful, if
you're here you *are* doing compiler development after all) to build and install
GCC from source. It is also quite easy to do these days.
.. _toolchain testing PPA:
https://launchpad.net/~ubuntu-toolchain-r/+archive/test
.. _ask ubuntu stack exchange:
http://askubuntu.com/questions/271388/how-to-install-gcc-4-8-in-ubuntu-12-04-from-the-terminal
https://askubuntu.com/questions/466651/how-do-i-use-the-latest-gcc-on-ubuntu/581497#58149
.. _github gist:
https://gist.github.com/application2000/73fd6f4bf1be6600a2cf9f56315a2d91
Easy steps for installing GCC 4.8.2:
Easy steps for installing GCC 5.1.0:
.. code-block:: console
% wget https://ftp.gnu.org/gnu/gcc/gcc-4.8.2/gcc-4.8.2.tar.bz2
% wget https://ftp.gnu.org/gnu/gcc/gcc-4.8.2/gcc-4.8.2.tar.bz2.sig
% gcc_version=5.1.0
% wget https://ftp.gnu.org/gnu/gcc/gcc-${gcc_version}/gcc-${gcc_version}.tar.bz2
% wget https://ftp.gnu.org/gnu/gcc/gcc-${gcc_version}/gcc-${gcc_version}.tar.bz2.sig
% wget https://ftp.gnu.org/gnu/gnu-keyring.gpg
% signature_invalid=`gpg --verify --no-default-keyring --keyring ./gnu-keyring.gpg gcc-4.8.2.tar.bz2.sig`
% signature_invalid=`gpg --verify --no-default-keyring --keyring ./gnu-keyring.gpg gcc-${gcc_version}.tar.bz2.sig`
% if [ $signature_invalid ]; then echo "Invalid signature" ; exit 1 ; fi
% tar -xvjf gcc-4.8.2.tar.bz2
% cd gcc-4.8.2
% tar -xvjf gcc-${gcc_version}.tar.bz2
% cd gcc-${gcc_version}
% ./contrib/download_prerequisites
% cd ..
% mkdir gcc-4.8.2-build
% cd gcc-4.8.2-build
% $PWD/../gcc-4.8.2/configure --prefix=$HOME/toolchains --enable-languages=c,c++
% mkdir gcc-${gcc_version}-build
% cd gcc-${gcc_version}-build
% $PWD/../gcc-${gcc_version}/configure --prefix=$HOME/toolchains --enable-languages=c,c++
% make -j$(nproc)
% make install
@ -316,7 +329,7 @@ For more details, check out the excellent `GCC wiki entry`_, where I got most
of this information from.
.. _GCC wiki entry:
http://gcc.gnu.org/wiki/InstallingGCC
https://gcc.gnu.org/wiki/InstallingGCC
Once you have a GCC toolchain, configure your build of LLVM to use the new
toolchain for your host compiler and C++ standard library. Because the new
@ -336,7 +349,7 @@ If you fail to set rpath, most LLVM binaries will fail on startup with a message
from the loader similar to ``libstdc++.so.6: version `GLIBCXX_3.4.20' not
found``. This means you need to tweak the -rpath linker flag.
When you build Clang, you will need to give *it* access to modern C++11
When you build Clang, you will need to give *it* access to modern C++
standard library in order to use it as your new host in part of a bootstrap.
There are two easy ways to do this, either build (and install) libc++ along
with Clang and then use it with the ``-stdlib=libc++`` compile and link flag,

14
docs/LibFuzzer.rst
View File

@ -645,10 +645,20 @@ coverage set of the process (since the fuzzer is in-process). In other words, by
using more external dependencies we will slow down the fuzzer while the main
reason for it to exist is extreme speed.
Q. What about Windows then? The fuzzer contains code that does not build on Windows.
Q. Does libFuzzer Support Windows?
------------------------------------------------------------------------------------
Volunteers are welcome.
Yes, libFuzzer now supports Windows. Initial support was added in r341082.
You can download a build of Clang for Windows
that has libFuzzer from
`LLVM Snapshot Builds <https://llvm.org/builds/>`_.
Using libFuzzer on Windows without ASAN is unsupported. Building fuzzers with the
``/MD`` (dynamic runtime library) compile option is unsupported. Support for these
may be added in the future. Linking fuzzers with the ``/INCREMENTAL`` link option
(or the ``/DEBUG`` option which implies it) is also unsupported.
Send any questions or comments to the mailing list: libfuzzer(#)googlegroups.com
Q. When libFuzzer is not a good solution for a problem?
---------------------------------------------------------

33
docs/ReleaseNotes.rst
View File

@ -40,6 +40,22 @@ Non-comprehensive list of changes in this release
functionality, or simply have a lot to talk about), see the `NOTE` below
for adding a new subsection.
* As `discussed on the mailing list
<https://lists.llvm.org/pipermail/llvm-dev/2019-January/129452.html>`_,
building LLVM will soon require more recent toolchains as follows:
============= ====
Clang 3.5
Apple Clang 6.0
GCC 5.1
Visual Studio 2017
============= ====
A new CMake check when configuring LLVM provides a soft-error if your
toolchain will become unsupported soon. You can opt out of the soft-error by
setting the ``LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN`` CMake variable to
``ON``.
* The **llvm-cov** tool can now export lcov trace files using the
`-format=lcov` option of the `export` command.
@ -82,7 +98,7 @@ Changes to the ARM Backend
Changes to the Hexagon Target
--------------------------
-----------------------------
* Added support for Hexagon/HVX V66 ISA.
@ -156,6 +172,21 @@ Changes to the DAG infrastructure
External Open Source Projects Using LLVM 8
==========================================
LDC - the LLVM-based D compiler
-------------------------------
`D <http://dlang.org>`_ is a language with C-like syntax and static typing. It
pragmatically combines efficiency, control, and modeling power, with safety and
programmer productivity. D supports powerful concepts like Compile-Time Function
Execution (CTFE) and Template Meta-Programming, provides an innovative approach
to concurrency and offers many classical paradigms.
`LDC <http://wiki.dlang.org/LDC>`_ uses the frontend from the reference compiler
combined with LLVM as backend to produce efficient native code. LDC targets
x86/x86_64 systems like Linux, OS X, FreeBSD and Windows and also Linux on ARM
and PowerPC (32/64 bit). Ports to other architectures like AArch64 and MIPS64
are underway.
Zig Programming Language
------------------------

4
include/llvm/BinaryFormat/Wasm.h
View File

@ -165,7 +165,8 @@ struct WasmSymbolInfo {
StringRef Name;
uint8_t Kind;
uint32_t Flags;
StringRef Module; // For undefined symbols the module name of the import
StringRef ImportModule; // For undefined symbols the module of the import
StringRef ImportName; // For undefined symbols the name of the import
union {
// For function or global symbols, the index in function or global index
// space.
@ -284,6 +285,7 @@ const unsigned WASM_SYMBOL_BINDING_LOCAL = 0x2;
const unsigned WASM_SYMBOL_VISIBILITY_DEFAULT = 0x0;
const unsigned WASM_SYMBOL_VISIBILITY_HIDDEN = 0x4;
const unsigned WASM_SYMBOL_UNDEFINED = 0x10;
const unsigned WASM_SYMBOL_EXPLICIT_NAME = 0x40;
#define WASM_RELOC(name, value) name = value,

22
include/llvm/MC/MCSymbolWasm.h
View File

@ -19,7 +19,8 @@ class MCSymbolWasm : public MCSymbol {
bool IsWeak = false;
bool IsHidden = false;
bool IsComdat = false;
std::string ModuleName;
Optional<std::string> ImportModule;
Optional<std::string> ImportName;
wasm::WasmSignature *Signature = nullptr;
Optional<wasm::WasmGlobalType> GlobalType;
Optional<wasm::WasmEventType> EventType;
@ -32,7 +33,7 @@ public:
// Use a module name of "env" for now, for compatibility with existing tools.
// This is temporary, and may change, as the ABI is not yet stable.
MCSymbolWasm(const StringMapEntry<bool> *Name, bool isTemporary)
: MCSymbol(SymbolKindWasm, Name, isTemporary), ModuleName("env") {}
: MCSymbol(SymbolKindWasm, Name, isTemporary) {}
static bool classof(const MCSymbol *S) { return S->isWasm(); }
const MCExpr *getSize() const { return SymbolSize; }
@ -55,8 +56,21 @@ public:
bool isComdat() const { return IsComdat; }
void setComdat(bool isComdat) { IsComdat = isComdat; }
const StringRef getModuleName() const { return ModuleName; }
void setModuleName(StringRef Name) { ModuleName = Name; }
const StringRef getImportModule() const {
if (ImportModule.hasValue()) {
return ImportModule.getValue();
}
return "env";
}
void setImportModule(StringRef Name) { ImportModule = Name; }
const StringRef getImportName() const {
if (ImportName.hasValue()) {
return ImportName.getValue();
}
return getName();
}
void setImportName(StringRef Name) { ImportName = Name; }
const wasm::WasmSignature *getSignature() const { return Signature; }
void setSignature(wasm::WasmSignature *Sig) { Signature = Sig; }

190
lib/Analysis/TargetLibraryInfo.cpp
View File

@ -161,25 +161,66 @@ static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T,
}
if (T.isOSWindows() && !T.isOSCygMing()) {
// Win32 does not support long double
// XXX: The earliest documentation available at the moment is for VS2015/VC19:
// https://docs.microsoft.com/en-us/cpp/c-runtime-library/floating-point-support?view=vs-2015
// XXX: In order to use an MSVCRT older than VC19,
// the specific library version must be explicit in the target triple,
// e.g., x86_64-pc-windows-msvc18.
bool hasPartialC99 = true;
if (T.isKnownWindowsMSVCEnvironment()) {
unsigned Major, Minor, Micro;
T.getEnvironmentVersion(Major, Minor, Micro);
hasPartialC99 = (Major == 0 || Major >= 19);
}
// Latest targets support C89 math functions, in part.
bool isARM = (T.getArch() == Triple::aarch64 ||
T.getArch() == Triple::arm);
bool hasPartialFloat = (isARM ||
T.getArch() == Triple::x86_64);
// Win32 does not support float C89 math functions, in general.
if (!hasPartialFloat) {
TLI.setUnavailable(LibFunc_acosf);
TLI.setUnavailable(LibFunc_asinf);
TLI.setUnavailable(LibFunc_atan2f);
TLI.setUnavailable(LibFunc_atanf);
TLI.setUnavailable(LibFunc_ceilf);
TLI.setUnavailable(LibFunc_cosf);
TLI.setUnavailable(LibFunc_coshf);
TLI.setUnavailable(LibFunc_expf);
TLI.setUnavailable(LibFunc_floorf);
TLI.setUnavailable(LibFunc_fmodf);
TLI.setUnavailable(LibFunc_log10f);
TLI.setUnavailable(LibFunc_logf);
TLI.setUnavailable(LibFunc_modff);
TLI.setUnavailable(LibFunc_powf);
TLI.setUnavailable(LibFunc_sinf);
TLI.setUnavailable(LibFunc_sinhf);
TLI.setUnavailable(LibFunc_sqrtf);
TLI.setUnavailable(LibFunc_tanf);
TLI.setUnavailable(LibFunc_tanhf);
}
if (!isARM)
TLI.setUnavailable(LibFunc_fabsf);
TLI.setUnavailable(LibFunc_frexpf);
TLI.setUnavailable(LibFunc_ldexpf);
// Win32 does not support long double C89 math functions.
TLI.setUnavailable(LibFunc_acosl);
TLI.setUnavailable(LibFunc_asinl);
TLI.setUnavailable(LibFunc_atanl);
TLI.setUnavailable(LibFunc_atan2l);
TLI.setUnavailable(LibFunc_atanl);
TLI.setUnavailable(LibFunc_ceill);
TLI.setUnavailable(LibFunc_copysignl);
TLI.setUnavailable(LibFunc_cosl);
TLI.setUnavailable(LibFunc_coshl);
TLI.setUnavailable(LibFunc_expl);
TLI.setUnavailable(LibFunc_fabsf); // Win32 and Win64 both lack fabsf
TLI.setUnavailable(LibFunc_fabsl);
TLI.setUnavailable(LibFunc_floorl);
TLI.setUnavailable(LibFunc_fmaxl);
TLI.setUnavailable(LibFunc_fminl);
TLI.setUnavailable(LibFunc_fmodl);
TLI.setUnavailable(LibFunc_frexpl);
TLI.setUnavailable(LibFunc_ldexpf);
TLI.setUnavailable(LibFunc_ldexpl);
TLI.setUnavailable(LibFunc_log10l);
TLI.setUnavailable(LibFunc_logl);
TLI.setUnavailable(LibFunc_modfl);
TLI.setUnavailable(LibFunc_powl);
@ -189,81 +230,66 @@ static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T,
TLI.setUnavailable(LibFunc_tanl);
TLI.setUnavailable(LibFunc_tanhl);
// Win32 only has C89 math
TLI.setUnavailable(LibFunc_acosh);
TLI.setUnavailable(LibFunc_acoshf);
TLI.setUnavailable(LibFunc_acoshl);
TLI.setUnavailable(LibFunc_asinh);
TLI.setUnavailable(LibFunc_asinhf);
TLI.setUnavailable(LibFunc_asinhl);
TLI.setUnavailable(LibFunc_atanh);
TLI.setUnavailable(LibFunc_atanhf);
TLI.setUnavailable(LibFunc_atanhl);
TLI.setUnavailable(LibFunc_cabs);
TLI.setUnavailable(LibFunc_cabsf);
TLI.setUnavailable(LibFunc_cabsl);
TLI.setUnavailable(LibFunc_cbrt);
TLI.setUnavailable(LibFunc_cbrtf);
TLI.setUnavailable(LibFunc_cbrtl);
TLI.setUnavailable(LibFunc_exp2);
TLI.setUnavailable(LibFunc_exp2f);
TLI.setUnavailable(LibFunc_exp2l);
TLI.setUnavailable(LibFunc_expm1);
TLI.setUnavailable(LibFunc_expm1f);
TLI.setUnavailable(LibFunc_expm1l);
TLI.setUnavailable(LibFunc_log2);
TLI.setUnavailable(LibFunc_log2f);
TLI.setUnavailable(LibFunc_log2l);
TLI.setUnavailable(LibFunc_log1p);
TLI.setUnavailable(LibFunc_log1pf);
TLI.setUnavailable(LibFunc_log1pl);
TLI.setUnavailable(LibFunc_logb);
TLI.setUnavailable(LibFunc_logbf);
TLI.setUnavailable(LibFunc_logbl);
TLI.setUnavailable(LibFunc_nearbyint);
TLI.setUnavailable(LibFunc_nearbyintf);
TLI.setUnavailable(LibFunc_nearbyintl);
TLI.setUnavailable(LibFunc_rint);
TLI.setUnavailable(LibFunc_rintf);
TLI.setUnavailable(LibFunc_rintl);
TLI.setUnavailable(LibFunc_round);
TLI.setUnavailable(LibFunc_roundf);
TLI.setUnavailable(LibFunc_roundl);
TLI.setUnavailable(LibFunc_trunc);
TLI.setUnavailable(LibFunc_truncf);
TLI.setUnavailable(LibFunc_truncl);
// Win32 provides some C99 math with mangled names
TLI.setAvailableWithName(LibFunc_copysign, "_copysign");
if (T.getArch() == Triple::x86) {
// Win32 on x86 implements single-precision math functions as macros
TLI.setUnavailable(LibFunc_acosf);
TLI.setUnavailable(LibFunc_asinf);
TLI.setUnavailable(LibFunc_atanf);
TLI.setUnavailable(LibFunc_atan2f);
TLI.setUnavailable(LibFunc_ceilf);
TLI.setUnavailable(LibFunc_copysignf);
TLI.setUnavailable(LibFunc_cosf);
TLI.setUnavailable(LibFunc_coshf);
TLI.setUnavailable(LibFunc_expf);
TLI.setUnavailable(LibFunc_floorf);
TLI.setUnavailable(LibFunc_fminf);
// Win32 does not fully support C99 math functions.
if (!hasPartialC99) {
TLI.setUnavailable(LibFunc_acosh);
TLI.setUnavailable(LibFunc_acoshf);
TLI.setUnavailable(LibFunc_asinh);
TLI.setUnavailable(LibFunc_asinhf);
TLI.setUnavailable(LibFunc_atanh);
TLI.setUnavailable(LibFunc_atanhf);
TLI.setAvailableWithName(LibFunc_cabs, "_cabs");
TLI.setUnavailable(LibFunc_cabsf);
TLI.setUnavailable(LibFunc_cbrt);
TLI.setUnavailable(LibFunc_cbrtf);
TLI.setAvailableWithName(LibFunc_copysign, "_copysign");
TLI.setAvailableWithName(LibFunc_copysignf, "_copysignf");
TLI.setUnavailable(LibFunc_exp2);
TLI.setUnavailable(LibFunc_exp2f);
TLI.setUnavailable(LibFunc_expm1);
TLI.setUnavailable(LibFunc_expm1f);
TLI.setUnavailable(LibFunc_fmax);
TLI.setUnavailable(LibFunc_fmaxf);
TLI.setUnavailable(LibFunc_fmodf);
TLI.setUnavailable(LibFunc_logf);
TLI.setUnavailable(LibFunc_log10f);
TLI.setUnavailable(LibFunc_modff);
TLI.setUnavailable(LibFunc_powf);
TLI.setUnavailable(LibFunc_sinf);
TLI.setUnavailable(LibFunc_sinhf);
TLI.setUnavailable(LibFunc_sqrtf);
TLI.setUnavailable(LibFunc_tanf);
TLI.setUnavailable(LibFunc_tanhf);
TLI.setUnavailable(LibFunc_fmin);
TLI.setUnavailable(LibFunc_fminf);
TLI.setUnavailable(LibFunc_log1p);
TLI.setUnavailable(LibFunc_log1pf);
TLI.setUnavailable(LibFunc_log2);
TLI.setUnavailable(LibFunc_log2f);
TLI.setAvailableWithName(LibFunc_logb, "_logb");
if (hasPartialFloat)
TLI.setAvailableWithName(LibFunc_logbf, "_logbf");
else
TLI.setUnavailable(LibFunc_logbf);
TLI.setUnavailable(LibFunc_rint);
TLI.setUnavailable(LibFunc_rintf);
TLI.setUnavailable(LibFunc_round);
TLI.setUnavailable(LibFunc_roundf);
TLI.setUnavailable(LibFunc_trunc);
TLI.setUnavailable(LibFunc_truncf);
}
// Win32 does *not* provide these functions, but they are
// generally available on POSIX-compliant systems:
// Win32 does not support long double C99 math functions.
TLI.setUnavailable(LibFunc_acoshl);
TLI.setUnavailable(LibFunc_asinhl);
TLI.setUnavailable(LibFunc_atanhl);
TLI.setUnavailable(LibFunc_cabsl);
TLI.setUnavailable(LibFunc_cbrtl);
TLI.setUnavailable(LibFunc_copysignl);
TLI.setUnavailable(LibFunc_exp2l);
TLI.setUnavailable(LibFunc_expm1l);
TLI.setUnavailable(LibFunc_fmaxl);
TLI.setUnavailable(LibFunc_fminl);
TLI.setUnavailable(LibFunc_log1pl);
TLI.setUnavailable(LibFunc_log2l);
TLI.setUnavailable(LibFunc_logbl);
TLI.setUnavailable(LibFunc_nearbyintl);
TLI.setUnavailable(LibFunc_rintl);
TLI.setUnavailable(LibFunc_roundl);
TLI.setUnavailable(LibFunc_truncl);
// Win32 does not support these functions, but
// they are generally available on POSIX-compliant systems.
TLI.setUnavailable(LibFunc_access);
TLI.setUnavailable(LibFunc_bcmp);
TLI.setUnavailable(LibFunc_bcopy);
@ -318,12 +344,6 @@ static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T,
TLI.setUnavailable(LibFunc_utime);
TLI.setUnavailable(LibFunc_utimes);
TLI.setUnavailable(LibFunc_write);
// Win32 does *not* provide provide these functions, but they are
// specified by C99:
TLI.setUnavailable(LibFunc_atoll);
TLI.setUnavailable(LibFunc_frexpf);
TLI.setUnavailable(LibFunc_llabs);
}
switch (T.getOS()) {

5
lib/MC/MCExpr.cpp
View File

@ -559,6 +559,11 @@ static void AttemptToFoldSymbolOffsetDifference(
if (Asm->isThumbFunc(&SA))
Addend |= 1;
// If symbol is labeled as micromips, we set low-bit to ensure
// correct offset in .gcc_except_table
if (Asm->getBackend().isMicroMips(&SA))
Addend |= 1;
// Clear the symbol expr pointers to indicate we have folded these
// operands.
A = B = nullptr;

9
lib/MC/MCParser/AsmParser.cpp
View File

@ -3364,10 +3364,11 @@ bool AsmParser::parseDirectiveFile(SMLoc DirectiveLoc) {
}
if (FileNumber == -1) {
if (!getContext().getAsmInfo()->hasSingleParameterDotFile())
return Error(DirectiveLoc,
"target does not support '.file' without a number");
getStreamer().EmitFileDirective(Filename);
// Ignore the directive if there is no number and the target doesn't support
// numberless .file directives. This allows some portability of assembler
// between different object file formats.
if (getContext().getAsmInfo()->hasSingleParameterDotFile())
getStreamer().EmitFileDirective(Filename);
} else {
// In case there is a -g option as well as debug info from directive .file,
// we turn off the -g option, directly use the existing debug info instead.

25
lib/MC/WasmObjectWriter.cpp
View File

@ -982,7 +982,8 @@ void WasmObjectWriter::writeLinkingMetaDataSection(
case wasm::WASM_SYMBOL_TYPE_GLOBAL:
case wasm::WASM_SYMBOL_TYPE_EVENT:
encodeULEB128(Sym.ElementIndex, W.OS);
if ((Sym.Flags & wasm::WASM_SYMBOL_UNDEFINED) == 0)
if ((Sym.Flags & wasm::WASM_SYMBOL_UNDEFINED) == 0 ||
(Sym.Flags & wasm::WASM_SYMBOL_EXPLICIT_NAME) != 0)
writeString(Sym.Name);
break;
case wasm::WASM_SYMBOL_TYPE_DATA:
@ -1162,8 +1163,8 @@ uint64_t WasmObjectWriter::writeObject(MCAssembler &Asm,
MCSymbolWasm *MemorySym =
cast<MCSymbolWasm>(Ctx.getOrCreateSymbol("__linear_memory"));
wasm::WasmImport MemImport;
MemImport.Module = MemorySym->getModuleName();
MemImport.Field = MemorySym->getName();
MemImport.Module = MemorySym->getImportModule();
MemImport.Field = MemorySym->getImportName();
MemImport.Kind = wasm::WASM_EXTERNAL_MEMORY;
Imports.push_back(MemImport);
@ -1173,8 +1174,8 @@ uint64_t WasmObjectWriter::writeObject(MCAssembler &Asm,
MCSymbolWasm *TableSym =
cast<MCSymbolWasm>(Ctx.getOrCreateSymbol("__indirect_function_table"));
wasm::WasmImport TableImport;
TableImport.Module = TableSym->getModuleName();
TableImport.Field = TableSym->getName();
TableImport.Module = TableSym->getImportModule();
TableImport.Field = TableSym->getImportName();
TableImport.Kind = wasm::WASM_EXTERNAL_TABLE;
TableImport.Table.ElemType = wasm::WASM_TYPE_FUNCREF;
Imports.push_back(TableImport);
@ -1200,8 +1201,8 @@ uint64_t WasmObjectWriter::writeObject(MCAssembler &Asm,
if (!WS.isDefined() && !WS.isComdat()) {
if (WS.isFunction()) {
wasm::WasmImport Import;
Import.Module = WS.getModuleName();
Import.Field = WS.getName();
Import.Module = WS.getImportModule();
Import.Field = WS.getImportName();
Import.Kind = wasm::WASM_EXTERNAL_FUNCTION;
Import.SigIndex = getFunctionType(WS);
Imports.push_back(Import);
@ -1211,8 +1212,8 @@ uint64_t WasmObjectWriter::writeObject(MCAssembler &Asm,
report_fatal_error("undefined global symbol cannot be weak");
wasm::WasmImport Import;
Import.Module = WS.getModuleName();
Import.Field = WS.getName();
Import.Module = WS.getImportModule();
Import.Field = WS.getImportName();
Import.Kind = wasm::WASM_EXTERNAL_GLOBAL;
Import.Global = WS.getGlobalType();
Imports.push_back(Import);
@ -1222,8 +1223,8 @@ uint64_t WasmObjectWriter::writeObject(MCAssembler &Asm,
report_fatal_error("undefined event symbol cannot be weak");
wasm::WasmImport Import;
Import.Module = WS.getModuleName();
Import.Field = WS.getName();
Import.Module = WS.getImportModule();
Import.Field = WS.getImportName();
Import.Kind = wasm::WASM_EXTERNAL_EVENT;
Import.Event.Attribute = wasm::WASM_EVENT_ATTRIBUTE_EXCEPTION;
Import.Event.SigIndex = getEventType(WS);
@ -1448,6 +1449,8 @@ uint64_t WasmObjectWriter::writeObject(MCAssembler &Asm,
Flags |= wasm::WASM_SYMBOL_BINDING_LOCAL;
if (WS.isUndefined())
Flags |= wasm::WASM_SYMBOL_UNDEFINED;
if (WS.getName() != WS.getImportName())
Flags |= wasm::WASM_SYMBOL_EXPLICIT_NAME;
wasm::WasmSymbolInfo Info;
Info.Name = WS.getName();

22
lib/Object/WasmObjectFile.cpp
View File

@ -505,9 +505,13 @@ Error WasmObjectFile::parseLinkingSectionSymtab(ReadContext &Ctx) {
Function.SymbolName = Info.Name;
} else {
wasm::WasmImport &Import = *ImportedFunctions[Info.ElementIndex];
if ((Info.Flags & wasm::WASM_SYMBOL_EXPLICIT_NAME) != 0)
Info.Name = readString(Ctx);
else
Info.Name = Import.Field;
Signature = &Signatures[Import.SigIndex];
Info.Name = Import.Field;
Info.Module = Import.Module;
Info.ImportName = Import.Field;
Info.ImportModule = Import.Module;
}
break;
@ -530,8 +534,13 @@ Error WasmObjectFile::parseLinkingSectionSymtab(ReadContext &Ctx) {
Global.SymbolName = Info.Name;
} else {
wasm::WasmImport &Import = *ImportedGlobals[Info.ElementIndex];
Info.Name = Import.Field;
if ((Info.Flags & wasm::WASM_SYMBOL_EXPLICIT_NAME) != 0)
Info.Name = readString(Ctx);
else
Info.Name = Import.Field;
GlobalType = &Import.Global;
Info.ImportName = Import.Field;
Info.ImportModule = Import.Module;
}
break;
@ -585,9 +594,14 @@ Error WasmObjectFile::parseLinkingSectionSymtab(ReadContext &Ctx) {
} else {
wasm::WasmImport &Import = *ImportedEvents[Info.ElementIndex];
if ((Info.Flags & wasm::WASM_SYMBOL_EXPLICIT_NAME) != 0)
Info.Name = readString(Ctx);
else
Info.Name = Import.Field;
EventType = &Import.Event;
Signature = &Signatures[EventType->SigIndex];
Info.Name = Import.Field;
Info.ImportName = Import.Field;
Info.ImportModule = Import.Module;
}
break;
}

6
lib/Support/Unix/Threading.inc
View File

@ -202,6 +202,12 @@ void llvm::get_thread_name(SmallVectorImpl<char> &Name) {
char buf[len];
::pthread_getname_np(::pthread_self(), buf, len);
Name.append(buf, buf + strlen(buf));
#elif defined(__OpenBSD__)
constexpr uint32_t len = get_max_thread_name_length_impl();
char buf[len];
::pthread_get_name_np(::pthread_self(), buf, len);
Name.append(buf, buf + strlen(buf));
#elif defined(__linux__)
#if HAVE_PTHREAD_GETNAME_NP

41
lib/Target/AArch64/AArch64InstrInfo.cpp
View File

@ -2292,6 +2292,31 @@ void AArch64InstrInfo::copyPhysRegTuple(MachineBasicBlock &MBB,
}
}
void AArch64InstrInfo::copyGPRRegTuple(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
DebugLoc DL, unsigned DestReg,
unsigned SrcReg, bool KillSrc,
unsigned Opcode, unsigned ZeroReg,
llvm::ArrayRef<unsigned> Indices) const {
const TargetRegisterInfo *TRI = &getRegisterInfo();
unsigned NumRegs = Indices.size();
#ifndef NDEBUG
uint16_t DestEncoding = TRI->getEncodingValue(DestReg);
uint16_t SrcEncoding = TRI->getEncodingValue(SrcReg);
assert(DestEncoding % NumRegs == 0 && SrcEncoding % NumRegs == 0 &&
"GPR reg sequences should not be able to overlap");
#endif
for (unsigned SubReg = 0; SubReg != NumRegs; ++SubReg) {
const MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opcode));
AddSubReg(MIB, DestReg, Indices[SubReg], RegState::Define, TRI);
MIB.addReg(ZeroReg);
AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI);
MIB.addImm(0);
}
}
void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
const DebugLoc &DL, unsigned DestReg,
@ -2431,6 +2456,22 @@ void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
return;
}
if (AArch64::XSeqPairsClassRegClass.contains(DestReg) &&
AArch64::XSeqPairsClassRegClass.contains(SrcReg)) {
static const unsigned Indices[] = {AArch64::sube64, AArch64::subo64};
copyGPRRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRXrs,
AArch64::XZR, Indices);
return;
}
if (AArch64::WSeqPairsClassRegClass.contains(DestReg) &&
AArch64::WSeqPairsClassRegClass.contains(SrcReg)) {
static const unsigned Indices[] = {AArch64::sube32, AArch64::subo32};
copyGPRRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRWrs,
AArch64::WZR, Indices);
return;
}
if (AArch64::FPR128RegClass.contains(DestReg) &&
AArch64::FPR128RegClass.contains(SrcReg)) {
if (Subtarget.hasNEON()) {

4
lib/Target/AArch64/AArch64InstrInfo.h
View File

@ -122,6 +122,10 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc, unsigned Opcode,
llvm::ArrayRef<unsigned> Indices) const;
void copyGPRRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
DebugLoc DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc, unsigned Opcode, unsigned ZeroReg,
llvm::ArrayRef<unsigned> Indices) const;
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;

10
lib/Target/AArch64/AArch64RegisterInfo.td
View File

@ -649,10 +649,12 @@ def FPR128Op : RegisterOperand<FPR128, "printOperand"> {
// ARMv8.1a atomic CASP register operands
def WSeqPairs : RegisterTuples<[sube32, subo32],
[(rotl GPR32, 0), (rotl GPR32, 1)]>;
def XSeqPairs : RegisterTuples<[sube64, subo64],
[(rotl GPR64, 0), (rotl GPR64, 1)]>;
def WSeqPairs : RegisterTuples<[sube32, subo32],
[(decimate (rotl GPR32, 0), 2),
(decimate (rotl GPR32, 1), 2)]>;
def XSeqPairs : RegisterTuples<[sube64, subo64],
[(decimate (rotl GPR64, 0), 2),
(decimate (rotl GPR64, 1), 2)]>;
def WSeqPairsClass : RegisterClass<"AArch64", [untyped], 32,
(add WSeqPairs)>{

4
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
View File

@ -1779,8 +1779,8 @@ static DecodeStatus DecodeGPRSeqPairsClassRegisterClass(MCInst &Inst,
if (RegNo & 0x1)
return Fail;
unsigned Register = AArch64MCRegisterClasses[RegClassID].getRegister(RegNo);
Inst.addOperand(MCOperand::createReg(Register));
unsigned Reg = AArch64MCRegisterClasses[RegClassID].getRegister(RegNo / 2);
Inst.addOperand(MCOperand::createReg(Reg));
return Success;
}

121
lib/Target/SystemZ/SystemZISelLowering.cpp
View File

@ -5618,55 +5618,96 @@ SDValue SystemZTargetLowering::combineBSWAP(
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
// We have a SELECT_CCMASK or BR_CCMASK comparing the condition code
// set by the CCReg instruction using the CCValid / CCMask masks,
// If the CCReg instruction is itself a (ICMP (SELECT_CCMASK)) testing
// the condition code set by some other instruction, see whether we
// can directly use that condition code.
bool Invert = false;
// If the CCReg instruction is itself a ICMP testing the condition
// code set by some other instruction, see whether we can directly
// use that condition code.
// Verify that we have an appropriate mask for a EQ or NE comparison.
// Verify that we have an ICMP against some constant.
if (CCValid != SystemZ::CCMASK_ICMP)
return false;
if (CCMask == SystemZ::CCMASK_CMP_NE)
Invert = !Invert;
else if (CCMask != SystemZ::CCMASK_CMP_EQ)
return false;
// Verify that we have an ICMP that is the user of a SELECT_CCMASK.
SDNode *ICmp = CCReg.getNode();
auto *ICmp = CCReg.getNode();
if (ICmp->getOpcode() != SystemZISD::ICMP)
return false;
SDNode *Select = ICmp->getOperand(0).getNode();
if (Select->getOpcode() != SystemZISD::SELECT_CCMASK)
auto *CompareLHS = ICmp->getOperand(0).getNode();
auto *CompareRHS = dyn_cast<ConstantSDNode>(ICmp->getOperand(1));
if (!CompareRHS)
return false;
// Verify that the ICMP compares against one of select values.
auto *CompareVal = dyn_cast<ConstantSDNode>(ICmp->getOperand(1));
if (!CompareVal)
return false;
auto *TrueVal = dyn_cast<ConstantSDNode>(Select->getOperand(0));
if (!TrueVal)
return false;
auto *FalseVal = dyn_cast<ConstantSDNode>(Select->getOperand(1));
if (!FalseVal)
return false;
if (CompareVal->getZExtValue() == FalseVal->getZExtValue())
Invert = !Invert;
else if (CompareVal->getZExtValue() != TrueVal->getZExtValue())
return false;
// Optimize the case where CompareLHS is a SELECT_CCMASK.
if (CompareLHS->getOpcode() == SystemZISD::SELECT_CCMASK) {
// Verify that we have an appropriate mask for a EQ or NE comparison.
bool Invert = false;
if (CCMask == SystemZ::CCMASK_CMP_NE)
Invert = !Invert;
else if (CCMask != SystemZ::CCMASK_CMP_EQ)
return false;
// Compute the effective CC mask for the new branch or select.
auto *NewCCValid = dyn_cast<ConstantSDNode>(Select->getOperand(2));
auto *NewCCMask = dyn_cast<ConstantSDNode>(Select->getOperand(3));
if (!NewCCValid || !NewCCMask)
return false;
CCValid = NewCCValid->getZExtValue();
CCMask = NewCCMask->getZExtValue();
if (Invert)
CCMask ^= CCValid;
// Verify that the ICMP compares against one of select values.
auto *TrueVal = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(0));
if (!TrueVal)
return false;
auto *FalseVal = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(1));
if (!FalseVal)
return false;
if (CompareRHS->getZExtValue() == FalseVal->getZExtValue())
Invert = !Invert;
else if (CompareRHS->getZExtValue() != TrueVal->getZExtValue())
return false;
// Return the updated CCReg link.
CCReg = Select->getOperand(4);
return true;
// Compute the effective CC mask for the new branch or select.
auto *NewCCValid = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(2));
auto *NewCCMask = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(3));
if (!NewCCValid || !NewCCMask)
return false;
CCValid = NewCCValid->getZExtValue();
CCMask = NewCCMask->getZExtValue();
if (Invert)
CCMask ^= CCValid;
// Return the updated CCReg link.
CCReg = CompareLHS->getOperand(4);
return true;
}
// Optimize the case where CompareRHS is (SRA (SHL (IPM))).
if (CompareLHS->getOpcode() == ISD::SRA) {
auto *SRACount = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(1));
if (!SRACount || SRACount->getZExtValue() != 30)
return false;
auto *SHL = CompareLHS->getOperand(0).getNode();
if (SHL->getOpcode() != ISD::SHL)
return false;
auto *SHLCount = dyn_cast<ConstantSDNode>(SHL->getOperand(1));
if (!SHLCount || SHLCount->getZExtValue() != 30 - SystemZ::IPM_CC)
return false;
auto *IPM = SHL->getOperand(0).getNode();
if (IPM->getOpcode() != SystemZISD::IPM)
return false;
// Avoid introducing CC spills (because SRA would clobber CC).
if (!CompareLHS->hasOneUse())
return false;
// Verify that the ICMP compares against zero.
if (CompareRHS->getZExtValue() != 0)
return false;
// Compute the effective CC mask for the new branch or select.
switch (CCMask) {
case SystemZ::CCMASK_CMP_EQ: break;
case SystemZ::CCMASK_CMP_NE: break;
case SystemZ::CCMASK_CMP_LT: CCMask = SystemZ::CCMASK_CMP_GT; break;
case SystemZ::CCMASK_CMP_GT: CCMask = SystemZ::CCMASK_CMP_LT; break;
case SystemZ::CCMASK_CMP_LE: CCMask = SystemZ::CCMASK_CMP_GE; break;
case SystemZ::CCMASK_CMP_GE: CCMask = SystemZ::CCMASK_CMP_LE; break;
default: return false;
}
// Return the updated CCReg link.
CCReg = IPM->getOperand(0);
return true;
}
return false;
}
SDValue SystemZTargetLowering::combineBR_CCMASK(

74
lib/Target/SystemZ/SystemZInstrInfo.cpp
View File

@ -557,80 +557,6 @@ bool SystemZInstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
return false;
}
// If Reg is a virtual register, return its definition, otherwise return null.
static MachineInstr *getDef(unsigned Reg,
const MachineRegisterInfo *MRI) {
if (TargetRegisterInfo::isPhysicalRegister(Reg))
return nullptr;
return MRI->getUniqueVRegDef(Reg);
}
// Return true if MI is a shift of type Opcode by Imm bits.
static bool isShift(MachineInstr *MI, unsigned Opcode, int64_t Imm) {
return (MI->getOpcode() == Opcode &&
!MI->getOperand(2).getReg() &&
MI->getOperand(3).getImm() == Imm);
}
// If the destination of MI has no uses, delete it as dead.
static void eraseIfDead(MachineInstr *MI, const MachineRegisterInfo *MRI) {
if (MRI->use_nodbg_empty(MI->getOperand(0).getReg()))
MI->eraseFromParent();
}
// Compare compares SrcReg against zero. Check whether SrcReg contains
// the result of an IPM sequence whose input CC survives until Compare,
// and whether Compare is therefore redundant. Delete it and return
// true if so.
static bool removeIPMBasedCompare(MachineInstr &Compare, unsigned SrcReg,
const MachineRegisterInfo *MRI,
const TargetRegisterInfo *TRI) {
MachineInstr *LGFR = nullptr;
MachineInstr *RLL = getDef(SrcReg, MRI);
if (RLL && RLL->getOpcode() == SystemZ::LGFR) {
LGFR = RLL;
RLL = getDef(LGFR->getOperand(1).getReg(), MRI);
}
if (!RLL || !isShift(RLL, SystemZ::RLL, 31))
return false;
MachineInstr *SRL = getDef(RLL->getOperand(1).getReg(), MRI);
if (!SRL || !isShift(SRL, SystemZ::SRL, SystemZ::IPM_CC))
return false;
MachineInstr *IPM = getDef(SRL->getOperand(1).getReg(), MRI);
if (!IPM || IPM->getOpcode() != SystemZ::IPM)
return false;
// Check that there are no assignments to CC between the IPM and Compare,
if (IPM->getParent() != Compare.getParent())
return false;
MachineBasicBlock::iterator MBBI = IPM, MBBE = Compare.getIterator();
for (++MBBI; MBBI != MBBE; ++MBBI) {
MachineInstr &MI = *MBBI;
if (MI.modifiesRegister(SystemZ::CC, TRI))
return false;
}
Compare.eraseFromParent();
if (LGFR)
eraseIfDead(LGFR, MRI);
eraseIfDead(RLL, MRI);
eraseIfDead(SRL, MRI);
eraseIfDead(IPM, MRI);
return true;
}
bool SystemZInstrInfo::optimizeCompareInstr(
MachineInstr &Compare, unsigned SrcReg, unsigned SrcReg2, int Mask,
int Value, const MachineRegisterInfo *MRI) const {
assert(!SrcReg2 && "Only optimizing constant comparisons so far");
bool IsLogical = (Compare.getDesc().TSFlags & SystemZII::IsLogical) != 0;
return Value == 0 && !IsLogical &&
removeIPMBasedCompare(Compare, SrcReg, MRI, &RI);
}
bool SystemZInstrInfo::canInsertSelect(const MachineBasicBlock &MBB,
ArrayRef<MachineOperand> Pred,
unsigned TrueReg, unsigned FalseReg,

3
lib/Target/SystemZ/SystemZInstrInfo.h
View File

@ -208,9 +208,6 @@ public:
int *BytesAdded = nullptr) const override;
bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
unsigned &SrcReg2, int &Mask, int &Value) const override;
bool optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
unsigned SrcReg2, int Mask, int Value,
const MachineRegisterInfo *MRI) const override;
bool canInsertSelect(const MachineBasicBlock&, ArrayRef<MachineOperand> Cond,
unsigned, unsigned, int&, int&, int&) const override;
void insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,

18
lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
View File

@ -164,17 +164,17 @@ static SDValue emitCLC(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
}
// Convert the current CC value into an integer that is 0 if CC == 0,
// less than zero if CC == 1 and greater than zero if CC >= 2.
// greater than zero if CC == 1 and less than zero if CC >= 2.
// The sequence starts with IPM, which puts CC into bits 29 and 28
// of an integer and clears bits 30 and 31.
static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg,
SelectionDAG &DAG) {
SDValue IPM = DAG.getNode(SystemZISD::IPM, DL, MVT::i32, CCReg);
SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i32, IPM,
DAG.getConstant(SystemZ::IPM_CC, DL, MVT::i32));
SDValue ROTL = DAG.getNode(ISD::ROTL, DL, MVT::i32, SRL,
DAG.getConstant(31, DL, MVT::i32));
return ROTL;
SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, IPM,
DAG.getConstant(30 - SystemZ::IPM_CC, DL, MVT::i32));
SDValue SRA = DAG.getNode(ISD::SRA, DL, MVT::i32, SHL,
DAG.getConstant(30, DL, MVT::i32));
return SRA;
}
std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(
@ -184,7 +184,8 @@ std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(
if (auto *CSize = dyn_cast<ConstantSDNode>(Size)) {
uint64_t Bytes = CSize->getZExtValue();
assert(Bytes > 0 && "Caller should have handled 0-size case");
SDValue CCReg = emitCLC(DAG, DL, Chain, Src1, Src2, Bytes);
// Swap operands to invert CC == 1 vs. CC == 2 cases.
SDValue CCReg = emitCLC(DAG, DL, Chain, Src2, Src1, Bytes);
Chain = CCReg.getValue(1);
return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain);
}
@ -232,7 +233,8 @@ std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(
SDValue Src2, MachinePointerInfo Op1PtrInfo,
MachinePointerInfo Op2PtrInfo) const {
SDVTList VTs = DAG.getVTList(Src1.getValueType(), MVT::i32, MVT::Other);
SDValue Unused = DAG.getNode(SystemZISD::STRCMP, DL, VTs, Chain, Src1, Src2,
// Swap operands to invert CC == 1 vs. CC == 2 cases.
SDValue Unused = DAG.getNode(SystemZISD::STRCMP, DL, VTs, Chain, Src2, Src1,
DAG.getConstant(0, DL, MVT::i32));
SDValue CCReg = Unused.getValue(1);
Chain = Unused.getValue(2);

11
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
View File

@ -113,8 +113,15 @@ void WebAssemblyTargetAsmStreamer::emitEventType(const MCSymbolWasm *Sym) {
}
void WebAssemblyTargetAsmStreamer::emitImportModule(const MCSymbolWasm *Sym,
StringRef ModuleName) {
OS << "\t.import_module\t" << Sym->getName() << ", " << ModuleName << '\n';
StringRef ImportModule) {
OS << "\t.import_module\t" << Sym->getName() << ", "
<< ImportModule << '\n';
}
void WebAssemblyTargetAsmStreamer::emitImportName(const MCSymbolWasm *Sym,
StringRef ImportName) {
OS << "\t.import_name\t" << Sym->getName() << ", "
<< ImportName << '\n';
}
void WebAssemblyTargetAsmStreamer::emitIndIdx(const MCExpr *Value) {

13
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
View File

@ -45,7 +45,10 @@ public:
virtual void emitEventType(const MCSymbolWasm *Sym) = 0;
/// .import_module
virtual void emitImportModule(const MCSymbolWasm *Sym,
StringRef ModuleName) = 0;
StringRef ImportModule) = 0;
/// .import_name
virtual void emitImportName(const MCSymbolWasm *Sym,
StringRef ImportName) = 0;
protected:
void emitValueType(wasm::ValType Type);
@ -67,7 +70,8 @@ public:
void emitIndIdx(const MCExpr *Value) override;
void emitGlobalType(const MCSymbolWasm *Sym) override;
void emitEventType(const MCSymbolWasm *Sym) override;
void emitImportModule(const MCSymbolWasm *Sym, StringRef ModuleName) override;
void emitImportModule(const MCSymbolWasm *Sym, StringRef ImportModule) override;
void emitImportName(const MCSymbolWasm *Sym, StringRef ImportName) override;
};
/// This part is for Wasm object output
@ -82,7 +86,9 @@ public:
void emitGlobalType(const MCSymbolWasm *Sym) override {}
void emitEventType(const MCSymbolWasm *Sym) override {}
void emitImportModule(const MCSymbolWasm *Sym,
StringRef ModuleName) override {}
StringRef ImportModule) override {}
void emitImportName(const MCSymbolWasm *Sym,
StringRef ImportName) override {}
};
/// This part is for null output
@ -98,6 +104,7 @@ public:
void emitGlobalType(const MCSymbolWasm *) override {}
void emitEventType(const MCSymbolWasm *) override {}
void emitImportModule(const MCSymbolWasm *, StringRef) override {}
void emitImportName(const MCSymbolWasm *, StringRef) override {}
};
} // end namespace llvm

9
lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
View File

@ -111,9 +111,16 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) {
F.hasFnAttribute("wasm-import-module")) {
StringRef Name =
F.getFnAttribute("wasm-import-module").getValueAsString();
Sym->setModuleName(Name);
Sym->setImportModule(Name);
getTargetStreamer()->emitImportModule(Sym, Name);
}
if (TM.getTargetTriple().isOSBinFormatWasm() &&
F.hasFnAttribute("wasm-import-name")) {
StringRef Name =
F.getFnAttribute("wasm-import-name").getValueAsString();
Sym->setImportName(Name);
getTargetStreamer()->emitImportName(Sym, Name);
}
}
}

36
lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
View File

@ -36,11 +36,6 @@ using namespace llvm;
#define DEBUG_TYPE "wasm-fix-function-bitcasts"
static cl::opt<bool>
TemporaryWorkarounds("wasm-temporary-workarounds",
cl::desc("Apply certain temporary workarounds"),
cl::init(true), cl::Hidden);
namespace {
class FixFunctionBitcasts final : public ModulePass {
StringRef getPassName() const override {
@ -227,6 +222,17 @@ static Function *CreateWrapper(Function *F, FunctionType *Ty) {
return Wrapper;
}
// Test whether a main function with type FuncTy should be rewritten to have
// type MainTy.
bool shouldFixMainFunction(FunctionType *FuncTy, FunctionType *MainTy) {
// Only fix the main function if it's the standard zero-arg form. That way,
// the standard cases will work as expected, and users will see signature
// mismatches from the linker for non-standard cases.
return FuncTy->getReturnType() == MainTy->getReturnType() &&
FuncTy->getNumParams() == 0 &&
!FuncTy->isVarArg();
}
bool FixFunctionBitcasts::runOnModule(Module &M) {
LLVM_DEBUG(dbgs() << "********** Fix Function Bitcasts **********\n");
@ -243,14 +249,14 @@ bool FixFunctionBitcasts::runOnModule(Module &M) {
// "int main(int argc, char *argv[])", create an artificial call with it
// bitcasted to that type so that we generate a wrapper for it, so that
// the C runtime can call it.
if (!TemporaryWorkarounds && !F.isDeclaration() && F.getName() == "main") {
if (F.getName() == "main") {
Main = &F;
LLVMContext &C = M.getContext();
Type *MainArgTys[] = {Type::getInt32Ty(C),
PointerType::get(Type::getInt8PtrTy(C), 0)};
FunctionType *MainTy = FunctionType::get(Type::getInt32Ty(C), MainArgTys,
/*isVarArg=*/false);
if (F.getFunctionType() != MainTy) {
if (shouldFixMainFunction(F.getFunctionType(), MainTy)) {
LLVM_DEBUG(dbgs() << "Found `main` function with incorrect type: "
<< *F.getFunctionType() << "\n");
Value *Args[] = {UndefValue::get(MainArgTys[0]),
@ -298,12 +304,18 @@ bool FixFunctionBitcasts::runOnModule(Module &M) {
Main->setName("__original_main");
Function *MainWrapper =
cast<Function>(CallMain->getCalledValue()->stripPointerCasts());
MainWrapper->setName("main");
MainWrapper->setLinkage(Main->getLinkage());
MainWrapper->setVisibility(Main->getVisibility());
Main->setLinkage(Function::PrivateLinkage);
Main->setVisibility(Function::DefaultVisibility);
delete CallMain;
if (Main->isDeclaration()) {
// The wrapper is not needed in this case as we don't need to export
// it to anyone else.
MainWrapper->eraseFromParent();
} else {
// Otherwise give the wrapper the same linkage as the original main
// function, so that it can be called from the same places.
MainWrapper->setName("main");
MainWrapper->setLinkage(Main->getLinkage());
MainWrapper->setVisibility(Main->getVisibility());
}
}
return true;

3
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -1115,8 +1115,7 @@ bool X86AsmParser::ParseRegister(unsigned &RegNo,
}
// Parse "%st" as "%st(0)" and "%st(1)", which is multiple tokens.
if (RegNo == 0 && (Tok.getString() == "st" || Tok.getString() == "ST")) {
RegNo = X86::ST0;
if (RegNo == X86::ST0) {
Parser.Lex(); // Eat 'st'
// Check to see if we have '(4)' after %st.

11
lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
View File

@ -200,3 +200,14 @@ void X86ATTInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
O << markup("<imm:") << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff)
<< markup(">");
}
void X86ATTInstPrinter::printSTiRegOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &OS) {
const MCOperand &Op = MI->getOperand(OpNo);
unsigned Reg = Op.getReg();
// Override the default printing to print st(0) instead st.
if (Reg == X86::ST0)
OS << markup("<reg:") << "%st(0)" << markup(">");
else
printRegName(OS, Reg);
}

1
lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
View File

@ -44,6 +44,7 @@ public:
void printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O);
void printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O);
void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &OS);
void printSTiRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
void printanymem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
printMemReference(MI, OpNo, O);

11
lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
View File

@ -160,3 +160,14 @@ void X86IntelInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
O << formatImm(MI->getOperand(Op).getImm() & 0xff);
}
void X86IntelInstPrinter::printSTiRegOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &OS) {
const MCOperand &Op = MI->getOperand(OpNo);
unsigned Reg = Op.getReg();
// Override the default printing to print st(0) instead st.
if (Reg == X86::ST0)
OS << "st(0)";
else
printRegName(OS, Reg);
}

1
lib/Target/X86/InstPrinter/X86IntelInstPrinter.h
View File

@ -39,6 +39,7 @@ public:
void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &O);
void printSTiRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
void printanymem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
printMemReference(MI, OpNo, O);

8
lib/Target/X86/X86ISelLowering.cpp
View File

@ -42507,6 +42507,14 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
if (StringRef("{flags}").equals_lower(Constraint))
return std::make_pair(X86::EFLAGS, &X86::CCRRegClass);
// dirflag -> DF
if (StringRef("{dirflag}").equals_lower(Constraint))
return std::make_pair(X86::DF, &X86::DFCCRRegClass);
// fpsr -> FPSW
if (StringRef("{fpsr}").equals_lower(Constraint))
return std::make_pair(X86::FPSW, &X86::FPCCRRegClass);
// 'A' means [ER]AX + [ER]DX.
if (Constraint == "A") {
if (Subtarget.is64Bit())

156
lib/Target/X86/X86InstrFPStack.td
View File

@ -230,7 +230,7 @@ def _FI32m : FPI<0xDA, fp, (outs), (ins i32mem:$src),
} // mayLoad = 1, hasSideEffects = 1
}
let Defs = [FPSW] in {
let Defs = [FPSW], Uses = [FPCW] in {
// FPBinary_rr just defines pseudo-instructions, no need to set a scheduling
// resources.
let hasNoSchedulingInfo = 1 in {
@ -258,42 +258,42 @@ defm DIVR: FPBinary<fdiv, MRM7m, "divr", 0>;
} // Defs = [FPSW]
class FPST0rInst<Format fp, string asm>
: FPI<0xD8, fp, (outs), (ins RST:$op), asm>;
: FPI<0xD8, fp, (outs), (ins RSTi:$op), asm>;
class FPrST0Inst<Format fp, string asm>
: FPI<0xDC, fp, (outs), (ins RST:$op), asm>;
: FPI<0xDC, fp, (outs), (ins RSTi:$op), asm>;
class FPrST0PInst<Format fp, string asm>
: FPI<0xDE, fp, (outs), (ins RST:$op), asm>;
: FPI<0xDE, fp, (outs), (ins RSTi:$op), asm>;
// NOTE: GAS and apparently all other AT&T style assemblers have a broken notion
// of some of the 'reverse' forms of the fsub and fdiv instructions. As such,
// we have to put some 'r's in and take them out of weird places.
let SchedRW = [WriteFAdd] in {
def ADD_FST0r : FPST0rInst <MRM0r, "fadd\t$op">;
def ADD_FrST0 : FPrST0Inst <MRM0r, "fadd\t{%st(0), $op|$op, st(0)}">;
def ADD_FPrST0 : FPrST0PInst<MRM0r, "faddp\t$op">;
def SUBR_FST0r : FPST0rInst <MRM5r, "fsubr\t$op">;
def SUB_FrST0 : FPrST0Inst <MRM5r, "fsub{r}\t{%st(0), $op|$op, st(0)}">;
def SUB_FPrST0 : FPrST0PInst<MRM5r, "fsub{r}p\t$op">;
def SUB_FST0r : FPST0rInst <MRM4r, "fsub\t$op">;
def SUBR_FrST0 : FPrST0Inst <MRM4r, "fsub{|r}\t{%st(0), $op|$op, st(0)}">;
def SUBR_FPrST0 : FPrST0PInst<MRM4r, "fsub{|r}p\t$op">;
let SchedRW = [WriteFAdd], Defs = [FPSW], Uses = [FPCW] in {
def ADD_FST0r : FPST0rInst <MRM0r, "fadd\t{$op, %st|st, $op}">;
def ADD_FrST0 : FPrST0Inst <MRM0r, "fadd\t{%st, $op|$op, st}">;
def ADD_FPrST0 : FPrST0PInst<MRM0r, "faddp\t{%st, $op|$op, st}">;
def SUBR_FST0r : FPST0rInst <MRM5r, "fsubr\t{$op, %st|st, $op}">;
def SUB_FrST0 : FPrST0Inst <MRM5r, "fsub{r}\t{%st, $op|$op, st}">;
def SUB_FPrST0 : FPrST0PInst<MRM5r, "fsub{r}p\t{%st, $op|$op, st}">;
def SUB_FST0r : FPST0rInst <MRM4r, "fsub\t{$op, %st|st, $op}">;
def SUBR_FrST0 : FPrST0Inst <MRM4r, "fsub{|r}\t{%st, $op|$op, st}">;
def SUBR_FPrST0 : FPrST0PInst<MRM4r, "fsub{|r}p\t{%st, $op|$op, st}">;
} // SchedRW
let SchedRW = [WriteFCom] in {
let SchedRW = [WriteFCom], Defs = [FPSW], Uses = [FPCW] in {
def COM_FST0r : FPST0rInst <MRM2r, "fcom\t$op">;
def COMP_FST0r : FPST0rInst <MRM3r, "fcomp\t$op">;
} // SchedRW
let SchedRW = [WriteFMul] in {
def MUL_FST0r : FPST0rInst <MRM1r, "fmul\t$op">;
def MUL_FrST0 : FPrST0Inst <MRM1r, "fmul\t{%st(0), $op|$op, st(0)}">;
def MUL_FPrST0 : FPrST0PInst<MRM1r, "fmulp\t$op">;
let SchedRW = [WriteFMul], Defs = [FPSW], Uses = [FPCW] in {
def MUL_FST0r : FPST0rInst <MRM1r, "fmul\t{$op, %st|st, $op}">;
def MUL_FrST0 : FPrST0Inst <MRM1r, "fmul\t{%st, $op|$op, st}">;
def MUL_FPrST0 : FPrST0PInst<MRM1r, "fmulp\t{%st, $op|$op, st}">;
} // SchedRW
let SchedRW = [WriteFDiv] in {
def DIVR_FST0r : FPST0rInst <MRM7r, "fdivr\t$op">;
def DIV_FrST0 : FPrST0Inst <MRM7r, "fdiv{r}\t{%st(0), $op|$op, st(0)}">;
def DIV_FPrST0 : FPrST0PInst<MRM7r, "fdiv{r}p\t$op">;
def DIV_FST0r : FPST0rInst <MRM6r, "fdiv\t$op">;
def DIVR_FrST0 : FPrST0Inst <MRM6r, "fdiv{|r}\t{%st(0), $op|$op, st(0)}">;
def DIVR_FPrST0 : FPrST0PInst<MRM6r, "fdiv{|r}p\t$op">;
let SchedRW = [WriteFDiv], Defs = [FPSW], Uses = [FPCW] in {
def DIVR_FST0r : FPST0rInst <MRM7r, "fdivr\t{$op, %st|st, $op}">;
def DIV_FrST0 : FPrST0Inst <MRM7r, "fdiv{r}\t{%st, $op|$op, st}">;
def DIV_FPrST0 : FPrST0PInst<MRM7r, "fdiv{r}p\t{%st, $op|$op, st}">;
def DIV_FST0r : FPST0rInst <MRM6r, "fdiv\t{$op, %st|st, $op}">;
def DIVR_FrST0 : FPrST0Inst <MRM6r, "fdiv{|r}\t{%st, $op|$op, st}">;
def DIVR_FPrST0 : FPrST0PInst<MRM6r, "fdiv{|r}p\t{%st, $op|$op, st}">;
} // SchedRW
// Unary operations.
@ -307,7 +307,7 @@ def _Fp80 : FpI_<(outs RFP80:$dst), (ins RFP80:$src), OneArgFPRW,
def _F : FPI<0xD9, fp, (outs), (ins), asmstring>;
}
let Defs = [FPSW] in {
let Defs = [FPSW], Uses = [FPCW] in {
let SchedRW = [WriteFSign] in {
defm CHS : FPUnary<fneg, MRM_E0, "fchs">;
@ -335,7 +335,7 @@ def TST_F : FPI<0xD9, MRM_E4, (outs), (ins), "ftst">;
// Versions of FP instructions that take a single memory operand. Added for the
// disassembler; remove as they are included with patterns elsewhere.
let SchedRW = [WriteFComLd] in {
let SchedRW = [WriteFComLd], Defs = [FPSW], Uses = [FPCW] in {
def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">;
def FCOMP32m : FPI<0xD8, MRM3m, (outs), (ins f32mem:$src), "fcomp{s}\t$src">;
@ -398,22 +398,22 @@ defm CMOVNP : FPCMov<X86_COND_NP>;
let Predicates = [HasCMov] in {
// These are not factored because there's no clean way to pass DA/DB.
def CMOVB_F : FPI<0xDA, MRM0r, (outs), (ins RST:$op),
"fcmovb\t{$op, %st(0)|st(0), $op}">;
def CMOVBE_F : FPI<0xDA, MRM2r, (outs), (ins RST:$op),
"fcmovbe\t{$op, %st(0)|st(0), $op}">;
def CMOVE_F : FPI<0xDA, MRM1r, (outs), (ins RST:$op),
"fcmove\t{$op, %st(0)|st(0), $op}">;
def CMOVP_F : FPI<0xDA, MRM3r, (outs), (ins RST:$op),
"fcmovu\t{$op, %st(0)|st(0), $op}">;
def CMOVNB_F : FPI<0xDB, MRM0r, (outs), (ins RST:$op),
"fcmovnb\t{$op, %st(0)|st(0), $op}">;
def CMOVNBE_F: FPI<0xDB, MRM2r, (outs), (ins RST:$op),
"fcmovnbe\t{$op, %st(0)|st(0), $op}">;
def CMOVNE_F : FPI<0xDB, MRM1r, (outs), (ins RST:$op),
"fcmovne\t{$op, %st(0)|st(0), $op}">;
def CMOVNP_F : FPI<0xDB, MRM3r, (outs), (ins RST:$op),
"fcmovnu\t{$op, %st(0)|st(0), $op}">;
def CMOVB_F : FPI<0xDA, MRM0r, (outs), (ins RSTi:$op),
"fcmovb\t{$op, %st|st, $op}">;
def CMOVBE_F : FPI<0xDA, MRM2r, (outs), (ins RSTi:$op),
"fcmovbe\t{$op, %st|st, $op}">;
def CMOVE_F : FPI<0xDA, MRM1r, (outs), (ins RSTi:$op),
"fcmove\t{$op, %st|st, $op}">;
def CMOVP_F : FPI<0xDA, MRM3r, (outs), (ins RSTi:$op),
"fcmovu\t{$op, %st|st, $op}">;
def CMOVNB_F : FPI<0xDB, MRM0r, (outs), (ins RSTi:$op),
"fcmovnb\t{$op, %st|st, $op}">;
def CMOVNBE_F: FPI<0xDB, MRM2r, (outs), (ins RSTi:$op),
"fcmovnbe\t{$op, %st|st, $op}">;
def CMOVNE_F : FPI<0xDB, MRM1r, (outs), (ins RSTi:$op),
"fcmovne\t{$op, %st|st, $op}">;
def CMOVNP_F : FPI<0xDB, MRM3r, (outs), (ins RSTi:$op),
"fcmovnu\t{$op, %st|st, $op}">;
} // Predicates = [HasCMov]
} // SchedRW
@ -454,7 +454,7 @@ def ILD_Fp64m80: FpI_<(outs RFP80:$dst), (ins i64mem:$src), ZeroArgFP,
[(set RFP80:$dst, (X86fild addr:$src, i64))]>;
} // SchedRW
let SchedRW = [WriteStore] in {
let SchedRW = [WriteStore], Uses = [FPCW] in {
def ST_Fp32m : FpIf32<(outs), (ins f32mem:$op, RFP32:$src), OneArgFP,
[(store RFP32:$src, addr:$op)]>;
def ST_Fp64m32 : FpIf64<(outs), (ins f32mem:$op, RFP64:$src), OneArgFP,
@ -489,7 +489,7 @@ def IST_Fp16m80 : FpI_<(outs), (ins i16mem:$op, RFP80:$src), OneArgFP, []>;
def IST_Fp32m80 : FpI_<(outs), (ins i32mem:$op, RFP80:$src), OneArgFP, []>;
def IST_Fp64m80 : FpI_<(outs), (ins i64mem:$op, RFP80:$src), OneArgFP, []>;
} // mayStore
} // SchedRW
} // SchedRW, Uses = [FPCW]
let mayLoad = 1, SchedRW = [WriteLoad] in {
def LD_F32m : FPI<0xD9, MRM0m, (outs), (ins f32mem:$src), "fld{s}\t$src">;
@ -499,7 +499,7 @@ def ILD_F16m : FPI<0xDF, MRM0m, (outs), (ins i16mem:$src), "fild{s}\t$src">;
def ILD_F32m : FPI<0xDB, MRM0m, (outs), (ins i32mem:$src), "fild{l}\t$src">;
def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll}\t$src">;
}
let mayStore = 1, SchedRW = [WriteStore] in {
let mayStore = 1, SchedRW = [WriteStore], Uses = [FPCW] in {
def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst">;
def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst">;
def ST_FP32m : FPI<0xD9, MRM3m, (outs), (ins f32mem:$dst), "fstp{s}\t$dst">;
@ -513,7 +513,7 @@ def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst">;
}
// FISTTP requires SSE3 even though it's a FPStack op.
let Predicates = [HasSSE3], SchedRW = [WriteStore] in {
let Predicates = [HasSSE3], SchedRW = [WriteStore], Uses = [FPCW] in {
def ISTT_Fp16m32 : FpI_<(outs), (ins i16mem:$op, RFP32:$src), OneArgFP,
[(X86fp_to_i16mem RFP32:$src, addr:$op)]>;
def ISTT_Fp32m32 : FpI_<(outs), (ins i32mem:$op, RFP32:$src), OneArgFP,
@ -534,7 +534,7 @@ def ISTT_Fp64m80 : FpI_<(outs), (ins i64mem:$op, RFP80:$src), OneArgFP,
[(X86fp_to_i64mem RFP80:$src, addr:$op)]>;
} // Predicates = [HasSSE3]
let mayStore = 1, SchedRW = [WriteStore] in {
let mayStore = 1, SchedRW = [WriteStore], Uses = [FPCW] in {
def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst">;
def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l}\t$dst">;
def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst), "fisttp{ll}\t$dst">;
@ -542,10 +542,10 @@ def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst), "fisttp{ll}\t$dst">
// FP Stack manipulation instructions.
let SchedRW = [WriteMove] in {
def LD_Frr : FPI<0xD9, MRM0r, (outs), (ins RST:$op), "fld\t$op">;
def ST_Frr : FPI<0xDD, MRM2r, (outs), (ins RST:$op), "fst\t$op">;
def ST_FPrr : FPI<0xDD, MRM3r, (outs), (ins RST:$op), "fstp\t$op">;
def XCH_F : FPI<0xD9, MRM1r, (outs), (ins RST:$op), "fxch\t$op">;
def LD_Frr : FPI<0xD9, MRM0r, (outs), (ins RSTi:$op), "fld\t$op">;
def ST_Frr : FPI<0xDD, MRM2r, (outs), (ins RSTi:$op), "fst\t$op">;
def ST_FPrr : FPI<0xDD, MRM3r, (outs), (ins RSTi:$op), "fstp\t$op">;
def XCH_F : FPI<0xD9, MRM1r, (outs), (ins RSTi:$op), "fxch\t$op">;
}
// Floating point constant loads.
@ -570,7 +570,7 @@ def LD_F0 : FPI<0xD9, MRM_EE, (outs), (ins), "fldz">;
let SchedRW = [WriteFLD1] in
def LD_F1 : FPI<0xD9, MRM_E8, (outs), (ins), "fld1">;
let SchedRW = [WriteFLDC], Defs = [FPSW] in {
let SchedRW = [WriteFLDC] in {
def FLDL2T : I<0xD9, MRM_E9, (outs), (ins), "fldl2t", []>;
def FLDL2E : I<0xD9, MRM_EA, (outs), (ins), "fldl2e", []>;
def FLDPI : I<0xD9, MRM_EB, (outs), (ins), "fldpi", []>;
@ -579,7 +579,7 @@ def FLDLN2 : I<0xD9, MRM_ED, (outs), (ins), "fldln2", []>;
} // SchedRW
// Floating point compares.
let SchedRW = [WriteFCom] in {
let SchedRW = [WriteFCom], Uses = [FPCW] in {
def UCOM_Fpr32 : FpIf32<(outs), (ins RFP32:$lhs, RFP32:$rhs), CompareFP,
[(set FPSW, (trunc (X86cmp RFP32:$lhs, RFP32:$rhs)))]>;
def UCOM_Fpr64 : FpIf64<(outs), (ins RFP64:$lhs, RFP64:$rhs), CompareFP,
@ -591,37 +591,37 @@ def UCOM_Fpr80 : FpI_ <(outs), (ins RFP80:$lhs, RFP80:$rhs), CompareFP,
let SchedRW = [WriteFCom] in {
// CC = ST(0) cmp ST(i)
let Defs = [EFLAGS, FPSW] in {
let Predicates = [FPStackf32, HasCMov] in
def UCOM_FpIr32: FpIf32<(outs), (ins RFP32:$lhs, RFP32:$rhs), CompareFP,
[(set EFLAGS, (X86cmp RFP32:$lhs, RFP32:$rhs))]>;
let Predicates = [FPStackf64, HasCMov] in
def UCOM_FpIr64: FpIf64<(outs), (ins RFP64:$lhs, RFP64:$rhs), CompareFP,
[(set EFLAGS, (X86cmp RFP64:$lhs, RFP64:$rhs))]>;
let Predicates = [HasCMov] in
let Defs = [EFLAGS, FPSW], Uses = [FPCW] in {
def UCOM_FpIr32: FpI_<(outs), (ins RFP32:$lhs, RFP32:$rhs), CompareFP,
[(set EFLAGS, (X86cmp RFP32:$lhs, RFP32:$rhs))]>,
Requires<[FPStackf32, HasCMov]>;
def UCOM_FpIr64: FpI_<(outs), (ins RFP64:$lhs, RFP64:$rhs), CompareFP,
[(set EFLAGS, (X86cmp RFP64:$lhs, RFP64:$rhs))]>,
Requires<[FPStackf64, HasCMov]>;
def UCOM_FpIr80: FpI_<(outs), (ins RFP80:$lhs, RFP80:$rhs), CompareFP,
[(set EFLAGS, (X86cmp RFP80:$lhs, RFP80:$rhs))]>;
[(set EFLAGS, (X86cmp RFP80:$lhs, RFP80:$rhs))]>,
Requires<[HasCMov]>;
}
let Defs = [FPSW], Uses = [ST0] in {
let Defs = [FPSW], Uses = [ST0, FPCW] in {
def UCOM_Fr : FPI<0xDD, MRM4r, // FPSW = cmp ST(0) with ST(i)
(outs), (ins RST:$reg), "fucom\t$reg">;
(outs), (ins RSTi:$reg), "fucom\t$reg">;
def UCOM_FPr : FPI<0xDD, MRM5r, // FPSW = cmp ST(0) with ST(i), pop
(outs), (ins RST:$reg), "fucomp\t$reg">;
(outs), (ins RSTi:$reg), "fucomp\t$reg">;
def UCOM_FPPr : FPI<0xDA, MRM_E9, // cmp ST(0) with ST(1), pop, pop
(outs), (ins), "fucompp">;
}
let Defs = [EFLAGS, FPSW], Uses = [ST0] in {
let Defs = [EFLAGS, FPSW], Uses = [ST0, FPCW] in {
def UCOM_FIr : FPI<0xDB, MRM5r, // CC = cmp ST(0) with ST(i)
(outs), (ins RST:$reg), "fucomi\t$reg">;
(outs), (ins RSTi:$reg), "fucomi\t{$reg, %st|st, $reg}">;
def UCOM_FIPr : FPI<0xDF, MRM5r, // CC = cmp ST(0) with ST(i), pop
(outs), (ins RST:$reg), "fucompi\t$reg">;
}
(outs), (ins RSTi:$reg), "fucompi\t{$reg, %st|st, $reg}">;
let Defs = [EFLAGS, FPSW] in {
def COM_FIr : FPI<0xDB, MRM6r, (outs), (ins RST:$reg), "fcomi\t$reg">;
def COM_FIPr : FPI<0xDF, MRM6r, (outs), (ins RST:$reg), "fcompi\t$reg">;
def COM_FIr : FPI<0xDB, MRM6r, (outs), (ins RSTi:$reg),
"fcomi\t{$reg, %st|st, $reg}">;
def COM_FIPr : FPI<0xDF, MRM6r, (outs), (ins RSTi:$reg),
"fcompi\t{$reg, %st|st, $reg}">;
}
} // SchedRW
@ -631,12 +631,12 @@ let Defs = [AX], Uses = [FPSW] in
def FNSTSW16r : I<0xDF, MRM_E0, // AX = fp flags
(outs), (ins), "fnstsw\t{%ax|ax}",
[(set AX, (X86fp_stsw FPSW))]>;
let Defs = [FPSW] in
let Defs = [FPSW], Uses = [FPCW] in
def FNSTCW16m : I<0xD9, MRM7m, // [mem16] = X87 control world
(outs), (ins i16mem:$dst), "fnstcw\t$dst",
[(X86fp_cwd_get16 addr:$dst)]>;
} // SchedRW
let Defs = [FPSW], mayLoad = 1 in
let Defs = [FPSW,FPCW], mayLoad = 1 in
def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
(outs), (ins i16mem:$dst), "fldcw\t$dst", []>,
Sched<[WriteLoad]>;
@ -645,8 +645,8 @@ def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
let SchedRW = [WriteMicrocoded] in {
let Defs = [FPSW] in {
def FNINIT : I<0xDB, MRM_E3, (outs), (ins), "fninit", []>;
def FFREE : FPI<0xDD, MRM0r, (outs), (ins RST:$reg), "ffree\t$reg">;
def FFREEP : FPI<0xDF, MRM0r, (outs), (ins RST:$reg), "ffreep\t$reg">;
def FFREE : FPI<0xDD, MRM0r, (outs), (ins RSTi:$reg), "ffree\t$reg">;
def FFREEP : FPI<0xDF, MRM0r, (outs), (ins RSTi:$reg), "ffreep\t$reg">;
// Clear exceptions
def FNCLEX : I<0xDB, MRM_E2, (outs), (ins), "fnclex", []>;

46
lib/Target/X86/X86InstrInfo.td
View File

@ -3231,39 +3231,39 @@ def : InstAlias<"fucompi", (UCOM_FIPr ST1), 0>;
// instructions like "fadd %st(0), %st(0)" as "fadd %st(0)" for consistency with
// gas.
multiclass FpUnaryAlias<string Mnemonic, Instruction Inst, bit EmitAlias = 1> {
def : InstAlias<!strconcat(Mnemonic, "\t{$op, %st(0)|st(0), $op}"),
(Inst RST:$op), EmitAlias>;
def : InstAlias<!strconcat(Mnemonic, "\t{%st(0), %st(0)|st(0), st(0)}"),
def : InstAlias<!strconcat(Mnemonic, "\t$op"),
(Inst RSTi:$op), EmitAlias>;
def : InstAlias<!strconcat(Mnemonic, "\t{%st, %st|st, st}"),
(Inst ST0), EmitAlias>;
}
defm : FpUnaryAlias<"fadd", ADD_FST0r>;
defm : FpUnaryAlias<"fadd", ADD_FST0r, 0>;
defm : FpUnaryAlias<"faddp", ADD_FPrST0, 0>;
defm : FpUnaryAlias<"fsub", SUB_FST0r>;
defm : FpUnaryAlias<"fsub{|r}p", SUBR_FPrST0>;
defm : FpUnaryAlias<"fsubr", SUBR_FST0r>;
defm : FpUnaryAlias<"fsub{r|}p", SUB_FPrST0>;
defm : FpUnaryAlias<"fmul", MUL_FST0r>;
defm : FpUnaryAlias<"fmulp", MUL_FPrST0>;
defm : FpUnaryAlias<"fdiv", DIV_FST0r>;
defm : FpUnaryAlias<"fdiv{|r}p", DIVR_FPrST0>;
defm : FpUnaryAlias<"fdivr", DIVR_FST0r>;
defm : FpUnaryAlias<"fdiv{r|}p", DIV_FPrST0>;
defm : FpUnaryAlias<"fsub", SUB_FST0r, 0>;
defm : FpUnaryAlias<"fsub{|r}p", SUBR_FPrST0, 0>;
defm : FpUnaryAlias<"fsubr", SUBR_FST0r, 0>;
defm : FpUnaryAlias<"fsub{r|}p", SUB_FPrST0, 0>;
defm : FpUnaryAlias<"fmul", MUL_FST0r, 0>;
defm : FpUnaryAlias<"fmulp", MUL_FPrST0, 0>;
defm : FpUnaryAlias<"fdiv", DIV_FST0r, 0>;
defm : FpUnaryAlias<"fdiv{|r}p", DIVR_FPrST0, 0>;
defm : FpUnaryAlias<"fdivr", DIVR_FST0r, 0>;
defm : FpUnaryAlias<"fdiv{r|}p", DIV_FPrST0, 0>;
defm : FpUnaryAlias<"fcomi", COM_FIr, 0>;
defm : FpUnaryAlias<"fucomi", UCOM_FIr, 0>;
defm : FpUnaryAlias<"fcompi", COM_FIPr>;
defm : FpUnaryAlias<"fucompi", UCOM_FIPr>;
defm : FpUnaryAlias<"fcompi", COM_FIPr, 0>;
defm : FpUnaryAlias<"fucompi", UCOM_FIPr, 0>;
// Handle "f{mulp,addp} st(0), $op" the same as "f{mulp,addp} $op", since they
// Handle "f{mulp,addp} $op, %st(0)" the same as "f{mulp,addp} $op", since they
// commute. We also allow fdiv[r]p/fsubrp even though they don't commute,
// solely because gas supports it.
def : InstAlias<"faddp\t{%st(0), $op|$op, st(0)}", (ADD_FPrST0 RST:$op), 0>;
def : InstAlias<"fmulp\t{%st(0), $op|$op, st(0)}", (MUL_FPrST0 RST:$op)>;
def : InstAlias<"fsub{|r}p\t{%st(0), $op|$op, st(0)}", (SUBR_FPrST0 RST:$op)>;
def : InstAlias<"fsub{r|}p\t{%st(0), $op|$op, st(0)}", (SUB_FPrST0 RST:$op)>;
def : InstAlias<"fdiv{|r}p\t{%st(0), $op|$op, st(0)}", (DIVR_FPrST0 RST:$op)>;
def : InstAlias<"fdiv{r|}p\t{%st(0), $op|$op, st(0)}", (DIV_FPrST0 RST:$op)>;
def : InstAlias<"faddp\t{$op, %st|st, $op}", (ADD_FPrST0 RSTi:$op), 0>;
def : InstAlias<"fmulp\t{$op, %st|st, $op}", (MUL_FPrST0 RSTi:$op), 0>;
def : InstAlias<"fsub{|r}p\t{$op, %st|st, $op}", (SUBR_FPrST0 RSTi:$op), 0>;
def : InstAlias<"fsub{r|}p\t{$op, %st|st, $op}", (SUB_FPrST0 RSTi:$op), 0>;
def : InstAlias<"fdiv{|r}p\t{$op, %st|st, $op}", (DIVR_FPrST0 RSTi:$op), 0>;
def : InstAlias<"fdiv{r|}p\t{$op, %st|st, $op}", (DIV_FPrST0 RSTi:$op), 0>;
def : InstAlias<"fnstsw" , (FNSTSW16r), 0>;

3
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -497,6 +497,9 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
BitVector Reserved(getNumRegs());
const X86FrameLowering *TFI = getFrameLowering(MF);
// Set the floating point control register as reserved.
Reserved.set(X86::FPCW);
// Set the stack-pointer register and its aliases as reserved.
for (MCSubRegIterator I(X86::RSP, this, /*IncludeSelf=*/true); I.isValid();
++I)

10
lib/Target/X86/X86RegisterInfo.td
View File

@ -278,7 +278,7 @@ def K7 : X86Reg<"k7", 7>, DwarfRegNum<[125, 100, 100]>;
// pseudo registers, but we still mark them as aliasing FP registers. That
// way both kinds can be live without exceeding the stack depth. ST registers
// are only live around inline assembly.
def ST0 : X86Reg<"st(0)", 0>, DwarfRegNum<[33, 12, 11]>;
def ST0 : X86Reg<"st", 0>, DwarfRegNum<[33, 12, 11]>;
def ST1 : X86Reg<"st(1)", 1>, DwarfRegNum<[34, 13, 12]>;
def ST2 : X86Reg<"st(2)", 2>, DwarfRegNum<[35, 14, 13]>;
def ST3 : X86Reg<"st(3)", 3>, DwarfRegNum<[36, 15, 14]>;
@ -288,7 +288,10 @@ def ST6 : X86Reg<"st(6)", 6>, DwarfRegNum<[39, 18, 17]>;
def ST7 : X86Reg<"st(7)", 7>, DwarfRegNum<[40, 19, 18]>;
// Floating-point status word
def FPSW : X86Reg<"fpsw", 0>;
def FPSW : X86Reg<"fpsr", 0>;
// Floating-point control word
def FPCW : X86Reg<"fpcr", 0>;
// Status flags register.
//
@ -539,6 +542,9 @@ def RST : RegisterClass<"X86", [f80, f64, f32], 32, (sequence "ST%u", 0, 7)> {
let isAllocatable = 0;
}
// Helper to allow %st to print as %st(0) when its encoded in the instruction.
def RSTi : RegisterOperand<RST, "printSTiRegOperand">;
// Generic vector registers: VR64 and VR128.
// Ensure that float types are declared first - only float is legal on SSE1.
def VR64: RegisterClass<"X86", [x86mmx], 64, (sequence "MM%u", 0, 7)>;

24
lib/Transforms/Instrumentation/MemorySanitizer.cpp
View File

@ -321,6 +321,7 @@ static cl::opt<unsigned long long> ClOriginBase("msan-origin-base",
cl::desc("Define custom MSan OriginBase"),
cl::Hidden, cl::init(0));
static const char *const kMsanModuleCtorName = "msan.module_ctor";
static const char *const kMsanInitName = "__msan_init";
namespace {
@ -586,6 +587,8 @@ private:
/// An empty volatile inline asm that prevents callback merge.
InlineAsm *EmptyAsm;
Function *MsanCtorFunction;
};
/// A legacy function pass for msan instrumentation.
@ -839,6 +842,8 @@ Value *MemorySanitizer::getKmsanShadowOriginAccessFn(bool isStore, int size) {
}
/// Module-level initialization.
///
/// inserts a call to __msan_init to the module's constructor list.
void MemorySanitizer::initializeModule(Module &M) {
auto &DL = M.getDataLayout();
@ -913,7 +918,22 @@ void MemorySanitizer::initializeModule(Module &M) {
OriginStoreWeights = MDBuilder(*C).createBranchWeights(1, 1000);
if (!CompileKernel) {
getOrCreateInitFunction(M, kMsanInitName);
std::tie(MsanCtorFunction, std::ignore) =
getOrCreateSanitizerCtorAndInitFunctions(
M, kMsanModuleCtorName, kMsanInitName,
/*InitArgTypes=*/{},
/*InitArgs=*/{},
// This callback is invoked when the functions are created the first
// time. Hook them into the global ctors list in that case:
[&](Function *Ctor, Function *) {
if (!ClWithComdat) {
appendToGlobalCtors(M, Ctor, 0);
return;
}
Comdat *MsanCtorComdat = M.getOrInsertComdat(kMsanModuleCtorName);
Ctor->setComdat(MsanCtorComdat);
appendToGlobalCtors(M, Ctor, 0, Ctor);
});
if (TrackOrigins)
M.getOrInsertGlobal("__msan_track_origins", IRB.getInt32Ty(), [&] {
@ -4458,6 +4478,8 @@ static VarArgHelper *CreateVarArgHelper(Function &Func, MemorySanitizer &Msan,
}
bool MemorySanitizer::sanitizeFunction(Function &F, TargetLibraryInfo &TLI) {
if (!CompileKernel && (&F == MsanCtorFunction))
return false;
MemorySanitizerVisitor Visitor(F, *this, TLI);
// Clear out readonly/readnone attributes.

17
test/CodeGen/AArch64/cmpxchg-lse-even-regs.ll Normal file
View File

@ -0,0 +1,17 @@
; RUN: llc -mtriple arm64-apple-ios -mattr=+lse %s -o - | FileCheck %s
; Only "even,even+1" pairs are valid for CASP instructions. Make sure LLVM
; doesn't allocate odd ones and that it can copy them around properly. N.b. we
; don't actually check that they're sequential because FileCheck can't; odd/even
; will have to be good enough.
define void @test_atomic_cmpxchg_i128_register_shuffling(i128* %addr, i128 %desired, i128 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i128_register_shuffling:
; CHECK-DAG: mov [[DESIRED_LO:x[0-9]*[02468]]], x1
; CHECK-DAG: mov [[DESIRED_HI:x[0-9]*[13579]]], x2
; CHECK-DAG: mov [[NEW_LO:x[0-9]*[02468]]], x3
; CHECK-DAG: mov [[NEW_HI:x[0-9]*[13579]]], x4
; CHECK: caspal [[DESIRED_LO]], [[DESIRED_HI]], [[NEW_LO]], [[NEW_HI]], [x0]
%res = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
ret void
}

23
test/CodeGen/AArch64/seqpaircopy.mir Normal file
View File

@ -0,0 +1,23 @@
# RUN: llc -o - %s -mtriple=aarch64-- -mattr=+v8.1a -run-pass=postrapseudos | FileCheck %s
---
# CHECK-LABEL: name: copy_xseqpairs
name: copy_xseqpairs
body: |
bb.0:
; CHECK: $x4_x5 = CASPALX $x4_x5, $x2_x3, $x0
; CHECK: $x0 = ORRXrs $xzr, $x4, 0
; CHECK: $x1 = ORRXrs $xzr, $x5, 0
$x4_x5 = CASPALX $x4_x5, $x2_x3, $x0
$x0_x1 = COPY $x4_x5
...
---
# CHECK-LABEL: name: copy_wseqpairs
name: copy_wseqpairs
body: |
bb.0:
; CHECK: $w4_w5 = CASPALW $w4_w5, $w2_w3, $x0
; CHECK: $w0 = ORRWrs $wzr, $w4, 0
; CHECK: $w1 = ORRWrs $wzr, $w5, 0
$w4_w5 = CASPALW $w4_w5, $w2_w3, $x0
$w0_w1 = COPY $w4_w5
...

4
test/CodeGen/MIR/X86/memory-operands.mir
View File

@ -359,8 +359,8 @@ body: |
CFI_INSTRUCTION def_cfa_offset 32
LD_F80m $rsp, 1, $noreg, 32, $noreg, implicit-def dead $fpsw
; CHECK: name: stack_psv
; CHECK: ST_FP80m $rsp, 1, $noreg, 0, $noreg, implicit-def dead $fpsw :: (store 10 into stack, align 16)
ST_FP80m $rsp, 1, _, 0, _, implicit-def dead $fpsw :: (store 10 into stack, align 16)
; CHECK: ST_FP80m $rsp, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (store 10 into stack, align 16)
ST_FP80m $rsp, 1, _, 0, _, implicit-def dead $fpsw, implicit $fpcw :: (store 10 into stack, align 16)
CALL64pcrel32 &cosl, csr_64, implicit $rsp, implicit-def $rsp, implicit-def $fp0
$rsp = ADD64ri8 $rsp, 24, implicit-def dead $eflags
RETQ

8
test/CodeGen/Mips/micromips-b-range.ll
View File

@ -13,7 +13,7 @@
; CHECK-NEXT: 1e: fb fd 00 00 sw $ra, 0($sp)
; CHECK-NEXT: 22: 41 a1 00 01 lui $1, 1
; CHECK-NEXT: 26: 40 60 00 02 bal 8 <foo+0x2e>
; CHECK-NEXT: 2a: 30 21 04 68 addiu $1, $1, 1128
; CHECK-NEXT: 2a: 30 21 04 69 addiu $1, $1, 1129
; CHECK-NEXT: 2e: 00 3f 09 50 addu $1, $ra, $1
; CHECK-NEXT: 32: ff fd 00 00 lw $ra, 0($sp)
; CHECK-NEXT: 36: 00 01 0f 3c jr $1
@ -27,7 +27,7 @@
; CHECK-NEXT: 56: fb fd 00 00 sw $ra, 0($sp)
; CHECK-NEXT: 5a: 41 a1 00 01 lui $1, 1
; CHECK-NEXT: 5e: 40 60 00 02 bal 8 <foo+0x66>
; CHECK-NEXT: 62: 30 21 04 5c addiu $1, $1, 1116
; CHECK-NEXT: 62: 30 21 04 5d addiu $1, $1, 1117
; CHECK-NEXT: 66: 00 3f 09 50 addu $1, $ra, $1
; CHECK-NEXT: 6a: ff fd 00 00 lw $ra, 0($sp)
; CHECK-NEXT: 6e: 00 01 0f 3c jr $1
@ -39,7 +39,7 @@
; CHECK-NEXT: 86: fb fd 00 00 sw $ra, 0($sp)
; CHECK-NEXT: 8a: 41 a1 00 01 lui $1, 1
; CHECK-NEXT: 8e: 40 60 00 02 bal 8 <foo+0x96>
; CHECK-NEXT: 92: 30 21 04 2c addiu $1, $1, 1068
; CHECK-NEXT: 92: 30 21 04 2d addiu $1, $1, 1069
; CHECK-NEXT: 96: 00 3f 09 50 addu $1, $ra, $1
; CHECK-NEXT: 9a: ff fd 00 00 lw $ra, 0($sp)
; CHECK-NEXT: 9e: 00 01 0f 3c jr $1
@ -51,7 +51,7 @@
; CHECK-NEXT: 10476: fb fd 00 00 sw $ra, 0($sp)
; CHECK-NEXT: 1047a: 41 a1 00 01 lui $1, 1
; CHECK-NEXT: 1047e: 40 60 00 02 bal 8 <foo+0x10486>
; CHECK-NEXT: 10482: 30 21 04 00 addiu $1, $1, 1024
; CHECK-NEXT: 10482: 30 21 04 01 addiu $1, $1, 1025
; CHECK-NEXT: 10486: 00 3f 09 50 addu $1, $ra, $1
; CHECK-NEXT: 1048a: ff fd 00 00 lw $ra, 0($sp)
; CHECK-NEXT: 1048e: 00 01 0f 3c jr $1

58
test/CodeGen/SystemZ/memcmp-01.ll
View File

@ -16,10 +16,10 @@ define i32 @f1(i8 *%src1, i8 *%src2) {
; Check a case where the result is used as an integer.
define i32 @f2(i8 *%src1, i8 *%src2) {
; CHECK-LABEL: f2:
; CHECK: clc 0(2,%r2), 0(%r3)
; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: srl [[REG]], 28
; CHECK: rll %r2, [[REG]], 31
; CHECK: clc 0(2,%r3), 0(%r2)
; CHECK: ipm %r2
; CHECK: sll %r2, 2
; CHECK: sra %r2, 30
; CHECK: br %r14
%res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 2)
ret i32 %res
@ -28,7 +28,7 @@ define i32 @f2(i8 *%src1, i8 *%src2) {
; Check a case where the result is tested for equality.
define void @f3(i8 *%src1, i8 *%src2, i32 *%dest) {
; CHECK-LABEL: f3:
; CHECK: clc 0(3,%r2), 0(%r3)
; CHECK: clc 0(3,%r3), 0(%r2)
; CHECK-NEXT: ber %r14
; CHECK: br %r14
%res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 3)
@ -46,7 +46,7 @@ exit:
; Check a case where the result is tested for inequality.
define void @f4(i8 *%src1, i8 *%src2, i32 *%dest) {
; CHECK-LABEL: f4:
; CHECK: clc 0(4,%r2), 0(%r3)
; CHECK: clc 0(4,%r3), 0(%r2)
; CHECK-NEXT: blhr %r14
; CHECK: br %r14
entry:
@ -65,8 +65,8 @@ exit:
; Check a case where the result is tested via slt.
define void @f5(i8 *%src1, i8 *%src2, i32 *%dest) {
; CHECK-LABEL: f5:
; CHECK: clc 0(5,%r2), 0(%r3)
; CHECK-NEXT: blr %r14
; CHECK: clc 0(5,%r3), 0(%r2)
; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 5)
@ -84,8 +84,8 @@ exit:
; Check a case where the result is tested for sgt.
define void @f6(i8 *%src1, i8 *%src2, i32 *%dest) {
; CHECK-LABEL: f6:
; CHECK: clc 0(6,%r2), 0(%r3)
; CHECK-NEXT: bhr %r14
; CHECK: clc 0(6,%r3), 0(%r2)
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
%res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 6)
@ -104,10 +104,10 @@ exit:
; an integer and for branching.
define i32 @f7(i8 *%src1, i8 *%src2, i32 *%dest) {
; CHECK-LABEL: f7:
; CHECK: clc 0(256,%r2), 0(%r3)
; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: srl [[REG]], 28
; CHECK: rll %r2, [[REG]], 31
; CHECK: clc 0(256,%r3), 0(%r2)
; CHECK: ipm %r2
; CHECK: sll %r2, 2
; CHECK: sra %r2, 30
; CHECK: blr %r14
; CHECK: br %r14
entry:
@ -126,9 +126,9 @@ exit:
; 257 bytes needs two CLCs.
define i32 @f8(i8 *%src1, i8 *%src2) {
; CHECK-LABEL: f8:
; CHECK: clc 0(256,%r2), 0(%r3)
; CHECK: clc 0(256,%r3), 0(%r2)
; CHECK: jlh [[LABEL:\..*]]
; CHECK: clc 256(1,%r2), 256(%r3)
; CHECK: clc 256(1,%r3), 256(%r2)
; CHECK: [[LABEL]]:
; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: br %r14
@ -139,11 +139,11 @@ define i32 @f8(i8 *%src1, i8 *%src2) {
; Test a comparison of 258 bytes in which the CC result can be used directly.
define void @f9(i8 *%src1, i8 *%src2, i32 *%dest) {
; CHECK-LABEL: f9:
; CHECK: clc 0(256,%r2), 0(%r3)
; CHECK: clc 0(256,%r3), 0(%r2)
; CHECK: jlh [[LABEL:\..*]]
; CHECK: clc 256(1,%r2), 256(%r3)
; CHECK: clc 256(1,%r3), 256(%r2)
; CHECK: [[LABEL]]:
; CHECK-NEXT: blr %r14
; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 257)
@ -161,9 +161,9 @@ exit:
; Test the largest size that can use two CLCs.
define i32 @f10(i8 *%src1, i8 *%src2) {
; CHECK-LABEL: f10:
; CHECK: clc 0(256,%r2), 0(%r3)
; CHECK: clc 0(256,%r3), 0(%r2)
; CHECK: jlh [[LABEL:\..*]]
; CHECK: clc 256(256,%r2), 256(%r3)
; CHECK: clc 256(256,%r3), 256(%r2)
; CHECK: [[LABEL]]:
; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: br %r14
@ -174,11 +174,11 @@ define i32 @f10(i8 *%src1, i8 *%src2) {
; Test the smallest size that needs 3 CLCs.
define i32 @f11(i8 *%src1, i8 *%src2) {
; CHECK-LABEL: f11:
; CHECK: clc 0(256,%r2), 0(%r3)
; CHECK: clc 0(256,%r3), 0(%r2)
; CHECK: jlh [[LABEL:\..*]]
; CHECK: clc 256(256,%r2), 256(%r3)
; CHECK: clc 256(256,%r3), 256(%r2)
; CHECK: jlh [[LABEL]]
; CHECK: clc 512(1,%r2), 512(%r3)
; CHECK: clc 512(1,%r3), 512(%r2)
; CHECK: [[LABEL]]:
; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: br %r14
@ -189,11 +189,11 @@ define i32 @f11(i8 *%src1, i8 *%src2) {
; Test the largest size than can use 3 CLCs.
define i32 @f12(i8 *%src1, i8 *%src2) {
; CHECK-LABEL: f12:
; CHECK: clc 0(256,%r2), 0(%r3)
; CHECK: clc 0(256,%r3), 0(%r2)
; CHECK: jlh [[LABEL:\..*]]
; CHECK: clc 256(256,%r2), 256(%r3)
; CHECK: clc 256(256,%r3), 256(%r2)
; CHECK: jlh [[LABEL]]
; CHECK: clc 512(256,%r2), 512(%r3)
; CHECK: clc 512(256,%r3), 512(%r2)
; CHECK: [[LABEL]]:
; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: br %r14
@ -207,12 +207,12 @@ define i32 @f13(i8 *%src1, i8 *%src2) {
; CHECK-LABEL: f13:
; CHECK: lghi [[COUNT:%r[0-5]]], 3
; CHECK: [[LOOP:.L[^:]*]]:
; CHECK: clc 0(256,%r2), 0(%r3)
; CHECK: clc 0(256,%r3), 0(%r2)
; CHECK: jlh [[LABEL:\..*]]
; CHECK-DAG: la %r2, 256(%r2)
; CHECK-DAG: la %r3, 256(%r3)
; CHECK: brctg [[COUNT]], [[LOOP]]
; CHECK: clc 0(1,%r2), 0(%r3)
; CHECK: clc 0(1,%r3), 0(%r2)
; CHECK: [[LABEL]]:
; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: br %r14

18
test/CodeGen/SystemZ/strcmp-01.ll
View File

@ -9,12 +9,12 @@ define i32 @f1(i8 *%src1, i8 *%src2) {
; CHECK-LABEL: f1:
; CHECK: lhi %r0, 0
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: clst %r2, %r3
; CHECK: clst %r3, %r2
; CHECK-NEXT: jo [[LABEL]]
; CHECK-NEXT: %bb.{{[0-9]+}}
; CHECK-NEXT: ipm [[REG:%r[0-5]]]
; CHECK: srl [[REG]], 28
; CHECK: rll %r2, [[REG]], 31
; CHECK-NEXT: ipm %r2
; CHECK: sll %r2, 2
; CHECK: sra %r2, 30
; CHECK: br %r14
%res = call i32 @strcmp(i8 *%src1, i8 *%src2)
ret i32 %res
@ -25,7 +25,7 @@ define void @f2(i8 *%src1, i8 *%src2, i32 *%dest) {
; CHECK-LABEL: f2:
; CHECK: lhi %r0, 0
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: clst %r2, %r3
; CHECK: clst %r3, %r2
; CHECK-NEXT: jo [[LABEL]]
; CHECK-NEXT: %bb.{{[0-9]+}}
; CHECK-NEXT: ber %r14
@ -48,12 +48,12 @@ define i32 @f3(i8 *%src1, i8 *%src2, i32 *%dest) {
; CHECK-LABEL: f3:
; CHECK: lhi %r0, 0
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: clst %r2, %r3
; CHECK: clst %r3, %r2
; CHECK-NEXT: jo [[LABEL]]
; CHECK-NEXT: %bb.{{[0-9]+}}
; CHECK-NEXT: ipm [[REG:%r[0-5]]]
; CHECK: srl [[REG]], 28
; CHECK: rll %r2, [[REG]], 31
; CHECK-NEXT: ipm %r2
; CHECK: sll %r2, 2
; CHECK: sra %r2, 30
; CHECK: blr %r14
; CHECK: br %r14
entry:

4
test/CodeGen/WebAssembly/call.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-temporary-workarounds=false -mattr=+sign-ext,+simd128 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 -wasm-temporary-workarounds=false -mattr=+sign-ext,+simd128 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+sign-ext,+simd128 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 -mattr=+sign-ext,+simd128 | FileCheck %s
; Test that basic call operations assemble as expected.

2
test/CodeGen/WebAssembly/function-bitcasts-varargs.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -asm-verbose=false -wasm-temporary-workarounds=false -wasm-keep-registers | FileCheck %s
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
; Test that function pointer casts casting away varargs are replaced with
; wrappers.

2
test/CodeGen/WebAssembly/function-bitcasts.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -enable-emscripten-cxx-exceptions -wasm-temporary-workarounds=false | FileCheck %s
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -enable-emscripten-cxx-exceptions | FileCheck %s
; Test that function pointer casts are replaced with wrappers.

3
test/CodeGen/WebAssembly/import-module.ll
View File

@ -12,8 +12,9 @@ define void @test() {
declare void @foo() #0
declare void @plain()
attributes #0 = { "wasm-import-module"="bar" }
attributes #0 = { "wasm-import-module"="bar" "wasm-import-name"="qux" }
; CHECK-NOT: .import_module plain
; CHECK: .import_module foo, bar
; CHECK: .import_name foo, qux
; CHECK-NOT: .import_module plain

16
test/CodeGen/WebAssembly/main-declaration.ll
View File

@ -1,20 +1,18 @@
; RUN: llc < %s -asm-verbose=false -wasm-temporary-workarounds=false | FileCheck %s
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test main functions with alternate signatures.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @main()
declare i32 @main()
define void @foo() {
call void @main()
ret void
define i32 @foo() {
%t = call i32 @main()
ret i32 %t
}
; CHECK-NOT: __original_main
; CHECK-LABEL: foo:
; CHECK-NEXT: .functype foo () -> ()
; CHECK-NEXT: call main@FUNCTION
; CHECK-NEXT: .functype foo () -> (i32)
; CHECK-NEXT: call __original_main@FUNCTION
; CHECK-NEXT: end_function
; CHECK-NOT: __original_main

13
test/CodeGen/WebAssembly/main-no-args.ll
View File

@ -1,18 +1,19 @@
; RUN: llc < %s -asm-verbose=false -wasm-temporary-workarounds=false | FileCheck %s
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test main functions with alternate signatures.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @main() {
ret void
define i32 @main() {
ret i32 0
}
; CHECK-LABEL: .L__original_main:
; CHECK-NEXT: .functype .L__original_main () -> ()
; CHECK-LABEL: __original_main:
; CHECK-NEXT: .functype __original_main () -> (i32)
; CHECK-NEXT: i32.const 0
; CHECK-NEXT: end_function
; CHECK-LABEL: main:
; CHECK-NEXT: .functype main (i32, i32) -> (i32)
; CHECK: call .L__original_main@FUNCTION
; CHECK: call __original_main@FUNCTION

16
test/CodeGen/WebAssembly/main-three-args.ll Normal file
View File

@ -0,0 +1,16 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that main function with a non-standard third argument is
; not wrapped.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define i32 @main(i32 %a, i8** %b, i8** %c) {
ret i32 0
}
; CHECK-LABEL: main:
; CHECK-NEXT: .functype main (i32, i32, i32) -> (i32)
; CHECK-NOT: __original_main:

2
test/CodeGen/WebAssembly/main-with-args.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -asm-verbose=false -wasm-temporary-workarounds=false | FileCheck %s
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that main function with expected signature is not wrapped

2
test/CodeGen/X86/and-su.ll
View File

@ -49,7 +49,7 @@ define fastcc double @bar(i32 %hash, double %x, double %y) nounwind {
; CHECK-NEXT: fchs
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: .LBB1_5: # %bb16
; CHECK-NEXT: faddp %st(1)
; CHECK-NEXT: faddp %st, %st(1)
; CHECK-NEXT: movl %ebp, %esp
; CHECK-NEXT: popl %ebp
; CHECK-NEXT: retl

18
test/CodeGen/X86/avx512-regcall-NoMask.ll
View File

@ -508,17 +508,17 @@ define x86_regcallcc double @test_CallargRetDouble(double %a) {
define x86_regcallcc x86_fp80 @test_argRetf80(x86_fp80 %a0) nounwind {
; X32-LABEL: test_argRetf80:
; X32: # %bb.0:
; X32-NEXT: fadd %st(0), %st(0)
; X32-NEXT: fadd %st, %st(0)
; X32-NEXT: retl
;
; WIN64-LABEL: test_argRetf80:
; WIN64: # %bb.0:
; WIN64-NEXT: fadd %st(0), %st(0)
; WIN64-NEXT: fadd %st, %st(0)
; WIN64-NEXT: retq
;
; LINUXOSX64-LABEL: test_argRetf80:
; LINUXOSX64: # %bb.0:
; LINUXOSX64-NEXT: fadd %st(0), %st(0)
; LINUXOSX64-NEXT: fadd %st, %st(0)
; LINUXOSX64-NEXT: retq
%r0 = fadd x86_fp80 %a0, %a0
ret x86_fp80 %r0
@ -529,9 +529,9 @@ define x86_regcallcc x86_fp80 @test_CallargRetf80(x86_fp80 %a) {
; X32-LABEL: test_CallargRetf80:
; X32: # %bb.0:
; X32-NEXT: pushl %esp
; X32-NEXT: fadd %st(0), %st(0)
; X32-NEXT: fadd %st, %st(0)
; X32-NEXT: calll _test_argRetf80
; X32-NEXT: fadd %st(0), %st(0)
; X32-NEXT: fadd %st, %st(0)
; X32-NEXT: popl %esp
; X32-NEXT: retl
;
@ -540,9 +540,9 @@ define x86_regcallcc x86_fp80 @test_CallargRetf80(x86_fp80 %a) {
; WIN64-NEXT: pushq %rsp
; WIN64-NEXT: .seh_pushreg 4
; WIN64-NEXT: .seh_endprologue
; WIN64-NEXT: fadd %st(0), %st(0)
; WIN64-NEXT: fadd %st, %st(0)
; WIN64-NEXT: callq test_argRetf80
; WIN64-NEXT: fadd %st(0), %st(0)
; WIN64-NEXT: fadd %st, %st(0)
; WIN64-NEXT: popq %rsp
; WIN64-NEXT: retq
; WIN64-NEXT: .seh_handlerdata
@ -554,9 +554,9 @@ define x86_regcallcc x86_fp80 @test_CallargRetf80(x86_fp80 %a) {
; LINUXOSX64-NEXT: pushq %rsp
; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
; LINUXOSX64-NEXT: .cfi_offset %rsp, -16
; LINUXOSX64-NEXT: fadd %st(0), %st(0)
; LINUXOSX64-NEXT: fadd %st, %st(0)
; LINUXOSX64-NEXT: callq test_argRetf80
; LINUXOSX64-NEXT: fadd %st(0), %st(0)
; LINUXOSX64-NEXT: fadd %st, %st(0)
; LINUXOSX64-NEXT: popq %rsp
; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
; LINUXOSX64-NEXT: retq

2
test/CodeGen/X86/fcmove.ll
View File

@ -6,7 +6,7 @@ target triple = "x86_64-unknown-unknown"
; Test that we can generate an fcmove, and also that it passes verification.
; CHECK-LABEL: cmove_f
; CHECK: fcmove %st({{[0-7]}}), %st(0)
; CHECK: fcmove %st({{[0-7]}}), %st
define x86_fp80 @cmove_f(x86_fp80 %a, x86_fp80 %b, i32 %c) {
%test = icmp eq i32 %c, 0
%add = fadd x86_fp80 %a, %b

4
test/CodeGen/X86/fmf-flags.ll
View File

@ -20,7 +20,7 @@ define float @fast_recip_sqrt(float %x) {
; X86-NEXT: flds {{[0-9]+}}(%esp)
; X86-NEXT: fsqrt
; X86-NEXT: fld1
; X86-NEXT: fdivp %st(1)
; X86-NEXT: fdivp %st, %st(1)
; X86-NEXT: retl
%y = call fast float @llvm.sqrt.f32(float %x)
%z = fdiv fast float 1.0, %y
@ -95,7 +95,7 @@ define float @not_so_fast_recip_sqrt(float %x) {
; X86-NEXT: flds {{[0-9]+}}(%esp)
; X86-NEXT: fsqrt
; X86-NEXT: fld1
; X86-NEXT: fdiv %st(1)
; X86-NEXT: fdiv %st(1), %st
; X86-NEXT: fxch %st(1)
; X86-NEXT: fstps sqrt1
; X86-NEXT: retl

8
test/CodeGen/X86/fp-cvt.ll
View File

@ -486,7 +486,7 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind {
; X64-X87-NEXT: xorl %eax, %eax
; X64-X87-NEXT: fxch %st(1)
; X64-X87-NEXT: fucompi %st(2)
; X64-X87-NEXT: fcmovnbe %st(1), %st(0)
; X64-X87-NEXT: fcmovnbe %st(1), %st
; X64-X87-NEXT: fstp %st(1)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx
@ -509,7 +509,7 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind {
; X64-SSSE3-NEXT: xorl %eax, %eax
; X64-SSSE3-NEXT: fxch %st(1)
; X64-SSSE3-NEXT: fucompi %st(2)
; X64-SSSE3-NEXT: fcmovnbe %st(1), %st(0)
; X64-SSSE3-NEXT: fcmovnbe %st(1), %st
; X64-SSSE3-NEXT: fstp %st(1)
; X64-SSSE3-NEXT: fisttpll -{{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: setbe %al
@ -568,7 +568,7 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind {
; X64-X87-NEXT: xorl %eax, %eax
; X64-X87-NEXT: fxch %st(1)
; X64-X87-NEXT: fucompi %st(2)
; X64-X87-NEXT: fcmovnbe %st(1), %st(0)
; X64-X87-NEXT: fcmovnbe %st(1), %st
; X64-X87-NEXT: fstp %st(1)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx
@ -591,7 +591,7 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind {
; X64-SSSE3-NEXT: xorl %eax, %eax
; X64-SSSE3-NEXT: fxch %st(1)
; X64-SSSE3-NEXT: fucompi %st(2)
; X64-SSSE3-NEXT: fcmovnbe %st(1), %st(0)
; X64-SSSE3-NEXT: fcmovnbe %st(1), %st
; X64-SSSE3-NEXT: fstp %st(1)
; X64-SSSE3-NEXT: fisttpll -{{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: setbe %al

8
test/CodeGen/X86/inline-asm-default-clobbers.ll Normal file
View File

@ -0,0 +1,8 @@
; RUN: llc < %s -mtriple=i686 -stop-after=expand-isel-pseudos | FileCheck %s
; CHECK: INLINEASM &"", 1, 12, implicit-def early-clobber $df, 12, implicit-def early-clobber $fpsw, 12, implicit-def early-clobber $eflags
define void @foo() {
entry:
call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}

38
test/CodeGen/X86/inline-asm-fpstack.ll
View File

@ -75,20 +75,20 @@ define void @test6(double %A, double %B, double %C, double %D, double %E) nounwi
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: foo %st(0) %st(0)
; CHECK-NEXT: foo %st %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: bar %st(1) %st(0)
; CHECK-NEXT: bar %st(1) %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(1)
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: baz %st(1) %st(0)
; CHECK-NEXT: baz %st(1) %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: baz %st(0)
; CHECK-NEXT: baz %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: retl
@ -117,10 +117,10 @@ define void @testPR4185() {
; CHECK-NEXT: flds LCPI6_0
; CHECK-NEXT: fld %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: fistpl %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: fistpl %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
return:
@ -138,10 +138,10 @@ define void @testPR4185b() {
; CHECK: ## %bb.0: ## %return
; CHECK-NEXT: flds LCPI7_0
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistl %st(0)
; CHECK-NEXT: fistl %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: fistpl %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
return:
@ -163,7 +163,7 @@ define void @testPR4459(x86_fp80 %a) {
; CHECK-NEXT: fld %st(0)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: fistpl %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstpt (%esp)
; CHECK-NEXT: calll _test3
@ -191,7 +191,7 @@ define void @testPR4484(x86_fp80 %a) {
; CHECK-NEXT: calll _test1
; CHECK-NEXT: fldt {{[0-9]+}}(%esp) ## 10-byte Folded Reload
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: fistpl %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstpt (%esp)
; CHECK-NEXT: calll _test3
@ -211,18 +211,18 @@ define void @testPR4485(x86_fp80* %a) {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: fldt (%eax)
; CHECK-NEXT: flds LCPI10_0
; CHECK-NEXT: fmul %st(0), %st(1)
; CHECK-NEXT: fmul %st, %st(1)
; CHECK-NEXT: flds LCPI10_1
; CHECK-NEXT: fmul %st(0), %st(2)
; CHECK-NEXT: fmul %st, %st(2)
; CHECK-NEXT: fxch %st(2)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: fistpl %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fldt (%eax)
; CHECK-NEXT: fmulp %st(1)
; CHECK-NEXT: fmulp %st(1)
; CHECK-NEXT: fmulp %st, %st(1)
; CHECK-NEXT: fmulp %st, %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: fistpl %st
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
entry:
@ -422,7 +422,7 @@ define i32 @PR10602() nounwind ssp {
; CHECK-NEXT: fld %st(0)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fcomi %st(1), %st(0); pushf; pop %eax
; CHECK-NEXT: fcomi %st(1), %st; pushf; pop %eax
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: fstp %st(0)
@ -505,9 +505,9 @@ define double @test_operand_rewrite() {
; CHECK-LABEL: test_operand_rewrite:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: foo %st(0), %st(1)
; CHECK-NEXT: foo %st, %st(1)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fsubp %st(1)
; CHECK-NEXT: fsubp %st, %st(1)
; CHECK-NEXT: retl
entry:
%0 = tail call { double, double } asm sideeffect "foo $0, $1", "={st},={st(1)},~{dirflag},~{fpsr},~{flags}"()

2
test/CodeGen/X86/ipra-reg-usage.ll
View File

@ -3,7 +3,7 @@
target triple = "x86_64-unknown-unknown"
declare void @bar1()
define preserve_allcc void @foo()#0 {
; CHECK: foo Clobbered Registers: $cs $df $ds $eflags $eip $eiz $es $fpsw $fs $gs $hip $ip $rip $riz $ss $ssp $bnd0 $bnd1 $bnd2 $bnd3 $cr0 $cr1 $cr2 $cr3 $cr4 $cr5 $cr6 $cr7 $cr8 $cr9 $cr10 $cr11 $cr12 $cr13 $cr14 $cr15 $dr0 $dr1 $dr2 $dr3 $dr4 $dr5 $dr6 $dr7 $dr8 $dr9 $dr10 $dr11 $dr12 $dr13 $dr14 $dr15 $fp0 $fp1 $fp2 $fp3 $fp4 $fp5 $fp6 $fp7 $k0 $k1 $k2 $k3 $k4 $k5 $k6 $k7 $mm0 $mm1 $mm2 $mm3 $mm4 $mm5 $mm6 $mm7 $r11 $st0 $st1 $st2 $st3 $st4 $st5 $st6 $st7 $xmm16 $xmm17 $xmm18 $xmm19 $xmm20 $xmm21 $xmm22 $xmm23 $xmm24 $xmm25 $xmm26 $xmm27 $xmm28 $xmm29 $xmm30 $xmm31 $ymm0 $ymm1 $ymm2 $ymm3 $ymm4 $ymm5 $ymm6 $ymm7 $ymm8 $ymm9 $ymm10 $ymm11 $ymm12 $ymm13 $ymm14 $ymm15 $ymm16 $ymm17 $ymm18 $ymm19 $ymm20 $ymm21 $ymm22 $ymm23 $ymm24 $ymm25 $ymm26 $ymm27 $ymm28 $ymm29 $ymm30 $ymm31 $zmm0 $zmm1 $zmm2 $zmm3 $zmm4 $zmm5 $zmm6 $zmm7 $zmm8 $zmm9 $zmm10 $zmm11 $zmm12 $zmm13 $zmm14 $zmm15 $zmm16 $zmm17 $zmm18 $zmm19 $zmm20 $zmm21 $zmm22 $zmm23 $zmm24 $zmm25 $zmm26 $zmm27 $zmm28 $zmm29 $zmm30 $zmm31 $r11b $r11bh $r11d $r11w $r11wh
; CHECK: foo Clobbered Registers: $cs $df $ds $eflags $eip $eiz $es $fpcw $fpsw $fs $gs $hip $ip $rip $riz $ss $ssp $bnd0 $bnd1 $bnd2 $bnd3 $cr0 $cr1 $cr2 $cr3 $cr4 $cr5 $cr6 $cr7 $cr8 $cr9 $cr10 $cr11 $cr12 $cr13 $cr14 $cr15 $dr0 $dr1 $dr2 $dr3 $dr4 $dr5 $dr6 $dr7 $dr8 $dr9 $dr10 $dr11 $dr12 $dr13 $dr14 $dr15 $fp0 $fp1 $fp2 $fp3 $fp4 $fp5 $fp6 $fp7 $k0 $k1 $k2 $k3 $k4 $k5 $k6 $k7 $mm0 $mm1 $mm2 $mm3 $mm4 $mm5 $mm6 $mm7 $r11 $st0 $st1 $st2 $st3 $st4 $st5 $st6 $st7 $xmm16 $xmm17 $xmm18 $xmm19 $xmm20 $xmm21 $xmm22 $xmm23 $xmm24 $xmm25 $xmm26 $xmm27 $xmm28 $xmm29 $xmm30 $xmm31 $ymm0 $ymm1 $ymm2 $ymm3 $ymm4 $ymm5 $ymm6 $ymm7 $ymm8 $ymm9 $ymm10 $ymm11 $ymm12 $ymm13 $ymm14 $ymm15 $ymm16 $ymm17 $ymm18 $ymm19 $ymm20 $ymm21 $ymm22 $ymm23 $ymm24 $ymm25 $ymm26 $ymm27 $ymm28 $ymm29 $ymm30 $ymm31 $zmm0 $zmm1 $zmm2 $zmm3 $zmm4 $zmm5 $zmm6 $zmm7 $zmm8 $zmm9 $zmm10 $zmm11 $zmm12 $zmm13 $zmm14 $zmm15 $zmm16 $zmm17 $zmm18 $zmm19 $zmm20 $zmm21 $zmm22 $zmm23 $zmm24 $zmm25 $zmm26 $zmm27 $zmm28 $zmm29 $zmm30 $zmm31 $r11b $r11bh $r11d $r11w $r11wh
call void @bar1()
call void @bar2()
ret void

2
test/CodeGen/X86/pr13577.ll
View File

@ -14,7 +14,7 @@ define x86_fp80 @foo(x86_fp80 %a) {
; CHECK-NEXT: testb $-128, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: flds {{.*}}(%rip)
; CHECK-NEXT: flds {{.*}}(%rip)
; CHECK-NEXT: fcmovne %st(1), %st(0)
; CHECK-NEXT: fcmovne %st(1), %st
; CHECK-NEXT: fstp %st(1)
; CHECK-NEXT: retq
%1 = tail call x86_fp80 @copysignl(x86_fp80 0xK7FFF8000000000000000, x86_fp80 %a) nounwind readnone

16
test/CodeGen/X86/pr33349.ll
View File

@ -19,18 +19,18 @@ target triple = "x86_64-unknown-linux-gnu"
; KNL-NEXT: fld1
; KNL-NEXT: fldz
; KNL-NEXT: fld %st(0)
; KNL-NEXT: fcmovne %st(2), %st(0)
; KNL-NEXT: fcmovne %st(2), %st
; KNL-NEXT: testb $1, %cl
; KNL-NEXT: fld %st(1)
; KNL-NEXT: fcmovne %st(3), %st(0)
; KNL-NEXT: fcmovne %st(3), %st
; KNL-NEXT: kmovw %k2, %eax
; KNL-NEXT: testb $1, %al
; KNL-NEXT: fld %st(2)
; KNL-NEXT: fcmovne %st(4), %st(0)
; KNL-NEXT: fcmovne %st(4), %st
; KNL-NEXT: kmovw %k0, %eax
; KNL-NEXT: testb $1, %al
; KNL-NEXT: fxch %st(3)
; KNL-NEXT: fcmovne %st(4), %st(0)
; KNL-NEXT: fcmovne %st(4), %st
; KNL-NEXT: fstp %st(4)
; KNL-NEXT: fxch %st(3)
; KNL-NEXT: fstpt (%rdi)
@ -55,18 +55,18 @@ target triple = "x86_64-unknown-linux-gnu"
; SKX-NEXT: fld1
; SKX-NEXT: fldz
; SKX-NEXT: fld %st(0)
; SKX-NEXT: fcmovne %st(2), %st(0)
; SKX-NEXT: fcmovne %st(2), %st
; SKX-NEXT: testb $1, %cl
; SKX-NEXT: fld %st(1)
; SKX-NEXT: fcmovne %st(3), %st(0)
; SKX-NEXT: fcmovne %st(3), %st
; SKX-NEXT: kmovd %k2, %eax
; SKX-NEXT: testb $1, %al
; SKX-NEXT: fld %st(2)
; SKX-NEXT: fcmovne %st(4), %st(0)
; SKX-NEXT: fcmovne %st(4), %st
; SKX-NEXT: kmovd %k0, %eax
; SKX-NEXT: testb $1, %al
; SKX-NEXT: fxch %st(3)
; SKX-NEXT: fcmovne %st(4), %st(0)
; SKX-NEXT: fcmovne %st(4), %st
; SKX-NEXT: fstp %st(4)
; SKX-NEXT: fxch %st(3)
; SKX-NEXT: fstpt (%rdi)

18
test/CodeGen/X86/pr34080.ll
View File

@ -27,7 +27,7 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE2-NEXT: movsd %xmm0, -32(%rbp)
; SSE2-NEXT: fsubl -32(%rbp)
; SSE2-NEXT: flds {{.*}}(%rip)
; SSE2-NEXT: fmul %st(0), %st(1)
; SSE2-NEXT: fmul %st, %st(1)
; SSE2-NEXT: fnstcw -2(%rbp)
; SSE2-NEXT: movzwl -2(%rbp), %eax
; SSE2-NEXT: movw $3199, -2(%rbp) ## imm = 0xC7F
@ -41,7 +41,7 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE2-NEXT: movsd %xmm0, -56(%rbp)
; SSE2-NEXT: movsd %xmm0, -24(%rbp)
; SSE2-NEXT: fsubl -24(%rbp)
; SSE2-NEXT: fmulp %st(1)
; SSE2-NEXT: fmulp %st, %st(1)
; SSE2-NEXT: fstpl -48(%rbp)
; SSE2-NEXT: popq %rbp
; SSE2-NEXT: retq
@ -65,12 +65,12 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -64(%rbp)
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -32(%rbp)
; SSE2-SCHEDULE-NEXT: fsubl -32(%rbp)
; SSE2-SCHEDULE-NEXT: fnstcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: flds {{.*}}(%rip)
; SSE2-SCHEDULE-NEXT: fnstcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: fmul %st, %st(1)
; SSE2-SCHEDULE-NEXT: movzwl -2(%rbp), %eax
; SSE2-SCHEDULE-NEXT: movw $3199, -2(%rbp) ## imm = 0xC7F
; SSE2-SCHEDULE-NEXT: fldcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: fmul %st(0), %st(1)
; SSE2-SCHEDULE-NEXT: movw %ax, -2(%rbp)
; SSE2-SCHEDULE-NEXT: fxch %st(1)
; SSE2-SCHEDULE-NEXT: fistl -12(%rbp)
@ -80,7 +80,7 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -56(%rbp)
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -24(%rbp)
; SSE2-SCHEDULE-NEXT: fsubl -24(%rbp)
; SSE2-SCHEDULE-NEXT: fmulp %st(1)
; SSE2-SCHEDULE-NEXT: fmulp %st, %st(1)
; SSE2-SCHEDULE-NEXT: fstpl -48(%rbp)
; SSE2-SCHEDULE-NEXT: popq %rbp
; SSE2-SCHEDULE-NEXT: retq
@ -100,7 +100,7 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE3-NEXT: movsd %xmm0, -24(%rbp)
; SSE3-NEXT: fsubl -24(%rbp)
; SSE3-NEXT: flds {{.*}}(%rip)
; SSE3-NEXT: fmul %st(0), %st(1)
; SSE3-NEXT: fmul %st, %st(1)
; SSE3-NEXT: fld %st(1)
; SSE3-NEXT: fisttpl -8(%rbp)
; SSE3-NEXT: xorps %xmm0, %xmm0
@ -109,7 +109,7 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE3-NEXT: movsd %xmm0, -16(%rbp)
; SSE3-NEXT: fxch %st(1)
; SSE3-NEXT: fsubl -16(%rbp)
; SSE3-NEXT: fmulp %st(1)
; SSE3-NEXT: fmulp %st, %st(1)
; SSE3-NEXT: fstpl -32(%rbp)
; SSE3-NEXT: popq %rbp
; SSE3-NEXT: retq
@ -129,7 +129,7 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; AVX-NEXT: vmovsd %xmm0, -24(%rbp)
; AVX-NEXT: fsubl -24(%rbp)
; AVX-NEXT: flds {{.*}}(%rip)
; AVX-NEXT: fmul %st(0), %st(1)
; AVX-NEXT: fmul %st, %st(1)
; AVX-NEXT: fld %st(1)
; AVX-NEXT: fisttpl -8(%rbp)
; AVX-NEXT: vcvtsi2sdl -8(%rbp), %xmm1, %xmm0
@ -137,7 +137,7 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; AVX-NEXT: vmovsd %xmm0, -16(%rbp)
; AVX-NEXT: fxch %st(1)
; AVX-NEXT: fsubl -16(%rbp)
; AVX-NEXT: fmulp %st(1)
; AVX-NEXT: fmulp %st, %st(1)
; AVX-NEXT: fstpl -32(%rbp)
; AVX-NEXT: popq %rbp
; AVX-NEXT: retq

16
test/CodeGen/X86/pr34177.ll
View File

@ -20,17 +20,17 @@ define void @test(<4x i64> %a, <4 x x86_fp80> %b, <8 x x86_fp80>* %c) local_unna
; CHECK-NEXT: fld1
; CHECK-NEXT: fldz
; CHECK-NEXT: fld %st(0)
; CHECK-NEXT: fcmove %st(2), %st(0)
; CHECK-NEXT: fcmove %st(2), %st
; CHECK-NEXT: cmpq %rax, %rsi
; CHECK-NEXT: fld %st(1)
; CHECK-NEXT: fcmove %st(3), %st(0)
; CHECK-NEXT: fcmove %st(3), %st
; CHECK-NEXT: cmpq %rdx, %r9
; CHECK-NEXT: fld %st(2)
; CHECK-NEXT: fcmove %st(4), %st(0)
; CHECK-NEXT: fcmove %st(4), %st
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: cmpq %r8, %rax
; CHECK-NEXT: fxch %st(3)
; CHECK-NEXT: fcmove %st(4), %st(0)
; CHECK-NEXT: fcmove %st(4), %st
; CHECK-NEXT: fstp %st(4)
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
; CHECK-NEXT: fstpt 70(%rdi)
@ -40,15 +40,15 @@ define void @test(<4x i64> %a, <4 x x86_fp80> %b, <8 x x86_fp80>* %c) local_unna
; CHECK-NEXT: fstpt 30(%rdi)
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
; CHECK-NEXT: fstpt 10(%rdi)
; CHECK-NEXT: fadd %st(0), %st(0)
; CHECK-NEXT: fadd %st, %st(0)
; CHECK-NEXT: fstpt 60(%rdi)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: fadd %st(0), %st(0)
; CHECK-NEXT: fadd %st, %st(0)
; CHECK-NEXT: fstpt 40(%rdi)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: fadd %st(0), %st(0)
; CHECK-NEXT: fadd %st, %st(0)
; CHECK-NEXT: fstpt 20(%rdi)
; CHECK-NEXT: fadd %st(0), %st(0)
; CHECK-NEXT: fadd %st, %st(0)
; CHECK-NEXT: fstpt (%rdi)
%1 = icmp eq <4 x i64> <i64 0, i64 1, i64 2, i64 3>, %a
%2 = select <4 x i1> %1, <4 x x86_fp80> <x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000>, <4 x x86_fp80> zeroinitializer

43
test/CodeGen/X86/pr40529.ll Normal file
View File

@ -0,0 +1,43 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s
define x86_fp80 @rem_pio2l_min(x86_fp80 %z) {
; CHECK-LABEL: rem_pio2l_min:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: flds {{.*}}(%rip)
; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fmul %st, %st(1)
; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fmulp %st, %st(1)
; CHECK-NEXT: retq
entry:
%conv = fptosi x86_fp80 %z to i32
%conv1 = sitofp i32 %conv to x86_fp80
%sub = fsub x86_fp80 %z, %conv1
%mul = fmul x86_fp80 %sub, 0xK40178000000000000000
%conv2 = fptosi x86_fp80 %mul to i32
%conv3 = sitofp i32 %conv2 to x86_fp80
%sub4 = fsub x86_fp80 %mul, %conv3
%mul5 = fmul x86_fp80 %sub4, 0xK40178000000000000000
ret x86_fp80 %mul5
}

24
test/CodeGen/X86/scalar-fp-to-i64.ll
View File

@ -1028,7 +1028,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; AVX512_32_WIN-NEXT: xorl %edx, %edx
; AVX512_32_WIN-NEXT: fxch %st(1)
; AVX512_32_WIN-NEXT: fucompi %st(2)
; AVX512_32_WIN-NEXT: fcmovnbe %st(1), %st(0)
; AVX512_32_WIN-NEXT: fcmovnbe %st(1), %st
; AVX512_32_WIN-NEXT: fstp %st(1)
; AVX512_32_WIN-NEXT: fisttpll (%esp)
; AVX512_32_WIN-NEXT: setbe %dl
@ -1049,7 +1049,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; AVX512_32_LIN-NEXT: xorl %edx, %edx
; AVX512_32_LIN-NEXT: fxch %st(1)
; AVX512_32_LIN-NEXT: fucompi %st(2)
; AVX512_32_LIN-NEXT: fcmovnbe %st(1), %st(0)
; AVX512_32_LIN-NEXT: fcmovnbe %st(1), %st
; AVX512_32_LIN-NEXT: fstp %st(1)
; AVX512_32_LIN-NEXT: fisttpll (%esp)
; AVX512_32_LIN-NEXT: setbe %dl
@ -1069,7 +1069,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; AVX512_64_WIN-NEXT: xorl %ecx, %ecx
; AVX512_64_WIN-NEXT: fxch %st(1)
; AVX512_64_WIN-NEXT: fucompi %st(2)
; AVX512_64_WIN-NEXT: fcmovnbe %st(1), %st(0)
; AVX512_64_WIN-NEXT: fcmovnbe %st(1), %st
; AVX512_64_WIN-NEXT: fstp %st(1)
; AVX512_64_WIN-NEXT: fisttpll (%rsp)
; AVX512_64_WIN-NEXT: setbe %cl
@ -1090,7 +1090,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; AVX512_64_LIN-NEXT: xorl %ecx, %ecx
; AVX512_64_LIN-NEXT: fxch %st(1)
; AVX512_64_LIN-NEXT: fucompi %st(2)
; AVX512_64_LIN-NEXT: fcmovnbe %st(1), %st(0)
; AVX512_64_LIN-NEXT: fcmovnbe %st(1), %st
; AVX512_64_LIN-NEXT: fstp %st(1)
; AVX512_64_LIN-NEXT: fisttpll -{{[0-9]+}}(%rsp)
; AVX512_64_LIN-NEXT: setbe %cl
@ -1114,7 +1114,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; SSE3_32_WIN-NEXT: xorl %edx, %edx
; SSE3_32_WIN-NEXT: fxch %st(1)
; SSE3_32_WIN-NEXT: fucompi %st(2)
; SSE3_32_WIN-NEXT: fcmovnbe %st(1), %st(0)
; SSE3_32_WIN-NEXT: fcmovnbe %st(1), %st
; SSE3_32_WIN-NEXT: fstp %st(1)
; SSE3_32_WIN-NEXT: fisttpll (%esp)
; SSE3_32_WIN-NEXT: setbe %dl
@ -1135,7 +1135,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; SSE3_32_LIN-NEXT: xorl %edx, %edx
; SSE3_32_LIN-NEXT: fxch %st(1)
; SSE3_32_LIN-NEXT: fucompi %st(2)
; SSE3_32_LIN-NEXT: fcmovnbe %st(1), %st(0)
; SSE3_32_LIN-NEXT: fcmovnbe %st(1), %st
; SSE3_32_LIN-NEXT: fstp %st(1)
; SSE3_32_LIN-NEXT: fisttpll (%esp)
; SSE3_32_LIN-NEXT: setbe %dl
@ -1155,7 +1155,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; SSE3_64_WIN-NEXT: xorl %eax, %eax
; SSE3_64_WIN-NEXT: fxch %st(1)
; SSE3_64_WIN-NEXT: fucompi %st(2)
; SSE3_64_WIN-NEXT: fcmovnbe %st(1), %st(0)
; SSE3_64_WIN-NEXT: fcmovnbe %st(1), %st
; SSE3_64_WIN-NEXT: fstp %st(1)
; SSE3_64_WIN-NEXT: fisttpll (%rsp)
; SSE3_64_WIN-NEXT: setbe %al
@ -1173,7 +1173,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; SSE3_64_LIN-NEXT: xorl %eax, %eax
; SSE3_64_LIN-NEXT: fxch %st(1)
; SSE3_64_LIN-NEXT: fucompi %st(2)
; SSE3_64_LIN-NEXT: fcmovnbe %st(1), %st(0)
; SSE3_64_LIN-NEXT: fcmovnbe %st(1), %st
; SSE3_64_LIN-NEXT: fstp %st(1)
; SSE3_64_LIN-NEXT: fisttpll -{{[0-9]+}}(%rsp)
; SSE3_64_LIN-NEXT: setbe %al
@ -1194,7 +1194,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; SSE2_32_WIN-NEXT: xorl %edx, %edx
; SSE2_32_WIN-NEXT: fxch %st(1)
; SSE2_32_WIN-NEXT: fucompi %st(2)
; SSE2_32_WIN-NEXT: fcmovnbe %st(1), %st(0)
; SSE2_32_WIN-NEXT: fcmovnbe %st(1), %st
; SSE2_32_WIN-NEXT: fstp %st(1)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
@ -1221,7 +1221,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; SSE2_32_LIN-NEXT: xorl %edx, %edx
; SSE2_32_LIN-NEXT: fxch %st(1)
; SSE2_32_LIN-NEXT: fucompi %st(2)
; SSE2_32_LIN-NEXT: fcmovnbe %st(1), %st(0)
; SSE2_32_LIN-NEXT: fcmovnbe %st(1), %st
; SSE2_32_LIN-NEXT: fstp %st(1)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
@ -1247,7 +1247,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; SSE2_64_WIN-NEXT: xorl %eax, %eax
; SSE2_64_WIN-NEXT: fxch %st(1)
; SSE2_64_WIN-NEXT: fucompi %st(2)
; SSE2_64_WIN-NEXT: fcmovnbe %st(1), %st(0)
; SSE2_64_WIN-NEXT: fcmovnbe %st(1), %st
; SSE2_64_WIN-NEXT: fstp %st(1)
; SSE2_64_WIN-NEXT: fnstcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: movzwl {{[0-9]+}}(%rsp), %ecx
@ -1271,7 +1271,7 @@ define i64 @x_to_u64(x86_fp80 %a) nounwind {
; SSE2_64_LIN-NEXT: xorl %eax, %eax
; SSE2_64_LIN-NEXT: fxch %st(1)
; SSE2_64_LIN-NEXT: fucompi %st(2)
; SSE2_64_LIN-NEXT: fcmovnbe %st(1), %st(0)
; SSE2_64_LIN-NEXT: fcmovnbe %st(1), %st
; SSE2_64_LIN-NEXT: fstp %st(1)
; SSE2_64_LIN-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx

24
test/CodeGen/X86/select.ll
View File

@ -293,25 +293,25 @@ define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
; ATHLON-NEXT: flds 4(%ecx)
; ATHLON-NEXT: flds (%ecx)
; ATHLON-NEXT: flds (%eax)
; ATHLON-NEXT: fmul %st(0), %st(0)
; ATHLON-NEXT: fmul %st, %st(0)
; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; ATHLON-NEXT: fxch %st(1)
; ATHLON-NEXT: fcmove %st(1), %st(0)
; ATHLON-NEXT: fcmove %st(1), %st
; ATHLON-NEXT: fstp %st(1)
; ATHLON-NEXT: flds 4(%eax)
; ATHLON-NEXT: fmul %st(0), %st(0)
; ATHLON-NEXT: fmul %st, %st(0)
; ATHLON-NEXT: fxch %st(2)
; ATHLON-NEXT: fcmove %st(2), %st(0)
; ATHLON-NEXT: fcmove %st(2), %st
; ATHLON-NEXT: fstp %st(2)
; ATHLON-NEXT: flds 8(%eax)
; ATHLON-NEXT: fmul %st(0), %st(0)
; ATHLON-NEXT: fmul %st, %st(0)
; ATHLON-NEXT: fxch %st(3)
; ATHLON-NEXT: fcmove %st(3), %st(0)
; ATHLON-NEXT: fcmove %st(3), %st
; ATHLON-NEXT: fstp %st(3)
; ATHLON-NEXT: flds 12(%eax)
; ATHLON-NEXT: fmul %st(0), %st(0)
; ATHLON-NEXT: fmul %st, %st(0)
; ATHLON-NEXT: fxch %st(4)
; ATHLON-NEXT: fcmove %st(4), %st(0)
; ATHLON-NEXT: fcmove %st(4), %st
; ATHLON-NEXT: fstp %st(4)
; ATHLON-NEXT: fxch %st(3)
; ATHLON-NEXT: fstps 12(%ecx)
@ -332,13 +332,13 @@ define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
; MCU-NEXT: flds 4(%ecx)
; MCU-NEXT: flds 8(%ecx)
; MCU-NEXT: flds 12(%ecx)
; MCU-NEXT: fmul %st(0), %st(0)
; MCU-NEXT: fmul %st, %st(0)
; MCU-NEXT: fxch %st(1)
; MCU-NEXT: fmul %st(0), %st(0)
; MCU-NEXT: fmul %st, %st(0)
; MCU-NEXT: fxch %st(2)
; MCU-NEXT: fmul %st(0), %st(0)
; MCU-NEXT: fmul %st, %st(0)
; MCU-NEXT: fxch %st(3)
; MCU-NEXT: fmul %st(0), %st(0)
; MCU-NEXT: fmul %st, %st(0)
; MCU-NEXT: testl %eax, %eax
; MCU-NEXT: flds (%edx)
; MCU-NEXT: je .LBB5_2

4
test/CodeGen/X86/sincos-opt.ll
View File

@ -115,13 +115,13 @@ entry:
; GNU_SINCOS: callq sincosl
; GNU_SINCOS: fldt 16(%rsp)
; GNU_SINCOS: fldt 32(%rsp)
; GNU_SINCOS: faddp %st(1)
; GNU_SINCOS: faddp %st, %st(1)
; GNU_SINCOS_FASTMATH-LABEL: test3:
; GNU_SINCOS_FASTMATH: callq sincosl
; GNU_SINCOS_FASTMATH: fldt 16(%{{[re]}}sp)
; GNU_SINCOS_FASTMATH: fldt 32(%{{[re]}}sp)
; GNU_SINCOS_FASTMATH: faddp %st(1)
; GNU_SINCOS_FASTMATH: faddp %st, %st(1)
%call = tail call x86_fp80 @sinl(x86_fp80 %x) readnone
%call1 = tail call x86_fp80 @cosl(x86_fp80 %x) readnone
%add = fadd x86_fp80 %call, %call1

792
test/CodeGen/X86/x87-schedule.ll
View File

File diff suppressed because it is too large Load Diff

22
test/DebugInfo/Mips/eh_frame.ll
View File

@ -1,9 +1,21 @@
; RUN: llc -mtriple mips-unknown-linux-gnu -mattr=+micromips -O3 -filetype=obj -o - %s | llvm-readelf -r | FileCheck %s
; RUN: llc -mtriple mips-unknown-linux-gnu -mattr=+micromips -relocation-model=static -O3 -filetype=obj -o - %s | \
; RUN: llvm-readelf -r | FileCheck %s --check-prefix=CHECK-READELF
; RUN: llc -mtriple mips-unknown-linux-gnu -mattr=+micromips -relocation-model=pic -O3 -filetype=obj -o - %s | \
; RUN: llvm-readelf -r | FileCheck %s --check-prefix=CHECK-READELF
; RUN: llc -mtriple mips-unknown-linux-gnu -mattr=+micromips -relocation-model=static -O3 -filetype=obj -o - %s | \
; RUN: llvm-objdump -s -j .gcc_except_table - | FileCheck %s --check-prefix=CHECK-EXCEPT-TABLE-STATIC
; RUN: llc -mtriple mips-unknown-linux-gnu -mattr=+micromips -relocation-model=pic -O3 -filetype=obj -o - %s | \
; RUN: llvm-objdump -s -j .gcc_except_table - | FileCheck %s --check-prefix=CHECK-EXCEPT-TABLE-PIC
; CHECK: .rel.eh_frame
; CHECK: DW.ref.__gxx_personality_v0
; CHECK-NEXT: .text
; CHECK-NEXT: .gcc_except_table
; CHECK-READELF: .rel.eh_frame
; CHECK-READELF: DW.ref.__gxx_personality_v0
; CHECK-READELF-NEXT: .text
; CHECK-READELF-NEXT: .gcc_except_table
; CHECK-EXCEPT-TABLE-STATIC: 0000 ff9b1501 0c011500 00150e23 01231e00 ...........#.#..
; CHECK-EXCEPT-TABLE-STATIC: 0010 00010000 00000000
; CHECK-EXCEPT-TABLE-PIC: 0000 ff9b1501 0c012d00 002d133f 013f2a00 ......-..-.?.?*.
; CHECK-EXCEPT-TABLE-PIC: 0010 00010000 00000000 ........
@_ZTIi = external constant i8*

18
test/Instrumentation/MemorySanitizer/global_ctors_2to3.ll Normal file
View File

@ -0,0 +1,18 @@
; MSan converts 2-element global_ctors to 3-element when adding the new entry.
; RUN: opt < %s -msan-with-comdat -S -passes=msan 2>&1 | FileCheck %s
; RUN: opt < %s -msan -msan-with-comdat -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; CHECK: $msan.module_ctor = comdat any
; CHECK: @llvm.global_ctors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @f, i8* null }, { i32, void ()*, i8* } { i32 0, void ()* @msan.module_ctor, i8* bitcast (void ()* @msan.module_ctor to i8*) }]
@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @f }]
define internal void @f() {
entry:
ret void
}
; CHECK: define internal void @msan.module_ctor() comdat {

5
test/Instrumentation/MemorySanitizer/msan_basic.ll
View File

@ -9,7 +9,7 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; CHECK: @llvm.global_ctors {{.*}} { i32 0, void ()* @__msan_init, i8* null }
; CHECK: @llvm.global_ctors {{.*}} { i32 0, void ()* @msan.module_ctor, i8* null }
; Check the presence and the linkage type of __msan_track_origins and
; other interface symbols.
@ -991,4 +991,5 @@ define i8* @MismatchingCallMustTailCall(i32 %a) sanitize_memory {
; CHECK-NEXT: ret i8*
; CHECK: declare void @__msan_init()
; CHECK-LABEL: define internal void @msan.module_ctor() {
; CHECK: call void @__msan_init()

3
test/Instrumentation/MemorySanitizer/msan_llvm_is_constant.ll
View File

@ -1,6 +1,9 @@
; Make sure MSan doesn't insert shadow checks for @llvm.is.constant.* arguments.
; RUN: opt < %s -msan-kernel=1 -S -passes=msan 2>&1 | FileCheck \
; RUN: -check-prefixes=CHECK %s
; RUN: opt < %s -msan -msan-kernel=1 -S | FileCheck -check-prefixes=CHECK %s
; RUN: opt < %s -S -passes=msan 2>&1 | FileCheck -check-prefixes=CHECK %s
; RUN: opt < %s -msan -S | FileCheck -check-prefixes=CHECK %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

416
test/MC/Disassembler/X86/fp-stack.txt
View File

@ -1,52 +1,52 @@
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s
# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s
# CHECK: fadd %st(0)
# CHECK: fadd %st(0), %st
0xd8,0xc0
# CHECK: fadd %st(1)
# CHECK: fadd %st(1), %st
0xd8,0xc1
# CHECK: fadd %st(2)
# CHECK: fadd %st(2), %st
0xd8,0xc2
# CHECK: fadd %st(3)
# CHECK: fadd %st(3), %st
0xd8,0xc3
# CHECK: fadd %st(4)
# CHECK: fadd %st(4), %st
0xd8,0xc4
# CHECK: fadd %st(5)
# CHECK: fadd %st(5), %st
0xd8,0xc5
# CHECK: fadd %st(6)
# CHECK: fadd %st(6), %st
0xd8,0xc6
# CHECK: fadd %st(7)
# CHECK: fadd %st(7), %st
0xd8,0xc7
# CHECK: fmul %st(0)
# CHECK: fmul %st(0), %st
0xd8,0xc8
# CHECK: fmul %st(1)
# CHECK: fmul %st(1), %st
0xd8,0xc9
# CHECK: fmul %st(2)
# CHECK: fmul %st(2), %st
0xd8,0xca
# CHECK: fmul %st(3)
# CHECK: fmul %st(3), %st
0xd8,0xcb
# CHECK: fmul %st(4)
# CHECK: fmul %st(4), %st
0xd8,0xcc
# CHECK: fmul %st(5)
# CHECK: fmul %st(5), %st
0xd8,0xcd
# CHECK: fmul %st(6)
# CHECK: fmul %st(6), %st
0xd8,0xce
# CHECK: fmul %st(7)
# CHECK: fmul %st(7), %st
0xd8,0xcf
# CHECK: fcom %st(0)
@ -97,100 +97,100 @@
# CHECK: fcomp %st(7)
0xd8,0xdf
# CHECK: fsub %st(0)
# CHECK: fsub %st(0), %st
0xd8,0xe0
# CHECK: fsub %st(1)
# CHECK: fsub %st(1), %st
0xd8,0xe1
# CHECK: fsub %st(2)
# CHECK: fsub %st(2), %st
0xd8,0xe2
# CHECK: fsub %st(3)
# CHECK: fsub %st(3), %st
0xd8,0xe3
# CHECK: fsub %st(4)
# CHECK: fsub %st(4), %st
0xd8,0xe4
# CHECK: fsub %st(5)
# CHECK: fsub %st(5), %st
0xd8,0xe5
# CHECK: fsub %st(6)
# CHECK: fsub %st(6), %st
0xd8,0xe6
# CHECK: fsub %st(7)
# CHECK: fsub %st(7), %st
0xd8,0xe7
# CHECK: fsubr %st(0)
# CHECK: fsubr %st(0), %st
0xd8,0xe8
# CHECK: fsubr %st(1)
# CHECK: fsubr %st(1), %st
0xd8,0xe9
# CHECK: fsubr %st(2)
# CHECK: fsubr %st(2), %st
0xd8,0xea
# CHECK: fsubr %st(3)
# CHECK: fsubr %st(3), %st
0xd8,0xeb
# CHECK: fsubr %st(4)
# CHECK: fsubr %st(4), %st
0xd8,0xec
# CHECK: fsubr %st(5)
# CHECK: fsubr %st(5), %st
0xd8,0xed
# CHECK: fsubr %st(6)
# CHECK: fsubr %st(6), %st
0xd8,0xee
# CHECK: fsubr %st(7)
# CHECK: fsubr %st(7), %st
0xd8,0xef
# CHECK: fdiv %st(0)
# CHECK: fdiv %st(0), %st
0xd8,0xf0
# CHECK: fdiv %st(1)
# CHECK: fdiv %st(1), %st
0xd8,0xf1
# CHECK: fdiv %st(2)
# CHECK: fdiv %st(2), %st
0xd8,0xf2
# CHECK: fdiv %st(3)
# CHECK: fdiv %st(3), %st
0xd8,0xf3
# CHECK: fdiv %st(4)
# CHECK: fdiv %st(4), %st
0xd8,0xf4
# CHECK: fdiv %st(5)
# CHECK: fdiv %st(5), %st
0xd8,0xf5
# CHECK: fdiv %st(6)
# CHECK: fdiv %st(6), %st
0xd8,0xf6
# CHECK: fdiv %st(7)
# CHECK: fdiv %st(7), %st
0xd8,0xf7
# CHECK: fdivr %st(0)
# CHECK: fdivr %st(0), %st
0xd8,0xf8
# CHECK: fdivr %st(1)
# CHECK: fdivr %st(1), %st
0xd8,0xf9
# CHECK: fdivr %st(2)
# CHECK: fdivr %st(2), %st
0xd8,0xfa
# CHECK: fdivr %st(3)
# CHECK: fdivr %st(3), %st
0xd8,0xfb
# CHECK: fdivr %st(4)
# CHECK: fdivr %st(4), %st
0xd8,0xfc
# CHECK: fdivr %st(5)
# CHECK: fdivr %st(5), %st
0xd8,0xfd
# CHECK: fdivr %st(6)
# CHECK: fdivr %st(6), %st
0xd8,0xfe
# CHECK: fdivr %st(7)
# CHECK: fdivr %st(7), %st
0xd8,0xff
# CHECK: fld %st(0)
@ -325,199 +325,199 @@
# CHECK: fcos
0xd9,0xff
# CHECK: fcmovb %st(0), %st(0)
# CHECK: fcmovb %st(0), %st
0xda,0xc0
# CHECK: fcmovb %st(1), %st(0)
# CHECK: fcmovb %st(1), %st
0xda,0xc1
# CHECK: fcmovb %st(2), %st(0)
# CHECK: fcmovb %st(2), %st
0xda,0xc2
# CHECK: fcmovb %st(3), %st(0)
# CHECK: fcmovb %st(3), %st
0xda,0xc3
# CHECK: fcmovb %st(4), %st(0)
# CHECK: fcmovb %st(4), %st
0xda,0xc4
# CHECK: fcmovb %st(5), %st(0)
# CHECK: fcmovb %st(5), %st
0xda,0xc5
# CHECK: fcmovb %st(6), %st(0)
# CHECK: fcmovb %st(6), %st
0xda,0xc6
# CHECK: fcmovb %st(7), %st(0)
# CHECK: fcmovb %st(7), %st
0xda,0xc7
# CHECK: fcmove %st(0), %st(0)
# CHECK: fcmove %st(0), %st
0xda,0xc8
# CHECK: fcmove %st(1), %st(0)
# CHECK: fcmove %st(1), %st
0xda,0xc9
# CHECK: fcmove %st(2), %st(0)
# CHECK: fcmove %st(2), %st
0xda,0xca
# CHECK: fcmove %st(3), %st(0)
# CHECK: fcmove %st(3), %st
0xda,0xcb
# CHECK: fcmove %st(4), %st(0)
# CHECK: fcmove %st(4), %st
0xda,0xcc
# CHECK: fcmove %st(5), %st(0)
# CHECK: fcmove %st(5), %st
0xda,0xcd
# CHECK: fcmove %st(6), %st(0)
# CHECK: fcmove %st(6), %st
0xda,0xce
# CHECK: fcmove %st(7), %st(0)
# CHECK: fcmove %st(7), %st
0xda,0xcf
# CHECK: fcmovbe %st(0), %st(0)
# CHECK: fcmovbe %st(0), %st
0xda,0xd0
# CHECK: fcmovbe %st(1), %st(0)
# CHECK: fcmovbe %st(1), %st
0xda,0xd1
# CHECK: fcmovbe %st(2), %st(0)
# CHECK: fcmovbe %st(2), %st
0xda,0xd2
# CHECK: fcmovbe %st(3), %st(0)
# CHECK: fcmovbe %st(3), %st
0xda,0xd3
# CHECK: fcmovbe %st(4), %st(0)
# CHECK: fcmovbe %st(4), %st
0xda,0xd4
# CHECK: fcmovbe %st(5), %st(0)
# CHECK: fcmovbe %st(5), %st
0xda,0xd5
# CHECK: fcmovbe %st(6), %st(0)
# CHECK: fcmovbe %st(6), %st
0xda,0xd6
# CHECK: fcmovbe %st(7), %st(0)
# CHECK: fcmovbe %st(7), %st
0xda,0xd7
# CHECK: fcmovu %st(0), %st(0)
# CHECK: fcmovu %st(0), %st
0xda,0xd8
# CHECK: fcmovu %st(1), %st(0)
# CHECK: fcmovu %st(1), %st
0xda,0xd9
# CHECK: fcmovu %st(2), %st(0)
# CHECK: fcmovu %st(2), %st
0xda,0xda
# CHECK: fcmovu %st(3), %st(0)
# CHECK: fcmovu %st(3), %st
0xda,0xdb
# CHECK: fcmovu %st(4), %st(0)
# CHECK: fcmovu %st(4), %st
0xda,0xdc
# CHECK: fcmovu %st(5), %st(0)
# CHECK: fcmovu %st(5), %st
0xda,0xdd
# CHECK: fcmovu %st(6), %st(0)
# CHECK: fcmovu %st(6), %st
0xda,0xde
# CHECK: fcmovu %st(7), %st(0)
# CHECK: fcmovu %st(7), %st
0xda,0xdf
# CHECK: fucompp
0xda,0xe9
# CHECK: fcmovnb %st(0), %st(0)
# CHECK: fcmovnb %st(0), %st
0xdb,0xc0
# CHECK: fcmovnb %st(1), %st(0)
# CHECK: fcmovnb %st(1), %st
0xdb,0xc1
# CHECK: fcmovnb %st(2), %st(0)
# CHECK: fcmovnb %st(2), %st
0xdb,0xc2
# CHECK: fcmovnb %st(3), %st(0)
# CHECK: fcmovnb %st(3), %st
0xdb,0xc3
# CHECK: fcmovnb %st(4), %st(0)
# CHECK: fcmovnb %st(4), %st
0xdb,0xc4
# CHECK: fcmovnb %st(5), %st(0)
# CHECK: fcmovnb %st(5), %st
0xdb,0xc5
# CHECK: fcmovnb %st(6), %st(0)
# CHECK: fcmovnb %st(6), %st
0xdb,0xc6
# CHECK: fcmovnb %st(7), %st(0)
# CHECK: fcmovnb %st(7), %st
0xdb,0xc7
# CHECK: fcmovne %st(0), %st(0)
# CHECK: fcmovne %st(0), %st
0xdb,0xc8
# CHECK: fcmovne %st(1), %st(0)
# CHECK: fcmovne %st(1), %st
0xdb,0xc9
# CHECK: fcmovne %st(2), %st(0)
# CHECK: fcmovne %st(2), %st
0xdb,0xca
# CHECK: fcmovne %st(3), %st(0)
# CHECK: fcmovne %st(3), %st
0xdb,0xcb
# CHECK: fcmovne %st(4), %st(0)
# CHECK: fcmovne %st(4), %st
0xdb,0xcc
# CHECK: fcmovne %st(5), %st(0)
# CHECK: fcmovne %st(5), %st
0xdb,0xcd
# CHECK: fcmovne %st(6), %st(0)
# CHECK: fcmovne %st(6), %st
0xdb,0xce
# CHECK: fcmovne %st(7), %st(0)
# CHECK: fcmovne %st(7), %st
0xdb,0xcf
# CHECK: fcmovnbe %st(0), %st(0)
# CHECK: fcmovnbe %st(0), %st
0xdb,0xd0
# CHECK: fcmovnbe %st(1), %st(0)
# CHECK: fcmovnbe %st(1), %st
0xdb,0xd1
# CHECK: fcmovnbe %st(2), %st(0)
# CHECK: fcmovnbe %st(2), %st
0xdb,0xd2
# CHECK: fcmovnbe %st(3), %st(0)
# CHECK: fcmovnbe %st(3), %st
0xdb,0xd3
# CHECK: fcmovnbe %st(4), %st(0)
# CHECK: fcmovnbe %st(4), %st
0xdb,0xd4
# CHECK: fcmovnbe %st(5), %st(0)
# CHECK: fcmovnbe %st(5), %st
0xdb,0xd5
# CHECK: fcmovnbe %st(6), %st(0)
# CHECK: fcmovnbe %st(6), %st
0xdb,0xd6
# CHECK: fcmovnbe %st(7), %st(0)
# CHECK: fcmovnbe %st(7), %st
0xdb,0xd7
# CHECK: fcmovnu %st(0), %st(0)
# CHECK: fcmovnu %st(0), %st
0xdb,0xd8
# CHECK: fcmovnu %st(1), %st(0)
# CHECK: fcmovnu %st(1), %st
0xdb,0xd9
# CHECK: fcmovnu %st(2), %st(0)
# CHECK: fcmovnu %st(2), %st
0xdb,0xda
# CHECK: fcmovnu %st(3), %st(0)
# CHECK: fcmovnu %st(3), %st
0xdb,0xdb
# CHECK: fcmovnu %st(4), %st(0)
# CHECK: fcmovnu %st(4), %st
0xdb,0xdc
# CHECK: fcmovnu %st(5), %st(0)
# CHECK: fcmovnu %st(5), %st
0xdb,0xdd
# CHECK: fcmovnu %st(6), %st(0)
# CHECK: fcmovnu %st(6), %st
0xdb,0xde
# CHECK: fcmovnu %st(7), %st(0)
# CHECK: fcmovnu %st(7), %st
0xdb,0xdf
# CHECK: fnclex
@ -574,148 +574,148 @@
# CHECK: fcomi %st(7)
0xdb,0xf7
# CHECK: fadd %st(0), %st(0)
# CHECK: fadd %st, %st(0)
0xdc,0xc0
# CHECK: fadd %st(0), %st(1)
# CHECK: fadd %st, %st(1)
0xdc,0xc1
# CHECK: fadd %st(0), %st(2)
# CHECK: fadd %st, %st(2)
0xdc,0xc2
# CHECK: fadd %st(0), %st(3)
# CHECK: fadd %st, %st(3)
0xdc,0xc3
# CHECK: fadd %st(0), %st(4)
# CHECK: fadd %st, %st(4)
0xdc,0xc4
# CHECK: fadd %st(0), %st(5)
# CHECK: fadd %st, %st(5)
0xdc,0xc5
# CHECK: fadd %st(0), %st(6)
# CHECK: fadd %st, %st(6)
0xdc,0xc6
# CHECK: fadd %st(0), %st(7)
# CHECK: fadd %st, %st(7)
0xdc,0xc7
# CHECK: fmul %st(0), %st(0)
# CHECK: fmul %st, %st(0)
0xdc,0xc8
# CHECK: fmul %st(0), %st(1)
# CHECK: fmul %st, %st(1)
0xdc,0xc9
# CHECK: fmul %st(0), %st(2)
# CHECK: fmul %st, %st(2)
0xdc,0xca
# CHECK: fmul %st(0), %st(3)
# CHECK: fmul %st, %st(3)
0xdc,0xcb
# CHECK: fmul %st(0), %st(4)
# CHECK: fmul %st, %st(4)
0xdc,0xcc
# CHECK: fmul %st(0), %st(5)
# CHECK: fmul %st, %st(5)
0xdc,0xcd
# CHECK: fmul %st(0), %st(6)
# CHECK: fmul %st, %st(6)
0xdc,0xce
# CHECK: fmul %st(0), %st(7)
# CHECK: fmul %st, %st(7)
0xdc,0xcf
# CHECK: fsub %st(0), %st(0)
# CHECK: fsub %st, %st(0)
0xdc,0xe0
# CHECK: fsub %st(0), %st(1)
# CHECK: fsub %st, %st(1)
0xdc,0xe1
# CHECK: fsub %st(0), %st(2)
# CHECK: fsub %st, %st(2)
0xdc,0xe2
# CHECK: fsub %st(0), %st(3)
# CHECK: fsub %st, %st(3)
0xdc,0xe3
# CHECK: fsub %st(0), %st(4)
# CHECK: fsub %st, %st(4)
0xdc,0xe4
# CHECK: fsub %st(0), %st(5)
# CHECK: fsub %st, %st(5)
0xdc,0xe5
# CHECK: fsub %st(0), %st(6)
# CHECK: fsub %st, %st(6)
0xdc,0xe6
# CHECK: fsub %st(0), %st(7)
# CHECK: fsub %st, %st(7)
0xdc,0xe7
# CHECK: fsubr %st(0), %st(0)
# CHECK: fsubr %st, %st(0)
0xdc,0xe8
# CHECK: fsubr %st(0), %st(1)
# CHECK: fsubr %st, %st(1)
0xdc,0xe9
# CHECK: fsubr %st(0), %st(2)
# CHECK: fsubr %st, %st(2)
0xdc,0xea
# CHECK: fsubr %st(0), %st(3)
# CHECK: fsubr %st, %st(3)
0xdc,0xeb
# CHECK: fsubr %st(0), %st(4)
# CHECK: fsubr %st, %st(4)
0xdc,0xec
# CHECK: fsubr %st(0), %st(5)
# CHECK: fsubr %st, %st(5)
0xdc,0xed
# CHECK: fsubr %st(0), %st(6)
# CHECK: fsubr %st, %st(6)
0xdc,0xee
# CHECK: fsubr %st(0), %st(7)
# CHECK: fsubr %st, %st(7)
0xdc,0xef
# CHECK: fdiv %st(0), %st(0)
# CHECK: fdiv %st, %st(0)
0xdc,0xf0
# CHECK: fdiv %st(0), %st(1)
# CHECK: fdiv %st, %st(1)
0xdc,0xf1
# CHECK: fdiv %st(0), %st(2)
# CHECK: fdiv %st, %st(2)
0xdc,0xf2
# CHECK: fdiv %st(0), %st(3)
# CHECK: fdiv %st, %st(3)
0xdc,0xf3
# CHECK: fdiv %st(0), %st(4)
# CHECK: fdiv %st, %st(4)
0xdc,0xf4
# CHECK: fdiv %st(0), %st(5)
# CHECK: fdiv %st, %st(5)
0xdc,0xf5
# CHECK: fdiv %st(0), %st(6)
# CHECK: fdiv %st, %st(6)
0xdc,0xf6
# CHECK: fdiv %st(0), %st(7)
# CHECK: fdiv %st, %st(7)
0xdc,0xf7
# CHECK: fdivr %st(0), %st(0)
# CHECK: fdivr %st, %st(0)
0xdc,0xf8
# CHECK: fdivr %st(0), %st(1)
# CHECK: fdivr %st, %st(1)
0xdc,0xf9
# CHECK: fdivr %st(0), %st(2)
# CHECK: fdivr %st, %st(2)
0xdc,0xfa
# CHECK: fdivr %st(0), %st(3)
# CHECK: fdivr %st, %st(3)
0xdc,0xfb
# CHECK: fdivr %st(0), %st(4)
# CHECK: fdivr %st, %st(4)
0xdc,0xfc
# CHECK: fdivr %st(0), %st(5)
# CHECK: fdivr %st, %st(5)
0xdc,0xfd
# CHECK: fdivr %st(0), %st(6)
# CHECK: fdivr %st, %st(6)
0xdc,0xfe
# CHECK: fdivr %st(0), %st(7)
# CHECK: fdivr %st, %st(7)
0xdc,0xff
# CHECK: ffree %st(0)
@ -838,151 +838,151 @@
# CHECK: fucomp %st(7)
0xdd,0xef
# CHECK: faddp %st(0)
# CHECK: faddp %st, %st(0)
0xde,0xc0
# CHECK: faddp %st(1)
# CHECK: faddp %st, %st(1)
0xde,0xc1
# CHECK: faddp %st(2)
# CHECK: faddp %st, %st(2)
0xde,0xc2
# CHECK: faddp %st(3)
# CHECK: faddp %st, %st(3)
0xde,0xc3
# CHECK: faddp %st(4)
# CHECK: faddp %st, %st(4)
0xde,0xc4
# CHECK: faddp %st(5)
# CHECK: faddp %st, %st(5)
0xde,0xc5
# CHECK: faddp %st(6)
# CHECK: faddp %st, %st(6)
0xde,0xc6
# CHECK: faddp %st(7)
# CHECK: faddp %st, %st(7)
0xde,0xc7
# CHECK: fmulp %st(0)
# CHECK: fmulp %st, %st(0)
0xde,0xc8
# CHECK: fmulp %st(1)
# CHECK: fmulp %st, %st(1)
0xde,0xc9
# CHECK: fmulp %st(2)
# CHECK: fmulp %st, %st(2)
0xde,0xca
# CHECK: fmulp %st(3)
# CHECK: fmulp %st, %st(3)
0xde,0xcb
# CHECK: fmulp %st(4)
# CHECK: fmulp %st, %st(4)
0xde,0xcc
# CHECK: fmulp %st(5)
# CHECK: fmulp %st, %st(5)
0xde,0xcd
# CHECK: fmulp %st(6)
# CHECK: fmulp %st, %st(6)
0xde,0xce
# CHECK: fmulp %st(7)
# CHECK: fmulp %st, %st(7)
0xde,0xcf
# CHECK: fcompp
0xde,0xd9
# CHECK: fsubp %st(0)
# CHECK: fsubp %st, %st(0)
0xde,0xe0
# CHECK: fsubp %st(1)
# CHECK: fsubp %st, %st(1)
0xde,0xe1
# CHECK: fsubp %st(2)
# CHECK: fsubp %st, %st(2)
0xde,0xe2
# CHECK: fsubp %st(3)
# CHECK: fsubp %st, %st(3)
0xde,0xe3
# CHECK: fsubp %st(4)
# CHECK: fsubp %st, %st(4)
0xde,0xe4
# CHECK: fsubp %st(5)
# CHECK: fsubp %st, %st(5)
0xde,0xe5
# CHECK: fsubp %st(6)
# CHECK: fsubp %st, %st(6)
0xde,0xe6
# CHECK: fsubp %st(7)
# CHECK: fsubp %st, %st(7)
0xde,0xe7
# CHECK: fsubrp %st(0)
# CHECK: fsubrp %st, %st(0)
0xde,0xe8
# CHECK: fsubrp %st(1)
# CHECK: fsubrp %st, %st(1)
0xde,0xe9
# CHECK: fsubrp %st(2)
# CHECK: fsubrp %st, %st(2)
0xde,0xea
# CHECK: fsubrp %st(3)
# CHECK: fsubrp %st, %st(3)
0xde,0xeb
# CHECK: fsubrp %st(4)
# CHECK: fsubrp %st, %st(4)
0xde,0xec
# CHECK: fsubrp %st(5)
# CHECK: fsubrp %st, %st(5)
0xde,0xed
# CHECK: fsubrp %st(6)
# CHECK: fsubrp %st, %st(6)
0xde,0xee
# CHECK: fsubrp %st(7)
# CHECK: fsubrp %st, %st(7)
0xde,0xef
# CHECK: fdivp %st(0)
# CHECK: fdivp %st, %st(0)
0xde,0xf0
# CHECK: fdivp %st(1)
# CHECK: fdivp %st, %st(1)
0xde,0xf1
# CHECK: fdivp %st(2)
# CHECK: fdivp %st, %st(2)
0xde,0xf2
# CHECK: fdivp %st(3)
# CHECK: fdivp %st, %st(3)
0xde,0xf3
# CHECK: fdivp %st(4)
# CHECK: fdivp %st, %st(4)
0xde,0xf4
# CHECK: fdivp %st(5)
# CHECK: fdivp %st, %st(5)
0xde,0xf5
# CHECK: fdivp %st(6)
# CHECK: fdivp %st, %st(6)
0xde,0xf6
# CHECK: fdivp %st(7)
# CHECK: fdivp %st, %st(7)
0xde,0xf7
# CHECK: fdivrp %st(0)
# CHECK: fdivrp %st, %st(0)
0xde,0xf8
# CHECK: fdivrp %st(1)
# CHECK: fdivrp %st, %st(1)
0xde,0xf9
# CHECK: fdivrp %st(2)
# CHECK: fdivrp %st, %st(2)
0xde,0xfa
# CHECK: fdivrp %st(3)
# CHECK: fdivrp %st, %st(3)
0xde,0xfb
# CHECK: fdivrp %st(4)
# CHECK: fdivrp %st, %st(4)
0xde,0xfc
# CHECK: fdivrp %st(5)
# CHECK: fdivrp %st, %st(5)
0xde,0xfd
# CHECK: fdivrp %st(6)
# CHECK: fdivrp %st, %st(6)
0xde,0xfe
# CHECK: fdivrp %st(7)
# CHECK: fdivrp %st, %st(7)
0xde,0xff
# CHECK: ffreep %st(0)

4
test/MC/Disassembler/X86/x86-16.txt
View File

@ -759,10 +759,10 @@
# CHECK: strl %eax
0x66 0x0f 0x00 0xc8
# CHECK: fsubp %st(1)
# CHECK: fsubp %st, %st(1)
0xde 0xe1
# CHECK: fsubp %st(2)
# CHECK: fsubp %st, %st(2)
0xde 0xe2
# CHECKX: nop

8
test/MC/MachO/file-single.s
View File

@ -1,8 +0,0 @@
// RUN: not llvm-mc -triple i386-apple-darwin9 %s -o /dev/null 2>&1 | FileCheck %s
// Previously this crashed MC.
// CHECK: error: target does not support '.file' without a number
.file "dir/foo"
nop

3
test/MC/MachO/file.s
View File

@ -1,5 +1,8 @@
// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | llvm-readobj -s -section-data | FileCheck %s
// This number-less file directive is ignored on MachO.
.file "bar/baz.s"
.file 1 "dir/foo"
nop

4
test/MC/WebAssembly/external-func-address.ll
View File

@ -8,7 +8,7 @@ target triple = "wasm32-unknown-unknown"
declare void @f0(i32) #0
@ptr_to_f0 = hidden global void (i32)* @f0, align 4
attributes #0 = { "wasm-import-module"="somewhere" }
attributes #0 = { "wasm-import-module"="somewhere" "wasm-import-name"="something" }
declare void @f1(i32) #1
@ptr_to_f1 = hidden global void (i32)* @f1, align 4
@ -47,7 +47,7 @@ define void @call(i32) {
; CHECK-NEXT: Kind: FUNCTION
; CHECK-NEXT: SigIndex: 1
; CHECK: - Module: somewhere
; CHECK-NEXT: Field: f0
; CHECK-NEXT: Field: something
; CHECK: - Module: env
; CHECK-NEXT: Field: f1
; CHECK-NEXT: Kind: FUNCTION

31
test/MC/WebAssembly/import-module.ll Normal file
View File

@ -0,0 +1,31 @@
; RUN: llc -filetype=obj %s -o - | obj2yaml | FileCheck %s
target triple = "wasm32-unknown-unknown"
define void @test() {
call void @foo()
call void @plain()
ret void
}
declare void @foo() #0
declare void @plain()
attributes #0 = { "wasm-import-module"="bar" "wasm-import-name"="qux" }
; CHECK: - Type: IMPORT
; CHECK-NEXT: Imports:
; CHECK: - Module: bar
; CHECK-NEXT: Field: qux
; CHECK-NEXT: Kind: FUNCTION
; CHECK: - Module: env
; CHECK-NEXT: Field: plain
; CHECK-NEXT: Kind: FUNCTION
; CHECK: - Type: CUSTOM
; CHECK: Name: foo
; CHECK-NEXT: Flags: [ UNDEFINED ]
; CHECK: Name: plain
; CHECK-NEXT: Flags: [ UNDEFINED ]

32
test/MC/X86/PPRO-32.s
View File

@ -64,37 +64,37 @@ cmovpl %eax, %eax
// CHECK: encoding: [0x0f,0x48,0xc0]
cmovsl %eax, %eax
// CHECK: fcmovbe %st(4), %st(0)
// CHECK: fcmovbe %st(4), %st
// CHECK: encoding: [0xda,0xd4]
fcmovbe %st(4), %st(0)
fcmovbe %st(4), %st
// CHECK: fcmovb %st(4), %st(0)
// CHECK: fcmovb %st(4), %st
// CHECK: encoding: [0xda,0xc4]
fcmovb %st(4), %st(0)
fcmovb %st(4), %st
// CHECK: fcmove %st(4), %st(0)
// CHECK: fcmove %st(4), %st
// CHECK: encoding: [0xda,0xcc]
fcmove %st(4), %st(0)
fcmove %st(4), %st
// CHECK: fcmovnbe %st(4), %st(0)
// CHECK: fcmovnbe %st(4), %st
// CHECK: encoding: [0xdb,0xd4]
fcmovnbe %st(4), %st(0)
fcmovnbe %st(4), %st
// CHECK: fcmovnb %st(4), %st(0)
// CHECK: fcmovnb %st(4), %st
// CHECK: encoding: [0xdb,0xc4]
fcmovnb %st(4), %st(0)
fcmovnb %st(4), %st
// CHECK: fcmovne %st(4), %st(0)
// CHECK: fcmovne %st(4), %st
// CHECK: encoding: [0xdb,0xcc]
fcmovne %st(4), %st(0)
fcmovne %st(4), %st
// CHECK: fcmovnu %st(4), %st(0)
// CHECK: fcmovnu %st(4), %st
// CHECK: encoding: [0xdb,0xdc]
fcmovnu %st(4), %st(0)
fcmovnu %st(4), %st
// CHECK: fcmovu %st(4), %st(0)
// CHECK: fcmovu %st(4), %st
// CHECK: encoding: [0xda,0xdc]
fcmovu %st(4), %st(0)
fcmovu %st(4), %st
// CHECK: fcomi %st(4)
// CHECK: encoding: [0xdb,0xf4]

32
test/MC/X86/PPRO-64.s
View File

@ -64,37 +64,37 @@ cmovpl %r13d, %r13d
// CHECK: encoding: [0x45,0x0f,0x48,0xed]
cmovsl %r13d, %r13d
// CHECK: fcmovbe %st(4), %st(0)
// CHECK: fcmovbe %st(4), %st
// CHECK: encoding: [0xda,0xd4]
fcmovbe %st(4), %st(0)
fcmovbe %st(4), %st
// CHECK: fcmovb %st(4), %st(0)
// CHECK: fcmovb %st(4), %st
// CHECK: encoding: [0xda,0xc4]
fcmovb %st(4), %st(0)
fcmovb %st(4), %st
// CHECK: fcmove %st(4), %st(0)
// CHECK: fcmove %st(4), %st
// CHECK: encoding: [0xda,0xcc]
fcmove %st(4), %st(0)
fcmove %st(4), %st
// CHECK: fcmovnbe %st(4), %st(0)
// CHECK: fcmovnbe %st(4), %st
// CHECK: encoding: [0xdb,0xd4]
fcmovnbe %st(4), %st(0)
fcmovnbe %st(4), %st
// CHECK: fcmovnb %st(4), %st(0)
// CHECK: fcmovnb %st(4), %st
// CHECK: encoding: [0xdb,0xc4]
fcmovnb %st(4), %st(0)
fcmovnb %st(4), %st
// CHECK: fcmovne %st(4), %st(0)
// CHECK: fcmovne %st(4), %st
// CHECK: encoding: [0xdb,0xcc]
fcmovne %st(4), %st(0)
fcmovne %st(4), %st
// CHECK: fcmovnu %st(4), %st(0)
// CHECK: fcmovnu %st(4), %st
// CHECK: encoding: [0xdb,0xdc]
fcmovnu %st(4), %st(0)
fcmovnu %st(4), %st
// CHECK: fcmovu %st(4), %st(0)
// CHECK: fcmovu %st(4), %st
// CHECK: encoding: [0xda,0xdc]
fcmovu %st(4), %st(0)
fcmovu %st(4), %st
// CHECK: fcomi %st(4)
// CHECK: encoding: [0xdb,0xf4]

48
test/MC/X86/X87-32.s
View File

@ -31,7 +31,7 @@ faddl 64(%edx,%eax)
// CHECK: encoding: [0xdc,0x02]
faddl (%edx)
// CHECK: faddp %st(4)
// CHECK: faddp %st, %st(4)
// CHECK: encoding: [0xde,0xc4]
faddp %st(4)
@ -59,11 +59,11 @@ fadds 64(%edx,%eax)
// CHECK: encoding: [0xd8,0x02]
fadds (%edx)
// CHECK: fadd %st(0), %st(4)
// CHECK: fadd %st, %st(4)
// CHECK: encoding: [0xdc,0xc4]
fadd %st(0), %st(4)
fadd %st, %st(4)
// CHECK: fadd %st(4)
// CHECK: fadd %st(4), %st
// CHECK: encoding: [0xd8,0xc4]
fadd %st(4)
@ -259,7 +259,7 @@ fdivl 64(%edx,%eax)
// CHECK: encoding: [0xdc,0x32]
fdivl (%edx)
// CHECK: fdivp %st(4)
// CHECK: fdivp %st, %st(4)
// CHECK: encoding: [0xde,0xf4]
fdivp %st(4)
@ -287,7 +287,7 @@ fdivrl 64(%edx,%eax)
// CHECK: encoding: [0xdc,0x3a]
fdivrl (%edx)
// CHECK: fdivrp %st(4)
// CHECK: fdivrp %st, %st(4)
// CHECK: encoding: [0xde,0xfc]
fdivrp %st(4)
@ -315,11 +315,11 @@ fdivrs 64(%edx,%eax)
// CHECK: encoding: [0xd8,0x3a]
fdivrs (%edx)
// CHECK: fdivr %st(0), %st(4)
// CHECK: fdivr %st, %st(4)
// CHECK: encoding: [0xdc,0xfc]
fdivr %st(0), %st(4)
fdivr %st, %st(4)
// CHECK: fdivr %st(4)
// CHECK: fdivr %st(4), %st
// CHECK: encoding: [0xd8,0xfc]
fdivr %st(4)
@ -347,11 +347,11 @@ fdivs 64(%edx,%eax)
// CHECK: encoding: [0xd8,0x32]
fdivs (%edx)
// CHECK: fdiv %st(0), %st(4)
// CHECK: fdiv %st, %st(4)
// CHECK: encoding: [0xdc,0xf4]
fdiv %st(0), %st(4)
fdiv %st, %st(4)
// CHECK: fdiv %st(4)
// CHECK: fdiv %st(4), %st
// CHECK: encoding: [0xd8,0xf4]
fdiv %st(4)
@ -1119,7 +1119,7 @@ fmull 64(%edx,%eax)
// CHECK: encoding: [0xdc,0x0a]
fmull (%edx)
// CHECK: fmulp %st(4)
// CHECK: fmulp %st, %st(4)
// CHECK: encoding: [0xde,0xcc]
fmulp %st(4)
@ -1147,11 +1147,11 @@ fmuls 64(%edx,%eax)
// CHECK: encoding: [0xd8,0x0a]
fmuls (%edx)
// CHECK: fmul %st(0), %st(4)
// CHECK: fmul %st, %st(4)
// CHECK: encoding: [0xdc,0xcc]
fmul %st(0), %st(4)
fmul %st, %st(4)
// CHECK: fmul %st(4)
// CHECK: fmul %st(4), %st
// CHECK: encoding: [0xd8,0xcc]
fmul %st(4)
@ -1479,7 +1479,7 @@ fsubl 64(%edx,%eax)
// CHECK: encoding: [0xdc,0x22]
fsubl (%edx)
// CHECK: fsubp %st(4)
// CHECK: fsubp %st, %st(4)
// CHECK: encoding: [0xde,0xe4]
fsubp %st(4)
@ -1507,7 +1507,7 @@ fsubrl 64(%edx,%eax)
// CHECK: encoding: [0xdc,0x2a]
fsubrl (%edx)
// CHECK: fsubrp %st(4)
// CHECK: fsubrp %st, %st(4)
// CHECK: encoding: [0xde,0xec]
fsubrp %st(4)
@ -1535,11 +1535,11 @@ fsubrs 64(%edx,%eax)
// CHECK: encoding: [0xd8,0x2a]
fsubrs (%edx)
// CHECK: fsubr %st(0), %st(4)
// CHECK: fsubr %st, %st(4)
// CHECK: encoding: [0xdc,0xec]
fsubr %st(0), %st(4)
fsubr %st, %st(4)
// CHECK: fsubr %st(4)
// CHECK: fsubr %st(4), %st
// CHECK: encoding: [0xd8,0xec]
fsubr %st(4)
@ -1567,11 +1567,11 @@ fsubs 64(%edx,%eax)
// CHECK: encoding: [0xd8,0x22]
fsubs (%edx)
// CHECK: fsub %st(0), %st(4)
// CHECK: fsub %st, %st(4)
// CHECK: encoding: [0xdc,0xe4]
fsub %st(0), %st(4)
fsub %st, %st(4)
// CHECK: fsub %st(4)
// CHECK: fsub %st(4), %st
// CHECK: encoding: [0xd8,0xe4]
fsub %st(4)

46
test/MC/X86/X87-64.s
View File

@ -31,7 +31,7 @@ faddl 64(%rdx,%rax)
// CHECK: encoding: [0xdc,0x02]
faddl (%rdx)
// CHECK: faddp %st(4)
// CHECK: faddp %st, %st(4)
// CHECK: encoding: [0xde,0xc4]
faddp %st(4)
@ -59,11 +59,11 @@ fadds 64(%rdx,%rax)
// CHECK: encoding: [0xd8,0x02]
fadds (%rdx)
// CHECK: fadd %st(0), %st(4)
// CHECK: fadd %st, %st(4)
// CHECK: encoding: [0xdc,0xc4]
fadd %st(0), %st(4)
fadd %st, %st(4)
// CHECK: fadd %st(4)
// CHECK: fadd %st(4), %st
// CHECK: encoding: [0xd8,0xc4]
fadd %st(4)
@ -259,7 +259,7 @@ fdivl 64(%rdx,%rax)
// CHECK: encoding: [0xdc,0x32]
fdivl (%rdx)
// CHECK: fdivp %st(4)
// CHECK: fdivp %st, %st(4)
// CHECK: encoding: [0xde,0xf4]
fdivp %st(4)
@ -287,7 +287,7 @@ fdivrl 64(%rdx,%rax)
// CHECK: encoding: [0xdc,0x3a]
fdivrl (%rdx)
// CHECK: fdivrp %st(4)
// CHECK: fdivrp %st, %st(4)
// CHECK: encoding: [0xde,0xfc]
fdivrp %st(4)
@ -315,11 +315,11 @@ fdivrs 64(%rdx,%rax)
// CHECK: encoding: [0xd8,0x3a]
fdivrs (%rdx)
// CHECK: fdivr %st(0), %st(4)
// CHECK: fdivr %st, %st(4)
// CHECK: encoding: [0xdc,0xfc]
fdivr %st(0), %st(4)
fdivr %st, %st(4)
// CHECK: fdivr %st(4)
// CHECK: fdivr %st(4), %st
// CHECK: encoding: [0xd8,0xfc]
fdivr %st(4)
@ -347,11 +347,11 @@ fdivs 64(%rdx,%rax)
// CHECK: encoding: [0xd8,0x32]
fdivs (%rdx)
// CHECK: fdiv %st(0), %st(4)
// CHECK: fdiv %st, %st(4)
// CHECK: encoding: [0xdc,0xf4]
fdiv %st(0), %st(4)
fdiv %st, %st(4)
// CHECK: fdiv %st(4)
// CHECK: fdiv %st(4), %st
// CHECK: encoding: [0xd8,0xf4]
fdiv %st(4)
@ -1119,7 +1119,7 @@ fmull 64(%rdx,%rax)
// CHECK: encoding: [0xdc,0x0a]
fmull (%rdx)
// CHECK: fmulp %st(4)
// CHECK: fmulp %st, %st(4)
// CHECK: encoding: [0xde,0xcc]
fmulp %st(4)
@ -1147,9 +1147,9 @@ fmuls 64(%rdx,%rax)
// CHECK: encoding: [0xd8,0x0a]
fmuls (%rdx)
// CHECK: fmul %st(0), %st(4)
// CHECK: fmul %st, %st(4)
// CHECK: encoding: [0xdc,0xcc]
fmul %st(0), %st(4)
fmul %st, %st(4)
// CHECK: fmul %st(4)
// CHECK: encoding: [0xd8,0xcc]
@ -1479,7 +1479,7 @@ fsubl 64(%rdx,%rax)
// CHECK: encoding: [0xdc,0x22]
fsubl (%rdx)
// CHECK: fsubp %st(4)
// CHECK: fsubp %st, %st(4)
// CHECK: encoding: [0xde,0xe4]
fsubp %st(4)
@ -1507,7 +1507,7 @@ fsubrl 64(%rdx,%rax)
// CHECK: encoding: [0xdc,0x2a]
fsubrl (%rdx)
// CHECK: fsubrp %st(4)
// CHECK: fsubrp %st, %st(4)
// CHECK: encoding: [0xde,0xec]
fsubrp %st(4)
@ -1535,11 +1535,11 @@ fsubrs 64(%rdx,%rax)
// CHECK: encoding: [0xd8,0x2a]
fsubrs (%rdx)
// CHECK: fsubr %st(0), %st(4)
// CHECK: fsubr %st, %st(4)
// CHECK: encoding: [0xdc,0xec]
fsubr %st(0), %st(4)
fsubr %st, %st(4)
// CHECK: fsubr %st(4)
// CHECK: fsubr %st(4), %st
// CHECK: encoding: [0xd8,0xec]
fsubr %st(4)
@ -1567,11 +1567,11 @@ fsubs 64(%rdx,%rax)
// CHECK: encoding: [0xd8,0x22]
fsubs (%rdx)
// CHECK: fsub %st(0), %st(4)
// CHECK: fsub %st, %st(4)
// CHECK: encoding: [0xdc,0xe4]
fsub %st(0), %st(4)
fsub %st, %st(4)
// CHECK: fsub %st(4)
// CHECK: fsub %st(4), %st
// CHECK: encoding: [0xd8,0xe4]
fsub %st(4)

12
test/MC/X86/intel-syntax-2.s
View File

@ -18,14 +18,14 @@ _test2:
_test3:
fadd
// CHECK: faddp %st(1)
// CHECK: faddp %st, %st(1)
fmul
// CHECK: fmulp %st(1)
// CHECK: fmulp %st, %st(1)
fsub
// CHECK: fsubp %st(1)
// CHECK: fsubp %st, %st(1)
fsubr
// CHECK: fsubrp %st(1)
// CHECK: fsubrp %st, %st(1)
fdiv
// CHECK: fdivp %st(1)
// CHECK: fdivp %st, %st(1)
fdivr
// CHECK: fdivrp %st(1)
// CHECK: fdivrp %st, %st(1)

96
test/MC/X86/intel-syntax.s
View File

@ -556,12 +556,12 @@ fnstsw
fnstsw AX
fnstsw WORD PTR [EAX]
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fdivrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
faddp ST(1), ST(0)
fmulp ST(1), ST(0)
fsubp ST(1), ST(0)
@ -569,12 +569,12 @@ fsubrp ST(1), ST(0)
fdivp ST(1), ST(0)
fdivrp ST(1), ST(0)
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fdivrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
faddp ST(0), ST(1)
fmulp ST(0), ST(1)
fsubp ST(0), ST(1)
@ -582,12 +582,12 @@ fsubrp ST(0), ST(1)
fdivp ST(0), ST(1)
fdivrp ST(0), ST(1)
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fdivrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
faddp ST(1)
fmulp ST(1)
fsubp ST(1)
@ -596,12 +596,12 @@ fdivp ST(1)
fdivrp ST(1)
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fdivrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
fadd
fmul
fsub
@ -609,12 +609,12 @@ fsubr
fdiv
fdivr
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fdivrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
faddp
fmulp
fsubp
@ -622,12 +622,12 @@ fsubrp
fdivp
fdivrp
// CHECK: fadd %st(1)
// CHECK: fmul %st(1)
// CHECK: fsub %st(1)
// CHECK: fsubr %st(1)
// CHECK: fdiv %st(1)
// CHECK: fdivr %st(1)
// CHECK: fadd %st(1), %st
// CHECK: fmul %st(1), %st
// CHECK: fsub %st(1), %st
// CHECK: fsubr %st(1), %st
// CHECK: fdiv %st(1), %st
// CHECK: fdivr %st(1), %st
fadd ST(0), ST(1)
fmul ST(0), ST(1)
fsub ST(0), ST(1)
@ -635,12 +635,12 @@ fsubr ST(0), ST(1)
fdiv ST(0), ST(1)
fdivr ST(0), ST(1)
// CHECK: fadd %st(0), %st(1)
// CHECK: fmul %st(0), %st(1)
// CHECK: fsubr %st(0), %st(1)
// CHECK: fsub %st(0), %st(1)
// CHECK: fdivr %st(0), %st(1)
// CHECK: fdiv %st(0), %st(1)
// CHECK: fadd %st, %st(1)
// CHECK: fmul %st, %st(1)
// CHECK: fsubr %st, %st(1)
// CHECK: fsub %st, %st(1)
// CHECK: fdivr %st, %st(1)
// CHECK: fdiv %st, %st(1)
fadd ST(1), ST(0)
fmul ST(1), ST(0)
fsub ST(1), ST(0)
@ -648,12 +648,12 @@ fsubr ST(1), ST(0)
fdiv ST(1), ST(0)
fdivr ST(1), ST(0)
// CHECK: fadd %st(1)
// CHECK: fmul %st(1)
// CHECK: fsub %st(1)
// CHECK: fsubr %st(1)
// CHECK: fdiv %st(1)
// CHECK: fdivr %st(1)
// CHECK: fadd %st(1), %st
// CHECK: fmul %st(1), %st
// CHECK: fsub %st(1), %st
// CHECK: fsubr %st(1), %st
// CHECK: fdiv %st(1), %st
// CHECK: fdivr %st(1), %st
fadd ST(1)
fmul ST(1)
fsub ST(1)

4
test/MC/X86/x86-16.s
View File

@ -920,11 +920,11 @@ pshufw $90, %mm4, %mm0
str %eax
// CHECK: fsubp
// CHECK: fsubp %st, %st(1)
// CHECK: encoding: [0xde,0xe1]
fsubp %st,%st(1)
// CHECK: fsubp %st(2)
// CHECK: fsubp %st, %st(2)
// CHECK: encoding: [0xde,0xe2]
fsubp %st, %st(2)

38
test/MC/X86/x86-32-coverage.s
View File

@ -2472,11 +2472,11 @@
// CHECK: encoding: [0xda,0x05,0x78,0x56,0x34,0x12]
fiaddl 0x12345678
// CHECK: faddp %st(2)
// CHECK: faddp %st, %st(2)
// CHECK: encoding: [0xde,0xc2]
faddp %st(2)
// CHECK: fsub %st(2)
// CHECK: fsub %st(2), %st
// CHECK: encoding: [0xd8,0xe2]
fsub %st(2)
@ -2504,11 +2504,11 @@
// CHECK: encoding: [0xda,0x25,0x78,0x56,0x34,0x12]
fisubl 0x12345678
// CHECK: fsubp %st(2)
// CHECK: fsubp %st, %st(2)
// CHECK: encoding: [0xde,0xe2]
fsubp %st(2)
// CHECK: fsubr %st(2)
// CHECK: fsubr %st(2), %st
// CHECK: encoding: [0xd8,0xea]
fsubr %st(2)
@ -2536,11 +2536,11 @@
// CHECK: encoding: [0xda,0x2d,0x78,0x56,0x34,0x12]
fisubrl 0x12345678
// CHECK: fsubrp %st(2)
// CHECK: fsubrp %st, %st(2)
// CHECK: encoding: [0xde,0xea]
fsubrp %st(2)
// CHECK: fmul %st(2)
// CHECK: fmul %st(2), %st
// CHECK: encoding: [0xd8,0xca]
fmul %st(2)
@ -2568,11 +2568,11 @@
// CHECK: encoding: [0xda,0x0d,0x78,0x56,0x34,0x12]
fimull 0x12345678
// CHECK: fmulp %st(2)
// CHECK: fmulp %st, %st(2)
// CHECK: encoding: [0xde,0xca]
fmulp %st(2)
// CHECK: fdiv %st(2)
// CHECK: fdiv %st(2), %st
// CHECK: encoding: [0xd8,0xf2]
fdiv %st(2)
@ -2600,11 +2600,11 @@
// CHECK: encoding: [0xda,0x35,0x78,0x56,0x34,0x12]
fidivl 0x12345678
// CHECK: fdivp %st(2)
// CHECK: fdivp %st, %st(2)
// CHECK: encoding: [0xde,0xf2]
fdivp %st(2)
// CHECK: fdivr %st(2)
// CHECK: fdivr %st(2), %st
// CHECK: encoding: [0xd8,0xfa]
fdivr %st(2)
@ -2632,7 +2632,7 @@
// CHECK: encoding: [0xda,0x3d,0x78,0x56,0x34,0x12]
fidivrl 0x12345678
// CHECK: fdivrp %st(2)
// CHECK: fdivrp %st, %st(2)
// CHECK: encoding: [0xde,0xfa]
fdivrp %st(2)
@ -2876,35 +2876,35 @@
// CHECK: encoding: [0x0f,0x0b]
ud2
// CHECK: fcmovb %st(2), %st(0)
// CHECK: fcmovb %st(2), %st
// CHECK: encoding: [0xda,0xc2]
fcmovb %st(2),%st
// CHECK: fcmove %st(2), %st(0)
// CHECK: fcmove %st(2), %st
// CHECK: encoding: [0xda,0xca]
fcmove %st(2),%st
// CHECK: fcmovbe %st(2), %st(0)
// CHECK: fcmovbe %st(2), %st
// CHECK: encoding: [0xda,0xd2]
fcmovbe %st(2),%st
// CHECK: fcmovu %st(2), %st(0)
// CHECK: fcmovu %st(2), %st
// CHECK: encoding: [0xda,0xda]
fcmovu %st(2),%st
// CHECK: fcmovnb %st(2), %st(0)
// CHECK: fcmovnb %st(2), %st
// CHECK: encoding: [0xdb,0xc2]
fcmovnb %st(2),%st
// CHECK: fcmovne %st(2), %st(0)
// CHECK: fcmovne %st(2), %st
// CHECK: encoding: [0xdb,0xca]
fcmovne %st(2),%st
// CHECK: fcmovnbe %st(2), %st(0)
// CHECK: fcmovnbe %st(2), %st
// CHECK: encoding: [0xdb,0xd2]
fcmovnbe %st(2),%st
// CHECK: fcmovnu %st(2), %st(0)
// CHECK: fcmovnu %st(2), %st
// CHECK: encoding: [0xdb,0xda]
fcmovnu %st(2),%st

2
test/MC/X86/x86-32.s
View File

@ -1055,7 +1055,7 @@ pshufw $90, %mm4, %mm0
fsubp %st,%st(1)
// PR9164
// CHECK: fsubp %st(2)
// CHECK: fsubp %st, %st(2)
// CHECK: encoding: [0xde,0xe2]
fsubp %st, %st(2)

166
test/MC/X86/x86-64.s
View File

@ -307,13 +307,13 @@ insl (%dx), %es:(%rdi)
// CHECK: fxch %st(1)
// CHECK: fucom %st(1)
// CHECK: fucomp %st(1)
// CHECK: faddp %st(1)
// CHECK: faddp %st(0)
// CHECK: fsubp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fdivp %st(1)
// CHECK: fdivrp %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: faddp %st, %st(0)
// CHECK: fsubp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fdivp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
fxch
fucom
@ -416,21 +416,21 @@ enter $0x7ace,$0x7f
mov %cs, %ax
// rdar://8456391
fcmovb %st(1), %st(0) // CHECK: fcmovb %st(1), %st(0)
fcmove %st(1), %st(0) // CHECK: fcmove %st(1), %st(0)
fcmovbe %st(1), %st(0) // CHECK: fcmovbe %st(1), %st(0)
fcmovu %st(1), %st(0) // CHECK: fcmovu %st(1), %st(0)
fcmovb %st(1), %st // CHECK: fcmovb %st(1), %st
fcmove %st(1), %st // CHECK: fcmove %st(1), %st
fcmovbe %st(1), %st // CHECK: fcmovbe %st(1), %st
fcmovu %st(1), %st // CHECK: fcmovu %st(1), %st
fcmovnb %st(1), %st(0) // CHECK: fcmovnb %st(1), %st(0)
fcmovne %st(1), %st(0) // CHECK: fcmovne %st(1), %st(0)
fcmovnbe %st(1), %st(0) // CHECK: fcmovnbe %st(1), %st(0)
fcmovnu %st(1), %st(0) // CHECK: fcmovnu %st(1), %st(0)
fcmovnb %st(1), %st // CHECK: fcmovnb %st(1), %st
fcmovne %st(1), %st // CHECK: fcmovne %st(1), %st
fcmovnbe %st(1), %st // CHECK: fcmovnbe %st(1), %st
fcmovnu %st(1), %st // CHECK: fcmovnu %st(1), %st
fcmovnae %st(1), %st(0) // CHECK: fcmovb %st(1), %st(0)
fcmovna %st(1), %st(0) // CHECK: fcmovbe %st(1), %st(0)
fcmovnae %st(1), %st // CHECK: fcmovb %st(1), %st
fcmovna %st(1), %st // CHECK: fcmovbe %st(1), %st
fcmovae %st(1), %st(0) // CHECK: fcmovnb %st(1), %st(0)
fcmova %st(1), %st(0) // CHECK: fcmovnbe %st(1), %st(0)
fcmovae %st(1), %st // CHECK: fcmovnb %st(1), %st
fcmova %st(1), %st // CHECK: fcmovnbe %st(1), %st
// rdar://8456417
.byte (88 + 1) & 15 // CHECK: .byte 9
@ -456,20 +456,20 @@ mov %rdx, %db15
// CHECK: encoding: [0x44,0x0f,0x23,0xfa]
// rdar://8456371 - Handle commutable instructions written backward.
// CHECK: faddp %st(1)
// CHECK: fmulp %st(2)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(2)
faddp %st, %st(1)
fmulp %st, %st(2)
// rdar://8468087 - Encode these accurately, they are not synonyms.
// CHECK: fmul %st(0), %st(1)
// CHECK: fmul %st, %st(1)
// CHECK: encoding: [0xdc,0xc9]
// CHECK: fmul %st(1)
// CHECK: encoding: [0xd8,0xc9]
fmul %st, %st(1)
fmul %st(1), %st
// CHECK: fadd %st(0), %st(1)
// CHECK: fadd %st, %st(1)
// CHECK: encoding: [0xdc,0xc1]
// CHECK: fadd %st(1)
// CHECK: encoding: [0xd8,0xc1]
@ -582,15 +582,15 @@ movmskpd %xmm6, %eax
// CHECK: encoding: [0x66,0x0f,0x50,0xc6]
// rdar://8491845 - Gas supports commuted forms of non-commutable instructions.
fdivrp %st(0), %st(1) // CHECK: encoding: [0xde,0xf9]
fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9]
fdivrp %st, %st(1) // CHECK: encoding: [0xde,0xf9]
fdivrp %st(1), %st // CHECK: encoding: [0xde,0xf9]
fsubrp %st(0), %st(1) // CHECK: encoding: [0xde,0xe9]
fsubrp %st(1), %st(0) // CHECK: encoding: [0xde,0xe9]
fsubrp %st, %st(1) // CHECK: encoding: [0xde,0xe9]
fsubrp %st(1), %st // CHECK: encoding: [0xde,0xe9]
// also PR8861
fdivp %st(0), %st(1) // CHECK: encoding: [0xde,0xf1]
fdivp %st(1), %st(0) // CHECK: encoding: [0xde,0xf1]
fdivp %st, %st(1) // CHECK: encoding: [0xde,0xf1]
fdivp %st(1), %st // CHECK: encoding: [0xde,0xf1]
movl foo(%rip), %eax
@ -1391,38 +1391,38 @@ clac
// CHECK: encoding: [0x0f,0x01,0xcb]
stac
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: fdivrp %st(1)
faddp %st(0), %st(1)
fmulp %st(0), %st(1)
fsubp %st(0), %st(1)
fsubrp %st(0), %st(1)
fdivp %st(0), %st(1)
fdivrp %st(0), %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
faddp %st, %st(1)
fmulp %st, %st(1)
fsubp %st, %st(1)
fsubrp %st, %st(1)
fdivp %st, %st(1)
fdivrp %st, %st(1)
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: fdivrp %st(1)
faddp %st(1), %st(0)
fmulp %st(1), %st(0)
fsubp %st(1), %st(0)
fsubrp %st(1), %st(0)
fdivp %st(1), %st(0)
fdivrp %st(1), %st(0)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
faddp %st(1), %st
fmulp %st(1), %st
fsubp %st(1), %st
fsubrp %st(1), %st
fdivp %st(1), %st
fdivrp %st(1), %st
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: fdivrp %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
faddp %st(1)
fmulp %st(1)
fsubp %st(1)
@ -1430,12 +1430,12 @@ fsubrp %st(1)
fdivp %st(1)
fdivrp %st(1)
// CHECK: faddp %st(1)
// CHECK: fmulp %st(1)
// CHECK: fsubp %st(1)
// CHECK: fsubrp %st(1)
// CHECK: fdivp %st(1)
// CHECK: fdivrp %st(1)
// CHECK: faddp %st, %st(1)
// CHECK: fmulp %st, %st(1)
// CHECK: fsubp %st, %st(1)
// CHECK: fsubrp %st, %st(1)
// CHECK: fdivp %st, %st(1)
// CHECK: fdivrp %st, %st(1)
faddp
fmulp
fsubp
@ -1449,25 +1449,25 @@ fdivrp
// CHECK: fsubr %st(1)
// CHECK: fdiv %st(1)
// CHECK: fdivr %st(1)
fadd %st(1), %st(0)
fmul %st(1), %st(0)
fsub %st(1), %st(0)
fsubr %st(1), %st(0)
fdiv %st(1), %st(0)
fdivr %st(1), %st(0)
fadd %st(1), %st
fmul %st(1), %st
fsub %st(1), %st
fsubr %st(1), %st
fdiv %st(1), %st
fdivr %st(1), %st
// CHECK: fadd %st(0), %st(1)
// CHECK: fmul %st(0), %st(1)
// CHECK: fsub %st(0), %st(1)
// CHECK: fsubr %st(0), %st(1)
// CHECK: fdiv %st(0), %st(1)
// CHECK: fdivr %st(0), %st(1)
fadd %st(0), %st(1)
fmul %st(0), %st(1)
fsub %st(0), %st(1)
fsubr %st(0), %st(1)
fdiv %st(0), %st(1)
fdivr %st(0), %st(1)
// CHECK: fadd %st, %st(1)
// CHECK: fmul %st, %st(1)
// CHECK: fsub %st, %st(1)
// CHECK: fsubr %st, %st(1)
// CHECK: fdiv %st, %st(1)
// CHECK: fdivr %st, %st(1)
fadd %st, %st(1)
fmul %st, %st(1)
fsub %st, %st(1)
fsubr %st, %st(1)
fdiv %st, %st(1)
fdivr %st, %st(1)
// CHECK: fadd %st(1)
// CHECK: fmul %st(1)

128
test/Transforms/InstCombine/double-float-shrink-1.ll
View File

@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; RUN: opt < %s -instcombine -S -mtriple x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=CHECK,LINUX,ISC99
; RUN: opt < %s -instcombine -S -mtriple x86_64-pc-win32 | FileCheck %s --check-prefixes=CHECK,ISC99
; RUN: opt < %s -instcombine -S -mtriple x86_64-pc-windows-msvc16 | FileCheck %s --check-prefixes=CHECK,MS64,ISC89
; RUN: opt < %s -instcombine -S -mtriple i386-pc-windows-msvc | FileCheck %s --check-prefixes=CHECK,ISC99
; RUN: opt < %s -instcombine -S -mtriple i686-pc-windows-msvc17 | FileCheck %s --check-prefixes=CHECK,MS32,ISC89
; Check for and against shrinkage when using the
; unsafe-fp-math function attribute on a math lib
@ -12,8 +12,10 @@ target triple = "x86_64-unknown-linux-gnu"
define float @acos_test1(float %f) {
; CHECK-LABEL: @acos_test1(
; CHECK-NEXT: [[ACOSF:%.*]] = call fast float @acosf(float [[F:%.*]])
; CHECK-NEXT: ret float [[ACOSF]]
; LINUX-NEXT: [[ACOSF:%.*]] = call fast float @acosf(float [[F:%.*]])
; LINUX-NEXT: ret float [[ACOSF]]
; MS32: [[ACOSF:%.*]] = call fast double @acos(double [[F:%.*]])
; MS64-NEXT: [[ACOSF:%.*]] = call fast float @acosf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @acos(double %conv)
@ -34,8 +36,9 @@ define double @acos_test2(float %f) {
define float @acosh_test1(float %f) {
; CHECK-LABEL: @acosh_test1(
; CHECK-NEXT: [[ACOSHF:%.*]] = call fast float @acoshf(float [[F:%.*]])
; CHECK-NEXT: ret float [[ACOSHF]]
; ISC99-NEXT: [[ACOSHF:%.*]] = call fast float @acoshf(float [[F:%.*]])
; ISC99-NEXT: ret float [[ACOSHF]]
; ISC89: [[ACOSHF:%.*]] = call fast double @acosh(double [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @acosh(double %conv)
@ -56,8 +59,10 @@ define double @acosh_test2(float %f) {
define float @asin_test1(float %f) {
; CHECK-LABEL: @asin_test1(
; CHECK-NEXT: [[ASINF:%.*]] = call fast float @asinf(float [[F:%.*]])
; CHECK-NEXT: ret float [[ASINF]]
; LINUX-NEXT: [[ASINF:%.*]] = call fast float @asinf(float [[F:%.*]])
; LINUX-NEXT: ret float [[ASINF]]
; MS32: [[ASINF:%.*]] = call fast double @asin(double [[F:%.*]])
; MS64-NEXT: [[ASINF:%.*]] = call fast float @asinf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @asin(double %conv)
@ -78,8 +83,9 @@ define double @asin_test2(float %f) {
define float @asinh_test1(float %f) {
; CHECK-LABEL: @asinh_test1(
; CHECK-NEXT: [[ASINHF:%.*]] = call fast float @asinhf(float [[F:%.*]])
; CHECK-NEXT: ret float [[ASINHF]]
; ISC99-NEXT: [[ASINHF:%.*]] = call fast float @asinhf(float [[F:%.*]])
; ISC99-NEXT: ret float [[ASINHF]]
; ISC89: [[ASINHF:%.*]] = call fast double @asinh(double [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @asinh(double %conv)
@ -100,8 +106,10 @@ define double @asinh_test2(float %f) {
define float @atan_test1(float %f) {
; CHECK-LABEL: @atan_test1(
; CHECK-NEXT: [[ATANF:%.*]] = call fast float @atanf(float [[F:%.*]])
; CHECK-NEXT: ret float [[ATANF]]
; LINUX-NEXT: [[ATANF:%.*]] = call fast float @atanf(float [[F:%.*]])
; LINUX-NEXT: ret float [[ATANF]]
; MS32: [[ATANF:%.*]] = call fast double @atan(double [[F:%.*]])
; MS64-NEXT: [[ATANF:%.*]] = call fast float @atanf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @atan(double %conv)
@ -122,8 +130,9 @@ define double @atan_test2(float %f) {
define float @atanh_test1(float %f) {
; CHECK-LABEL: @atanh_test1(
; CHECK-NEXT: [[ATANHF:%.*]] = call fast float @atanhf(float [[F:%.*]])
; CHECK-NEXT: ret float [[ATANHF]]
; ISC99-NEXT: [[ATANHF:%.*]] = call fast float @atanhf(float [[F:%.*]])
; ISC99-NEXT: ret float [[ATANHF]]
; ISC89: [[ATANHF:%.*]] = call fast double @atanh(double [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @atanh(double %conv)
@ -144,8 +153,9 @@ define double @atanh_test2(float %f) {
define float @cbrt_test1(float %f) {
; CHECK-LABEL: @cbrt_test1(
; CHECK-NEXT: [[CBRTF:%.*]] = call fast float @cbrtf(float [[F:%.*]])
; CHECK-NEXT: ret float [[CBRTF]]
; ISC99-NEXT: [[CBRTF:%.*]] = call fast float @cbrtf(float [[F:%.*]])
; ISC99-NEXT: ret float [[CBRTF]]
; ISC89: [[CBRTF:%.*]] = call fast double @cbrt(double [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @cbrt(double %conv)
@ -166,8 +176,10 @@ define double @cbrt_test2(float %f) {
define float @exp_test1(float %f) {
; CHECK-LABEL: @exp_test1(
; CHECK-NEXT: [[EXPF:%.*]] = call fast float @expf(float [[F:%.*]])
; CHECK-NEXT: ret float [[EXPF]]
; LINUX-NEXT: [[EXPF:%.*]] = call fast float @expf(float [[F:%.*]])
; LINUX-NEXT: ret float [[EXPF]]
; MS32: [[EXPF:%.*]] = call fast double @exp(double [[F:%.*]])
; MS64-NEXT: [[EXPF:%.*]] = call fast float @expf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @exp(double %conv)
@ -188,8 +200,9 @@ define double @exp_test2(float %f) {
define float @expm1_test1(float %f) {
; CHECK-LABEL: @expm1_test1(
; CHECK-NEXT: [[EXPM1F:%.*]] = call fast float @expm1f(float [[F:%.*]])
; CHECK-NEXT: ret float [[EXPM1F]]
; ISC99-NEXT: [[EXPM1F:%.*]] = call fast float @expm1f(float [[F:%.*]])
; ISC99-NEXT: ret float [[EXPM1F]]
; ISC89: [[EXPM1F:%.*]] = call fast double @expm1(double [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @expm1(double %conv)
@ -236,8 +249,10 @@ define double @exp10_test2(float %f) {
define float @log_test1(float %f) {
; CHECK-LABEL: @log_test1(
; CHECK-NEXT: [[LOGF:%.*]] = call fast float @logf(float [[F:%.*]])
; CHECK-NEXT: ret float [[LOGF]]
; LINUX-NEXT: [[LOGF:%.*]] = call fast float @logf(float [[F:%.*]])
; LINUX-NEXT: ret float [[LOGF]]
; MS32: [[LOGF:%.*]] = call fast double @log(double [[F:%.*]])
; MS64-NEXT: [[LOGF:%.*]] = call fast float @logf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @log(double %conv)
@ -258,8 +273,10 @@ define double @log_test2(float %f) {
define float @log10_test1(float %f) {
; CHECK-LABEL: @log10_test1(
; CHECK-NEXT: [[LOG10F:%.*]] = call fast float @log10f(float [[F:%.*]])
; CHECK-NEXT: ret float [[LOG10F]]
; LINUX-NEXT: [[LOG10F:%.*]] = call fast float @log10f(float [[F:%.*]])
; LINUX-NEXT: ret float [[LOG10F]]
; MS32: [[LOG10F:%.*]] = call fast double @log10(double [[F:%.*]])
; MS64-NEXT: [[LOG10F:%.*]] = call fast float @log10f(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @log10(double %conv)
@ -280,8 +297,9 @@ define double @log10_test2(float %f) {
define float @log1p_test1(float %f) {
; CHECK-LABEL: @log1p_test1(
; CHECK-NEXT: [[LOG1PF:%.*]] = call fast float @log1pf(float [[F:%.*]])
; CHECK-NEXT: ret float [[LOG1PF]]
; ISC99-NEXT: [[LOG1PF:%.*]] = call fast float @log1pf(float [[F:%.*]])
; ISC99-NEXT: ret float [[LOG1PF]]
; ISC89: [[LOG1PF:%.*]] = call fast double @log1p(double [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @log1p(double %conv)
@ -302,8 +320,9 @@ define double @log1p_test2(float %f) {
define float @log2_test1(float %f) {
; CHECK-LABEL: @log2_test1(
; CHECK-NEXT: [[LOG2F:%.*]] = call fast float @log2f(float [[F:%.*]])
; CHECK-NEXT: ret float [[LOG2F]]
; ISC99-NEXT: [[LOG2F:%.*]] = call fast float @log2f(float [[F:%.*]])
; ISC99-NEXT: ret float [[LOG2F]]
; ISC89: [[LOG2F:%.*]] = call fast double @log2(double [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @log2(double %conv)
@ -324,8 +343,10 @@ define double @log2_test2(float %f) {
define float @logb_test1(float %f) {
; CHECK-LABEL: @logb_test1(
; CHECK-NEXT: [[LOGBF:%.*]] = call fast float @logbf(float [[F:%.*]])
; CHECK-NEXT: ret float [[LOGBF]]
; LINUX-NEXT: [[LOGBF:%.*]] = call fast float @logbf(float [[F:%.*]])
; LINUX-NEXT: ret float [[LOGBF]]
; MS32: [[POWF:%.*]] = call fast double @logb(double [[F:%.*]])
; MS64-NEXT: [[LOGBF:%.*]] = call fast float @logbf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @logb(double %conv)
@ -346,8 +367,10 @@ define double @logb_test2(float %f) {
define float @pow_test1(float %f, float %g) {
; CHECK-LABEL: @pow_test1(
; CHECK-NEXT: [[POWF:%.*]] = call fast float @powf(float %f, float %g)
; CHECK-NEXT: ret float [[POWF]]
; LINUX-NEXT: [[POWF:%.*]] = call fast float @powf(float %f, float %g)
; LINUX-NEXT: ret float [[POWF]]
; MS32: [[POWF:%.*]] = call fast double @pow(double %df, double %dg)
; MS64-NEXT: [[POWF:%.*]] = call fast float @powf(float %f, float %g)
;
%df = fpext float %f to double
%dg = fpext float %g to double
@ -369,8 +392,10 @@ define double @pow_test2(float %f, float %g) {
define float @sin_test1(float %f) {
; CHECK-LABEL: @sin_test1(
; CHECK-NEXT: [[SINF:%.*]] = call fast float @sinf(float [[F:%.*]])
; CHECK-NEXT: ret float [[SINF]]
; LINUX-NEXT: [[SINF:%.*]] = call fast float @sinf(float [[F:%.*]])
; LINUX-NEXT: ret float [[SINF]]
; MS32: [[SINF:%.*]] = call fast double @sin(double [[F:%.*]])
; MS64-NEXT: [[SINF:%.*]] = call fast float @sinf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @sin(double %conv)
@ -391,8 +416,10 @@ define double @sin_test2(float %f) {
define float @sqrt_test1(float %f) {
; CHECK-LABEL: @sqrt_test1(
; CHECK-NEXT: [[SQRTF:%.*]] = call float @sqrtf(float [[F:%.*]])
; CHECK-NEXT: ret float [[SQRTF]]
; LINUX-NEXT: [[SQRTF:%.*]] = call float @sqrtf(float [[F:%.*]])
; LINUX-NEXT: ret float [[SQRTF]]
; MS32: [[SQRTF:%.*]] = call double @sqrt(double [[F:%.*]])
; MS64-NEXT: [[SQRTF:%.*]] = call float @sqrtf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call double @sqrt(double %conv)
@ -413,8 +440,10 @@ define double @sqrt_test2(float %f) {
define float @sqrt_int_test1(float %f) {
; CHECK-LABEL: @sqrt_int_test1(
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.sqrt.f32(float [[F:%.*]])
; CHECK-NEXT: ret float [[TMP1]]
; LINUX-NEXT: [[TMP1:%.*]] = call float @llvm.sqrt.f32(float [[F:%.*]])
; LINUX-NEXT: ret float [[TMP1]]
; MS32: [[TMP1:%.*]] = call double @llvm.sqrt.f64(double [[F:%.*]])
; MS64-NEXT: [[TMP1:%.*]] = call float @llvm.sqrt.f32(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call double @llvm.sqrt.f64(double %conv)
@ -435,8 +464,10 @@ define double @sqrt_int_test2(float %f) {
define float @tan_test1(float %f) {
; CHECK-LABEL: @tan_test1(
; CHECK-NEXT: [[TANF:%.*]] = call fast float @tanf(float [[F:%.*]])
; CHECK-NEXT: ret float [[TANF]]
; LINUX-NEXT: [[TANF:%.*]] = call fast float @tanf(float [[F:%.*]])
; LINUX-NEXT: ret float [[TANF]]
; MS32: [[TANF:%.*]] = call fast double @tan(double [[F:%.*]])
; MS64-NEXT: [[TANF:%.*]] = call fast float @tanf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @tan(double %conv)
@ -456,8 +487,10 @@ define double @tan_test2(float %f) {
}
define float @tanh_test1(float %f) {
; CHECK-LABEL: @tanh_test1(
; CHECK-NEXT: [[TANHF:%.*]] = call fast float @tanhf(float [[F:%.*]])
; CHECK-NEXT: ret float [[TANHF]]
; LINUX-NEXT: [[TANHF:%.*]] = call fast float @tanhf(float [[F:%.*]])
; LINUX-NEXT: ret float [[TANHF]]
; MS32: [[TANHF:%.*]] = call fast double @tanh(double [[F:%.*]])
; MS64-NEXT: [[TANHF:%.*]] = call fast float @tanhf(float [[F:%.*]])
;
%conv = fpext float %f to double
%call = call fast double @tanh(double %conv)
@ -480,8 +513,9 @@ define double @tanh_test2(float %f) {
; flags are propagated for shrunken *binary* double FP calls.
define float @max1(float %a, float %b) {
; CHECK-LABEL: @max1(
; CHECK-NEXT: [[FMAXF:%.*]] = call arcp float @fmaxf(float [[A:%.*]], float [[B:%.*]])
; CHECK-NEXT: ret float [[FMAXF]]
; ISC99-NEXT: [[FMAXF:%.*]] = call arcp float @fmaxf(float [[A:%.*]], float [[B:%.*]])
; ISC99-NEXT: ret float [[FMAXF]]
; ISC89: [[FMAXF:%.*]] = call arcp double @fmax(double [[A:%.*]], double [[B:%.*]])
;
%c = fpext float %a to double
%d = fpext float %b to double

446
test/Transforms/InstCombine/double-float-shrink-2.ll
View File

@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S -mtriple "i386-pc-linux" | FileCheck -check-prefix=ALL -check-prefix=DO-SIMPLIFY %s
; RUN: opt < %s -instcombine -S -mtriple "i386-pc-win32" | FileCheck -check-prefix=ALL -check-prefix=DONT-SIMPLIFY %s
; RUN: opt < %s -instcombine -S -mtriple "x86_64-pc-win32" | FileCheck -check-prefix=ALL -check-prefix=C89-SIMPLIFY %s
; RUN: opt < %s -instcombine -S -mtriple "i386-pc-mingw32" | FileCheck -check-prefix=ALL -check-prefix=DO-SIMPLIFY %s
; RUN: opt < %s -instcombine -S -mtriple "x86_64-pc-mingw32" | FileCheck -check-prefix=ALL -check-prefix=DO-SIMPLIFY %s
; RUN: opt < %s -instcombine -S -mtriple "sparc-sun-solaris" | FileCheck -check-prefix=ALL -check-prefix=DO-SIMPLIFY %s
; RUN: opt < %s -enable-debugify -instcombine -S -mtriple "x86_64-pc-win32" 2>&1 | FileCheck -check-prefix=DBG-VALID %s
; RUN: opt < %s -instcombine -S -mtriple "i386-pc-linux" | FileCheck %s
; RUN: opt < %s -instcombine -S -mtriple "i386-pc-win32" | FileCheck %s
; RUN: opt < %s -instcombine -S -mtriple "x86_64-pc-win32" | FileCheck %s
; RUN: opt < %s -instcombine -S -mtriple "i386-pc-mingw32" | FileCheck %s
; RUN: opt < %s -instcombine -S -mtriple "x86_64-pc-mingw32" | FileCheck %s
; RUN: opt < %s -instcombine -S -mtriple "sparc-sun-solaris" | FileCheck %s
; RUN: opt < %s -instcombine -S -mtriple "x86_64-pc-win32" -enable-debugify 2>&1 | FileCheck --check-prefix=DBG-VALID %s
declare double @floor(double)
declare double @ceil(double)
@ -36,9 +36,9 @@ declare double @llvm.trunc.f64(double)
declare <2 x double> @llvm.trunc.v2f64(<2 x double>)
define float @test_shrink_libcall_floor(float %C) {
; ALL-LABEL: @test_shrink_libcall_floor(
; ALL-NEXT: [[F:%.*]] = call float @llvm.floor.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_libcall_floor(
; CHECK-NEXT: [[F:%.*]] = call float @llvm.floor.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[F]]
;
%D = fpext float %C to double
; --> floorf
@ -48,9 +48,9 @@ define float @test_shrink_libcall_floor(float %C) {
}
define float @test_shrink_libcall_ceil(float %C) {
; ALL-LABEL: @test_shrink_libcall_ceil(
; ALL-NEXT: [[F:%.*]] = call float @llvm.ceil.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_libcall_ceil(
; CHECK-NEXT: [[F:%.*]] = call float @llvm.ceil.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[F]]
;
%D = fpext float %C to double
; --> ceilf
@ -60,21 +60,9 @@ define float @test_shrink_libcall_ceil(float %C) {
}
define float @test_shrink_libcall_round(float %C) {
; DO-SIMPLIFY-LABEL: @test_shrink_libcall_round(
; DO-SIMPLIFY-NEXT: [[F:%.*]] = call float @llvm.round.f32(float [[C:%.*]])
; DO-SIMPLIFY-NEXT: ret float [[F]]
;
; DONT-SIMPLIFY-LABEL: @test_shrink_libcall_round(
; DONT-SIMPLIFY-NEXT: [[D:%.*]] = fpext float [[C:%.*]] to double
; DONT-SIMPLIFY-NEXT: [[E:%.*]] = call double @round(double [[D]])
; DONT-SIMPLIFY-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; DONT-SIMPLIFY-NEXT: ret float [[F]]
;
; C89-SIMPLIFY-LABEL: @test_shrink_libcall_round(
; C89-SIMPLIFY-NEXT: [[D:%.*]] = fpext float [[C:%.*]] to double
; C89-SIMPLIFY-NEXT: [[E:%.*]] = call double @round(double [[D]])
; C89-SIMPLIFY-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; C89-SIMPLIFY-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_libcall_round(
; CHECK-NEXT: [[F:%.*]] = call float @llvm.round.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[F]]
;
%D = fpext float %C to double
; --> roundf
@ -84,21 +72,9 @@ define float @test_shrink_libcall_round(float %C) {
}
define float @test_shrink_libcall_nearbyint(float %C) {
; DO-SIMPLIFY-LABEL: @test_shrink_libcall_nearbyint(
; DO-SIMPLIFY-NEXT: [[F:%.*]] = call float @llvm.nearbyint.f32(float [[C:%.*]])
; DO-SIMPLIFY-NEXT: ret float [[F]]
;
; DONT-SIMPLIFY-LABEL: @test_shrink_libcall_nearbyint(
; DONT-SIMPLIFY-NEXT: [[D:%.*]] = fpext float [[C:%.*]] to double
; DONT-SIMPLIFY-NEXT: [[E:%.*]] = call double @nearbyint(double [[D]])
; DONT-SIMPLIFY-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; DONT-SIMPLIFY-NEXT: ret float [[F]]
;
; C89-SIMPLIFY-LABEL: @test_shrink_libcall_nearbyint(
; C89-SIMPLIFY-NEXT: [[D:%.*]] = fpext float [[C:%.*]] to double
; C89-SIMPLIFY-NEXT: [[E:%.*]] = call double @nearbyint(double [[D]])
; C89-SIMPLIFY-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; C89-SIMPLIFY-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_libcall_nearbyint(
; CHECK-NEXT: [[F:%.*]] = call float @llvm.nearbyint.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[F]]
;
%D = fpext float %C to double
; --> nearbyintf
@ -108,21 +84,9 @@ define float @test_shrink_libcall_nearbyint(float %C) {
}
define float @test_shrink_libcall_trunc(float %C) {
; DO-SIMPLIFY-LABEL: @test_shrink_libcall_trunc(
; DO-SIMPLIFY-NEXT: [[F:%.*]] = call float @llvm.trunc.f32(float [[C:%.*]])
; DO-SIMPLIFY-NEXT: ret float [[F]]
;
; DONT-SIMPLIFY-LABEL: @test_shrink_libcall_trunc(
; DONT-SIMPLIFY-NEXT: [[D:%.*]] = fpext float [[C:%.*]] to double
; DONT-SIMPLIFY-NEXT: [[E:%.*]] = call double @trunc(double [[D]])
; DONT-SIMPLIFY-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; DONT-SIMPLIFY-NEXT: ret float [[F]]
;
; C89-SIMPLIFY-LABEL: @test_shrink_libcall_trunc(
; C89-SIMPLIFY-NEXT: [[D:%.*]] = fpext float [[C:%.*]] to double
; C89-SIMPLIFY-NEXT: [[E:%.*]] = call double @trunc(double [[D]])
; C89-SIMPLIFY-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; C89-SIMPLIFY-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_libcall_trunc(
; CHECK-NEXT: [[F:%.*]] = call float @llvm.trunc.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[F]]
;
%D = fpext float %C to double
; --> truncf
@ -132,11 +96,11 @@ define float @test_shrink_libcall_trunc(float %C) {
}
; This is replaced with the intrinsic, which does the right thing on
; all platforms.
; CHECK platforms.
define float @test_shrink_libcall_fabs(float %C) {
; ALL-LABEL: @test_shrink_libcall_fabs(
; ALL-NEXT: [[F:%.*]] = call float @llvm.fabs.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_libcall_fabs(
; CHECK-NEXT: [[F:%.*]] = call float @llvm.fabs.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[F]]
;
%D = fpext float %C to double
%E = call double @fabs(double %D)
@ -146,9 +110,9 @@ define float @test_shrink_libcall_fabs(float %C) {
; Make sure fast math flags are preserved
define float @test_shrink_libcall_fabs_fast(float %C) {
; ALL-LABEL: @test_shrink_libcall_fabs_fast(
; ALL-NEXT: [[F:%.*]] = call fast float @llvm.fabs.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_libcall_fabs_fast(
; CHECK-NEXT: [[F:%.*]] = call fast float @llvm.fabs.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[F]]
;
%D = fpext float %C to double
%E = call fast double @fabs(double %D)
@ -157,9 +121,9 @@ define float @test_shrink_libcall_fabs_fast(float %C) {
}
define float @test_shrink_intrin_ceil(float %C) {
; ALL-LABEL: @test_shrink_intrin_ceil(
; ALL-NEXT: [[TMP1:%.*]] = call float @llvm.ceil.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_ceil(
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.ceil.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[TMP1]]
;
%D = fpext float %C to double
%E = call double @llvm.ceil.f64(double %D)
@ -168,9 +132,9 @@ define float @test_shrink_intrin_ceil(float %C) {
}
define float @test_shrink_intrin_fabs(float %C) {
; ALL-LABEL: @test_shrink_intrin_fabs(
; ALL-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_fabs(
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[TMP1]]
;
%D = fpext float %C to double
%E = call double @llvm.fabs.f64(double %D)
@ -179,9 +143,9 @@ define float @test_shrink_intrin_fabs(float %C) {
}
define float @test_shrink_intrin_floor(float %C) {
; ALL-LABEL: @test_shrink_intrin_floor(
; ALL-NEXT: [[TMP1:%.*]] = call float @llvm.floor.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_floor(
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.floor.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[TMP1]]
;
%D = fpext float %C to double
%E = call double @llvm.floor.f64(double %D)
@ -190,9 +154,9 @@ define float @test_shrink_intrin_floor(float %C) {
}
define float @test_shrink_intrin_nearbyint(float %C) {
; ALL-LABEL: @test_shrink_intrin_nearbyint(
; ALL-NEXT: [[TMP1:%.*]] = call float @llvm.nearbyint.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_nearbyint(
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.nearbyint.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[TMP1]]
;
%D = fpext float %C to double
%E = call double @llvm.nearbyint.f64(double %D)
@ -201,9 +165,9 @@ define float @test_shrink_intrin_nearbyint(float %C) {
}
define half @test_shrink_intrin_rint(half %C) {
; ALL-LABEL: @test_shrink_intrin_rint(
; ALL-NEXT: [[TMP1:%.*]] = call half @llvm.rint.f16(half [[C:%.*]])
; ALL-NEXT: ret half [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_rint(
; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.rint.f16(half [[C:%.*]])
; CHECK-NEXT: ret half [[TMP1]]
;
%D = fpext half %C to float
%E = call float @llvm.rint.f32(float %D)
@ -212,9 +176,9 @@ define half @test_shrink_intrin_rint(half %C) {
}
define float @test_shrink_intrin_round(float %C) {
; ALL-LABEL: @test_shrink_intrin_round(
; ALL-NEXT: [[TMP1:%.*]] = call float @llvm.round.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_round(
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.round.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[TMP1]]
;
%D = fpext float %C to double
%E = call double @llvm.round.f64(double %D)
@ -223,9 +187,9 @@ define float @test_shrink_intrin_round(float %C) {
}
define float @test_shrink_intrin_trunc(float %C) {
; ALL-LABEL: @test_shrink_intrin_trunc(
; ALL-NEXT: [[TMP1:%.*]] = call float @llvm.trunc.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_trunc(
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.trunc.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[TMP1]]
;
%D = fpext float %C to double
%E = call double @llvm.trunc.f64(double %D)
@ -237,12 +201,12 @@ declare void @use_v2f64(<2 x double>)
declare void @use_v2f32(<2 x float>)
define <2 x float> @test_shrink_intrin_ceil_multi_use(<2 x float> %C) {
; ALL-LABEL: @test_shrink_intrin_ceil_multi_use(
; ALL-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; ALL-NEXT: [[E:%.*]] = call <2 x double> @llvm.ceil.v2f64(<2 x double> [[D]])
; ALL-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; ALL-NEXT: call void @use_v2f64(<2 x double> [[D]])
; ALL-NEXT: ret <2 x float> [[F]]
; CHECK-LABEL: @test_shrink_intrin_ceil_multi_use(
; CHECK-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; CHECK-NEXT: [[E:%.*]] = call <2 x double> @llvm.ceil.v2f64(<2 x double> [[D]])
; CHECK-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; CHECK-NEXT: call void @use_v2f64(<2 x double> [[D]])
; CHECK-NEXT: ret <2 x float> [[F]]
;
%D = fpext <2 x float> %C to <2 x double>
%E = call <2 x double> @llvm.ceil.v2f64(<2 x double> %D)
@ -252,11 +216,11 @@ define <2 x float> @test_shrink_intrin_ceil_multi_use(<2 x float> %C) {
}
define <2 x float> @test_shrink_intrin_fabs_multi_use(<2 x float> %C) {
; ALL-LABEL: @test_shrink_intrin_fabs_multi_use(
; ALL-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[C:%.*]])
; ALL-NEXT: [[E:%.*]] = fpext <2 x float> [[TMP1]] to <2 x double>
; ALL-NEXT: call void @use_v2f64(<2 x double> [[E]])
; ALL-NEXT: ret <2 x float> [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_fabs_multi_use(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[C:%.*]])
; CHECK-NEXT: [[E:%.*]] = fpext <2 x float> [[TMP1]] to <2 x double>
; CHECK-NEXT: call void @use_v2f64(<2 x double> [[E]])
; CHECK-NEXT: ret <2 x float> [[TMP1]]
;
%D = fpext <2 x float> %C to <2 x double>
%E = call <2 x double> @llvm.fabs.v2f64(<2 x double> %D)
@ -266,13 +230,13 @@ define <2 x float> @test_shrink_intrin_fabs_multi_use(<2 x float> %C) {
}
define <2 x float> @test_shrink_intrin_floor_multi_use(<2 x float> %C) {
; ALL-LABEL: @test_shrink_intrin_floor_multi_use(
; ALL-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; ALL-NEXT: [[E:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> [[D]])
; ALL-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; ALL-NEXT: call void @use_v2f64(<2 x double> [[D]])
; ALL-NEXT: call void @use_v2f64(<2 x double> [[E]])
; ALL-NEXT: ret <2 x float> [[F]]
; CHECK-LABEL: @test_shrink_intrin_floor_multi_use(
; CHECK-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; CHECK-NEXT: [[E:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> [[D]])
; CHECK-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; CHECK-NEXT: call void @use_v2f64(<2 x double> [[D]])
; CHECK-NEXT: call void @use_v2f64(<2 x double> [[E]])
; CHECK-NEXT: ret <2 x float> [[F]]
;
%D = fpext <2 x float> %C to <2 x double>
%E = call <2 x double> @llvm.floor.v2f64(<2 x double> %D)
@ -283,12 +247,12 @@ define <2 x float> @test_shrink_intrin_floor_multi_use(<2 x float> %C) {
}
define <2 x float> @test_shrink_intrin_nearbyint_multi_use(<2 x float> %C) {
; ALL-LABEL: @test_shrink_intrin_nearbyint_multi_use(
; ALL-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; ALL-NEXT: [[E:%.*]] = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[D]])
; ALL-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; ALL-NEXT: call void @use_v2f64(<2 x double> [[D]])
; ALL-NEXT: ret <2 x float> [[F]]
; CHECK-LABEL: @test_shrink_intrin_nearbyint_multi_use(
; CHECK-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; CHECK-NEXT: [[E:%.*]] = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[D]])
; CHECK-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; CHECK-NEXT: call void @use_v2f64(<2 x double> [[D]])
; CHECK-NEXT: ret <2 x float> [[F]]
;
%D = fpext <2 x float> %C to <2 x double>
%E = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %D)
@ -298,11 +262,11 @@ define <2 x float> @test_shrink_intrin_nearbyint_multi_use(<2 x float> %C) {
}
define <2 x half> @test_shrink_intrin_rint_multi_use(<2 x half> %C) {
; ALL-LABEL: @test_shrink_intrin_rint_multi_use(
; ALL-NEXT: [[TMP1:%.*]] = call <2 x half> @llvm.rint.v2f16(<2 x half> [[C:%.*]])
; ALL-NEXT: [[E:%.*]] = fpext <2 x half> [[TMP1]] to <2 x float>
; ALL-NEXT: call void @use_v2f32(<2 x float> [[E]])
; ALL-NEXT: ret <2 x half> [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_rint_multi_use(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x half> @llvm.rint.v2f16(<2 x half> [[C:%.*]])
; CHECK-NEXT: [[E:%.*]] = fpext <2 x half> [[TMP1]] to <2 x float>
; CHECK-NEXT: call void @use_v2f32(<2 x float> [[E]])
; CHECK-NEXT: ret <2 x half> [[TMP1]]
;
%D = fpext <2 x half> %C to <2 x float>
%E = call <2 x float> @llvm.rint.v2f32(<2 x float> %D)
@ -312,13 +276,13 @@ define <2 x half> @test_shrink_intrin_rint_multi_use(<2 x half> %C) {
}
define <2 x float> @test_shrink_intrin_round_multi_use(<2 x float> %C) {
; ALL-LABEL: @test_shrink_intrin_round_multi_use(
; ALL-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; ALL-NEXT: [[E:%.*]] = call <2 x double> @llvm.round.v2f64(<2 x double> [[D]])
; ALL-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; ALL-NEXT: call void @use_v2f64(<2 x double> [[D]])
; ALL-NEXT: call void @use_v2f64(<2 x double> [[E]])
; ALL-NEXT: ret <2 x float> [[F]]
; CHECK-LABEL: @test_shrink_intrin_round_multi_use(
; CHECK-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; CHECK-NEXT: [[E:%.*]] = call <2 x double> @llvm.round.v2f64(<2 x double> [[D]])
; CHECK-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; CHECK-NEXT: call void @use_v2f64(<2 x double> [[D]])
; CHECK-NEXT: call void @use_v2f64(<2 x double> [[E]])
; CHECK-NEXT: ret <2 x float> [[F]]
;
%D = fpext <2 x float> %C to <2 x double>
%E = call <2 x double> @llvm.round.v2f64(<2 x double> %D)
@ -329,12 +293,12 @@ define <2 x float> @test_shrink_intrin_round_multi_use(<2 x float> %C) {
}
define <2 x float> @test_shrink_intrin_trunc_multi_use(<2 x float> %C) {
; ALL-LABEL: @test_shrink_intrin_trunc_multi_use(
; ALL-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; ALL-NEXT: [[E:%.*]] = call <2 x double> @llvm.trunc.v2f64(<2 x double> [[D]])
; ALL-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; ALL-NEXT: call void @use_v2f64(<2 x double> [[D]])
; ALL-NEXT: ret <2 x float> [[F]]
; CHECK-LABEL: @test_shrink_intrin_trunc_multi_use(
; CHECK-NEXT: [[D:%.*]] = fpext <2 x float> [[C:%.*]] to <2 x double>
; CHECK-NEXT: [[E:%.*]] = call <2 x double> @llvm.trunc.v2f64(<2 x double> [[D]])
; CHECK-NEXT: [[F:%.*]] = fptrunc <2 x double> [[E]] to <2 x float>
; CHECK-NEXT: call void @use_v2f64(<2 x double> [[D]])
; CHECK-NEXT: ret <2 x float> [[F]]
;
%D = fpext <2 x float> %C to <2 x double>
%E = call <2 x double> @llvm.trunc.v2f64(<2 x double> %D)
@ -345,9 +309,9 @@ define <2 x float> @test_shrink_intrin_trunc_multi_use(<2 x float> %C) {
; Make sure fast math flags are preserved
define float @test_shrink_intrin_fabs_fast(float %C) {
; ALL-LABEL: @test_shrink_intrin_fabs_fast(
; ALL-NEXT: [[TMP1:%.*]] = call fast float @llvm.fabs.f32(float [[C:%.*]])
; ALL-NEXT: ret float [[TMP1]]
; CHECK-LABEL: @test_shrink_intrin_fabs_fast(
; CHECK-NEXT: [[TMP1:%.*]] = call fast float @llvm.fabs.f32(float [[C:%.*]])
; CHECK-NEXT: ret float [[TMP1]]
;
%D = fpext float %C to double
%E = call fast double @llvm.fabs.f64(double %D)
@ -356,10 +320,10 @@ define float @test_shrink_intrin_fabs_fast(float %C) {
}
define float @test_no_shrink_intrin_floor(double %D) {
; ALL-LABEL: @test_no_shrink_intrin_floor(
; ALL-NEXT: [[E:%.*]] = call double @llvm.floor.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_no_shrink_intrin_floor(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.floor.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; CHECK-NEXT: ret float [[F]]
;
%E = call double @llvm.floor.f64(double %D)
%F = fptrunc double %E to float
@ -367,10 +331,10 @@ define float @test_no_shrink_intrin_floor(double %D) {
}
define float @test_no_shrink_intrin_ceil(double %D) {
; ALL-LABEL: @test_no_shrink_intrin_ceil(
; ALL-NEXT: [[E:%.*]] = call double @llvm.ceil.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_no_shrink_intrin_ceil(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.ceil.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; CHECK-NEXT: ret float [[F]]
;
%E = call double @llvm.ceil.f64(double %D)
%F = fptrunc double %E to float
@ -378,10 +342,10 @@ define float @test_no_shrink_intrin_ceil(double %D) {
}
define float @test_no_shrink_intrin_round(double %D) {
; ALL-LABEL: @test_no_shrink_intrin_round(
; ALL-NEXT: [[E:%.*]] = call double @llvm.round.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_no_shrink_intrin_round(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.round.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; CHECK-NEXT: ret float [[F]]
;
%E = call double @llvm.round.f64(double %D)
%F = fptrunc double %E to float
@ -389,10 +353,10 @@ define float @test_no_shrink_intrin_round(double %D) {
}
define float @test_no_shrink_intrin_nearbyint(double %D) {
; ALL-LABEL: @test_no_shrink_intrin_nearbyint(
; ALL-NEXT: [[E:%.*]] = call double @llvm.nearbyint.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_no_shrink_intrin_nearbyint(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.nearbyint.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; CHECK-NEXT: ret float [[F]]
;
%E = call double @llvm.nearbyint.f64(double %D)
%F = fptrunc double %E to float
@ -400,10 +364,10 @@ define float @test_no_shrink_intrin_nearbyint(double %D) {
}
define float @test_no_shrink_intrin_trunc(double %D) {
; ALL-LABEL: @test_no_shrink_intrin_trunc(
; ALL-NEXT: [[E:%.*]] = call double @llvm.trunc.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_no_shrink_intrin_trunc(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.trunc.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; CHECK-NEXT: ret float [[F]]
;
%E = call double @llvm.trunc.f64(double %D)
%F = fptrunc double %E to float
@ -411,10 +375,10 @@ define float @test_no_shrink_intrin_trunc(double %D) {
}
define float @test_shrink_intrin_fabs_double_src(double %D) {
; ALL-LABEL: @test_shrink_intrin_fabs_double_src(
; ALL-NEXT: [[TMP1:%.*]] = fptrunc double [[D:%.*]] to float
; ALL-NEXT: [[F:%.*]] = call float @llvm.fabs.f32(float [[TMP1]])
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_intrin_fabs_double_src(
; CHECK-NEXT: [[TMP1:%.*]] = fptrunc double [[D:%.*]] to float
; CHECK-NEXT: [[F:%.*]] = call float @llvm.fabs.f32(float [[TMP1]])
; CHECK-NEXT: ret float [[F]]
;
%E = call double @llvm.fabs.f64(double %D)
%F = fptrunc double %E to float
@ -423,10 +387,10 @@ define float @test_shrink_intrin_fabs_double_src(double %D) {
; Make sure fast math flags are preserved
define float @test_shrink_intrin_fabs_fast_double_src(double %D) {
; ALL-LABEL: @test_shrink_intrin_fabs_fast_double_src(
; ALL-NEXT: [[TMP1:%.*]] = fptrunc double [[D:%.*]] to float
; ALL-NEXT: [[F:%.*]] = call fast float @llvm.fabs.f32(float [[TMP1]])
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_intrin_fabs_fast_double_src(
; CHECK-NEXT: [[TMP1:%.*]] = fptrunc double [[D:%.*]] to float
; CHECK-NEXT: [[F:%.*]] = call fast float @llvm.fabs.f32(float [[TMP1]])
; CHECK-NEXT: ret float [[F]]
;
%E = call fast double @llvm.fabs.f64(double %D)
%F = fptrunc double %E to float
@ -434,8 +398,8 @@ define float @test_shrink_intrin_fabs_fast_double_src(double %D) {
}
define float @test_shrink_float_convertible_constant_intrin_floor() {
; ALL-LABEL: @test_shrink_float_convertible_constant_intrin_floor(
; ALL-NEXT: ret float 2.000000e+00
; CHECK-LABEL: @test_shrink_float_convertible_constant_intrin_floor(
; CHECK-NEXT: ret float 2.000000e+00
;
%E = call double @llvm.floor.f64(double 2.1)
%F = fptrunc double %E to float
@ -443,8 +407,8 @@ define float @test_shrink_float_convertible_constant_intrin_floor() {
}
define float @test_shrink_float_convertible_constant_intrin_ceil() {
; ALL-LABEL: @test_shrink_float_convertible_constant_intrin_ceil(
; ALL-NEXT: ret float 3.000000e+00
; CHECK-LABEL: @test_shrink_float_convertible_constant_intrin_ceil(
; CHECK-NEXT: ret float 3.000000e+00
;
%E = call double @llvm.ceil.f64(double 2.1)
%F = fptrunc double %E to float
@ -452,8 +416,8 @@ define float @test_shrink_float_convertible_constant_intrin_ceil() {
}
define float @test_shrink_float_convertible_constant_intrin_round() {
; ALL-LABEL: @test_shrink_float_convertible_constant_intrin_round(
; ALL-NEXT: ret float 2.000000e+00
; CHECK-LABEL: @test_shrink_float_convertible_constant_intrin_round(
; CHECK-NEXT: ret float 2.000000e+00
;
%E = call double @llvm.round.f64(double 2.1)
%F = fptrunc double %E to float
@ -461,8 +425,8 @@ define float @test_shrink_float_convertible_constant_intrin_round() {
}
define float @test_shrink_float_convertible_constant_intrin_nearbyint() {
; ALL-LABEL: @test_shrink_float_convertible_constant_intrin_nearbyint(
; ALL-NEXT: ret float 2.000000e+00
; CHECK-LABEL: @test_shrink_float_convertible_constant_intrin_nearbyint(
; CHECK-NEXT: ret float 2.000000e+00
;
%E = call double @llvm.nearbyint.f64(double 2.1)
%F = fptrunc double %E to float
@ -470,8 +434,8 @@ define float @test_shrink_float_convertible_constant_intrin_nearbyint() {
}
define float @test_shrink_float_convertible_constant_intrin_trunc() {
; ALL-LABEL: @test_shrink_float_convertible_constant_intrin_trunc(
; ALL-NEXT: ret float 2.000000e+00
; CHECK-LABEL: @test_shrink_float_convertible_constant_intrin_trunc(
; CHECK-NEXT: ret float 2.000000e+00
;
%E = call double @llvm.trunc.f64(double 2.1)
%F = fptrunc double %E to float
@ -479,8 +443,8 @@ define float @test_shrink_float_convertible_constant_intrin_trunc() {
}
define float @test_shrink_float_convertible_constant_intrin_fabs() {
; ALL-LABEL: @test_shrink_float_convertible_constant_intrin_fabs(
; ALL-NEXT: ret float 0x4000CCCCC0000000
; CHECK-LABEL: @test_shrink_float_convertible_constant_intrin_fabs(
; CHECK-NEXT: ret float 0x4000CCCCC0000000
;
%E = call double @llvm.fabs.f64(double 2.1)
%F = fptrunc double %E to float
@ -489,8 +453,8 @@ define float @test_shrink_float_convertible_constant_intrin_fabs() {
; Make sure fast math flags are preserved
define float @test_shrink_float_convertible_constant_intrin_fabs_fast() {
; ALL-LABEL: @test_shrink_float_convertible_constant_intrin_fabs_fast(
; ALL-NEXT: ret float 0x4000CCCCC0000000
; CHECK-LABEL: @test_shrink_float_convertible_constant_intrin_fabs_fast(
; CHECK-NEXT: ret float 0x4000CCCCC0000000
;
%E = call fast double @llvm.fabs.f64(double 2.1)
%F = fptrunc double %E to float
@ -498,10 +462,10 @@ define float @test_shrink_float_convertible_constant_intrin_fabs_fast() {
}
define half @test_no_shrink_mismatched_type_intrin_floor(double %D) {
; ALL-LABEL: @test_no_shrink_mismatched_type_intrin_floor(
; ALL-NEXT: [[E:%.*]] = call double @llvm.floor.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; ALL-NEXT: ret half [[F]]
; CHECK-LABEL: @test_no_shrink_mismatched_type_intrin_floor(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.floor.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; CHECK-NEXT: ret half [[F]]
;
%E = call double @llvm.floor.f64(double %D)
%F = fptrunc double %E to half
@ -509,10 +473,10 @@ define half @test_no_shrink_mismatched_type_intrin_floor(double %D) {
}
define half @test_no_shrink_mismatched_type_intrin_ceil(double %D) {
; ALL-LABEL: @test_no_shrink_mismatched_type_intrin_ceil(
; ALL-NEXT: [[E:%.*]] = call double @llvm.ceil.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; ALL-NEXT: ret half [[F]]
; CHECK-LABEL: @test_no_shrink_mismatched_type_intrin_ceil(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.ceil.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; CHECK-NEXT: ret half [[F]]
;
%E = call double @llvm.ceil.f64(double %D)
%F = fptrunc double %E to half
@ -520,10 +484,10 @@ define half @test_no_shrink_mismatched_type_intrin_ceil(double %D) {
}
define half @test_no_shrink_mismatched_type_intrin_round(double %D) {
; ALL-LABEL: @test_no_shrink_mismatched_type_intrin_round(
; ALL-NEXT: [[E:%.*]] = call double @llvm.round.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; ALL-NEXT: ret half [[F]]
; CHECK-LABEL: @test_no_shrink_mismatched_type_intrin_round(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.round.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; CHECK-NEXT: ret half [[F]]
;
%E = call double @llvm.round.f64(double %D)
%F = fptrunc double %E to half
@ -531,10 +495,10 @@ define half @test_no_shrink_mismatched_type_intrin_round(double %D) {
}
define half @test_no_shrink_mismatched_type_intrin_nearbyint(double %D) {
; ALL-LABEL: @test_no_shrink_mismatched_type_intrin_nearbyint(
; ALL-NEXT: [[E:%.*]] = call double @llvm.nearbyint.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; ALL-NEXT: ret half [[F]]
; CHECK-LABEL: @test_no_shrink_mismatched_type_intrin_nearbyint(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.nearbyint.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; CHECK-NEXT: ret half [[F]]
;
%E = call double @llvm.nearbyint.f64(double %D)
%F = fptrunc double %E to half
@ -542,10 +506,10 @@ define half @test_no_shrink_mismatched_type_intrin_nearbyint(double %D) {
}
define half @test_no_shrink_mismatched_type_intrin_trunc(double %D) {
; ALL-LABEL: @test_no_shrink_mismatched_type_intrin_trunc(
; ALL-NEXT: [[E:%.*]] = call double @llvm.trunc.f64(double [[D:%.*]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; ALL-NEXT: ret half [[F]]
; CHECK-LABEL: @test_no_shrink_mismatched_type_intrin_trunc(
; CHECK-NEXT: [[E:%.*]] = call double @llvm.trunc.f64(double [[D:%.*]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to half
; CHECK-NEXT: ret half [[F]]
;
%E = call double @llvm.trunc.f64(double %D)
%F = fptrunc double %E to half
@ -553,10 +517,10 @@ define half @test_no_shrink_mismatched_type_intrin_trunc(double %D) {
}
define half @test_shrink_mismatched_type_intrin_fabs_double_src(double %D) {
; ALL-LABEL: @test_shrink_mismatched_type_intrin_fabs_double_src(
; ALL-NEXT: [[TMP1:%.*]] = fptrunc double [[D:%.*]] to half
; ALL-NEXT: [[F:%.*]] = call half @llvm.fabs.f16(half [[TMP1]])
; ALL-NEXT: ret half [[F]]
; CHECK-LABEL: @test_shrink_mismatched_type_intrin_fabs_double_src(
; CHECK-NEXT: [[TMP1:%.*]] = fptrunc double [[D:%.*]] to half
; CHECK-NEXT: [[F:%.*]] = call half @llvm.fabs.f16(half [[TMP1]])
; CHECK-NEXT: ret half [[F]]
;
%E = call double @llvm.fabs.f64(double %D)
%F = fptrunc double %E to half
@ -565,10 +529,10 @@ define half @test_shrink_mismatched_type_intrin_fabs_double_src(double %D) {
; Make sure fast math flags are preserved
define half @test_mismatched_type_intrin_fabs_fast_double_src(double %D) {
; ALL-LABEL: @test_mismatched_type_intrin_fabs_fast_double_src(
; ALL-NEXT: [[TMP1:%.*]] = fptrunc double [[D:%.*]] to half
; ALL-NEXT: [[F:%.*]] = call fast half @llvm.fabs.f16(half [[TMP1]])
; ALL-NEXT: ret half [[F]]
; CHECK-LABEL: @test_mismatched_type_intrin_fabs_fast_double_src(
; CHECK-NEXT: [[TMP1:%.*]] = fptrunc double [[D:%.*]] to half
; CHECK-NEXT: [[F:%.*]] = call fast half @llvm.fabs.f16(half [[TMP1]])
; CHECK-NEXT: ret half [[F]]
;
%E = call fast double @llvm.fabs.f64(double %D)
%F = fptrunc double %E to half
@ -576,10 +540,10 @@ define half @test_mismatched_type_intrin_fabs_fast_double_src(double %D) {
}
define <2 x double> @test_shrink_intrin_floor_fp16_vec(<2 x half> %C) {
; ALL-LABEL: @test_shrink_intrin_floor_fp16_vec(
; ALL-NEXT: [[TMP1:%.*]] = call arcp <2 x half> @llvm.floor.v2f16(<2 x half> [[C:%.*]])
; ALL-NEXT: [[E:%.*]] = fpext <2 x half> [[TMP1]] to <2 x double>
; ALL-NEXT: ret <2 x double> [[E]]
; CHECK-LABEL: @test_shrink_intrin_floor_fp16_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call arcp <2 x half> @llvm.floor.v2f16(<2 x half> [[C:%.*]])
; CHECK-NEXT: [[E:%.*]] = fpext <2 x half> [[TMP1]] to <2 x double>
; CHECK-NEXT: ret <2 x double> [[E]]
;
%D = fpext <2 x half> %C to <2 x double>
%E = call arcp <2 x double> @llvm.floor.v2f64(<2 x double> %D)
@ -587,10 +551,10 @@ define <2 x double> @test_shrink_intrin_floor_fp16_vec(<2 x half> %C) {
}
define float @test_shrink_intrin_ceil_fp16_src(half %C) {
; ALL-LABEL: @test_shrink_intrin_ceil_fp16_src(
; ALL-NEXT: [[TMP1:%.*]] = call half @llvm.ceil.f16(half [[C:%.*]])
; ALL-NEXT: [[F:%.*]] = fpext half [[TMP1]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_intrin_ceil_fp16_src(
; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.ceil.f16(half [[C:%.*]])
; CHECK-NEXT: [[F:%.*]] = fpext half [[TMP1]] to float
; CHECK-NEXT: ret float [[F]]
;
%D = fpext half %C to double
%E = call double @llvm.ceil.f64(double %D)
@ -599,10 +563,10 @@ define float @test_shrink_intrin_ceil_fp16_src(half %C) {
}
define <2 x double> @test_shrink_intrin_round_fp16_vec(<2 x half> %C) {
; ALL-LABEL: @test_shrink_intrin_round_fp16_vec(
; ALL-NEXT: [[TMP1:%.*]] = call <2 x half> @llvm.round.v2f16(<2 x half> [[C:%.*]])
; ALL-NEXT: [[E:%.*]] = fpext <2 x half> [[TMP1]] to <2 x double>
; ALL-NEXT: ret <2 x double> [[E]]
; CHECK-LABEL: @test_shrink_intrin_round_fp16_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x half> @llvm.round.v2f16(<2 x half> [[C:%.*]])
; CHECK-NEXT: [[E:%.*]] = fpext <2 x half> [[TMP1]] to <2 x double>
; CHECK-NEXT: ret <2 x double> [[E]]
;
%D = fpext <2 x half> %C to <2 x double>
%E = call <2 x double> @llvm.round.v2f64(<2 x double> %D)
@ -610,10 +574,10 @@ define <2 x double> @test_shrink_intrin_round_fp16_vec(<2 x half> %C) {
}
define float @test_shrink_intrin_nearbyint_fp16_src(half %C) {
; ALL-LABEL: @test_shrink_intrin_nearbyint_fp16_src(
; ALL-NEXT: [[TMP1:%.*]] = call half @llvm.nearbyint.f16(half [[C:%.*]])
; ALL-NEXT: [[F:%.*]] = fpext half [[TMP1]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_intrin_nearbyint_fp16_src(
; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.nearbyint.f16(half [[C:%.*]])
; CHECK-NEXT: [[F:%.*]] = fpext half [[TMP1]] to float
; CHECK-NEXT: ret float [[F]]
;
%D = fpext half %C to double
%E = call double @llvm.nearbyint.f64(double %D)
@ -622,10 +586,10 @@ define float @test_shrink_intrin_nearbyint_fp16_src(half %C) {
}
define <2 x double> @test_shrink_intrin_trunc_fp16_src(<2 x half> %C) {
; ALL-LABEL: @test_shrink_intrin_trunc_fp16_src(
; ALL-NEXT: [[TMP1:%.*]] = call <2 x half> @llvm.trunc.v2f16(<2 x half> [[C:%.*]])
; ALL-NEXT: [[E:%.*]] = fpext <2 x half> [[TMP1]] to <2 x double>
; ALL-NEXT: ret <2 x double> [[E]]
; CHECK-LABEL: @test_shrink_intrin_trunc_fp16_src(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x half> @llvm.trunc.v2f16(<2 x half> [[C:%.*]])
; CHECK-NEXT: [[E:%.*]] = fpext <2 x half> [[TMP1]] to <2 x double>
; CHECK-NEXT: ret <2 x double> [[E]]
;
%D = fpext <2 x half> %C to <2 x double>
%E = call <2 x double> @llvm.trunc.v2f64(<2 x double> %D)
@ -633,10 +597,10 @@ define <2 x double> @test_shrink_intrin_trunc_fp16_src(<2 x half> %C) {
}
define float @test_shrink_intrin_fabs_fp16_src(half %C) {
; ALL-LABEL: @test_shrink_intrin_fabs_fp16_src(
; ALL-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[C:%.*]])
; ALL-NEXT: [[F:%.*]] = fpext half [[TMP1]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_intrin_fabs_fp16_src(
; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[C:%.*]])
; CHECK-NEXT: [[F:%.*]] = fpext half [[TMP1]] to float
; CHECK-NEXT: ret float [[F]]
;
%D = fpext half %C to double
%E = call double @llvm.fabs.f64(double %D)
@ -646,10 +610,10 @@ define float @test_shrink_intrin_fabs_fp16_src(half %C) {
; Make sure fast math flags are preserved
define float @test_shrink_intrin_fabs_fast_fp16_src(half %C) {
; ALL-LABEL: @test_shrink_intrin_fabs_fast_fp16_src(
; ALL-NEXT: [[TMP1:%.*]] = call fast half @llvm.fabs.f16(half [[C:%.*]])
; ALL-NEXT: [[F:%.*]] = fpext half [[TMP1]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_shrink_intrin_fabs_fast_fp16_src(
; CHECK-NEXT: [[TMP1:%.*]] = call fast half @llvm.fabs.f16(half [[C:%.*]])
; CHECK-NEXT: [[F:%.*]] = fpext half [[TMP1]] to float
; CHECK-NEXT: ret float [[F]]
;
%D = fpext half %C to double
%E = call fast double @llvm.fabs.f64(double %D)
@ -658,12 +622,12 @@ define float @test_shrink_intrin_fabs_fast_fp16_src(half %C) {
}
define float @test_no_shrink_intrin_floor_multi_use_fpext(half %C) {
; ALL-LABEL: @test_no_shrink_intrin_floor_multi_use_fpext(
; ALL-NEXT: [[D:%.*]] = fpext half [[C:%.*]] to double
; ALL-NEXT: store volatile double [[D]], double* undef, align 8
; ALL-NEXT: [[E:%.*]] = call double @llvm.floor.f64(double [[D]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_no_shrink_intrin_floor_multi_use_fpext(
; CHECK-NEXT: [[D:%.*]] = fpext half [[C:%.*]] to double
; CHECK-NEXT: store volatile double [[D]], double* undef, align 8
; CHECK-NEXT: [[E:%.*]] = call double @llvm.floor.f64(double [[D]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; CHECK-NEXT: ret float [[F]]
;
%D = fpext half %C to double
store volatile double %D, double* undef
@ -673,12 +637,12 @@ define float @test_no_shrink_intrin_floor_multi_use_fpext(half %C) {
}
define float @test_no_shrink_intrin_fabs_multi_use_fpext(half %C) {
; ALL-LABEL: @test_no_shrink_intrin_fabs_multi_use_fpext(
; ALL-NEXT: [[D:%.*]] = fpext half [[C:%.*]] to double
; ALL-NEXT: store volatile double [[D]], double* undef, align 8
; ALL-NEXT: [[E:%.*]] = call double @llvm.fabs.f64(double [[D]])
; ALL-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; ALL-NEXT: ret float [[F]]
; CHECK-LABEL: @test_no_shrink_intrin_fabs_multi_use_fpext(
; CHECK-NEXT: [[D:%.*]] = fpext half [[C:%.*]] to double
; CHECK-NEXT: store volatile double [[D]], double* undef, align 8
; CHECK-NEXT: [[E:%.*]] = call double @llvm.fabs.f64(double [[D]])
; CHECK-NEXT: [[F:%.*]] = fptrunc double [[E]] to float
; CHECK-NEXT: ret float [[F]]
;
%D = fpext half %C to double
store volatile double %D, double* undef

306
test/Transforms/InstCombine/pow-1.ll
View File

@ -1,15 +1,18 @@
; Test that the pow library call simplifier works correctly.
;
; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefixes=ANY
; RUN: opt -instcombine -S < %s -mtriple=x86_64-apple-macosx10.9 | FileCheck %s --check-prefixes=ANY,CHECK-EXP10
; RUN: opt -instcombine -S < %s -mtriple=arm-apple-ios7.0 | FileCheck %s --check-prefixes=ANY,CHECK-EXP10
; RUN: opt -instcombine -S < %s -mtriple=x86_64-apple-macosx10.8 | FileCheck %s --check-prefixes=ANY,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=arm-apple-ios6.0 | FileCheck %s --check-prefixes=ANY,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=x86_64-netbsd | FileCheck %s --check-prefixes=ANY,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=arm-apple-tvos9.0 | FileCheck %s --check-prefixes=ANY,CHECK-EXP10
; RUN: opt -instcombine -S < %s -mtriple=arm-apple-watchos2.0 | FileCheck %s --check-prefixes=ANY,CHECK-EXP10
; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefixes=CHECK,ANY
; RUN: opt -instcombine -S < %s -mtriple=x86_64-apple-macosx10.9 | FileCheck %s --check-prefixes=CHECK,ANY,CHECK-EXP10
; RUN: opt -instcombine -S < %s -mtriple=arm-apple-ios7.0 | FileCheck %s --check-prefixes=CHECK,ANY,CHECK-EXP10
; RUN: opt -instcombine -S < %s -mtriple=x86_64-apple-macosx10.8 | FileCheck %s --check-prefixes=CHECK,ANY,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=arm-apple-ios6.0 | FileCheck %s --check-prefixes=CHECK,ANY,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=x86_64-netbsd | FileCheck %s --check-prefixes=CHECK,ANY,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=arm-apple-tvos9.0 | FileCheck %s --check-prefixes=CHECK,ANY,CHECK-EXP10
; RUN: opt -instcombine -S < %s -mtriple=arm-apple-watchos2.0 | FileCheck %s --check-prefixes=CHECK,ANY,CHECK-EXP10
; rdar://7251832
; RUN: opt -instcombine -S < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefixes=CHECK-WIN
; RUN: opt -instcombine -S < %s -mtriple=i386-pc-windows-msvc18 | FileCheck %s --check-prefixes=CHECK,MSVC,VC32,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=i386-pc-windows-msvc | FileCheck %s --check-prefixes=CHECK,MSVC,VC51,VC19,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=x86_64-pc-windows-msvc18 | FileCheck %s --check-prefixes=CHECK,MSVC,VC64,CHECK-NO-EXP10
; RUN: opt -instcombine -S < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefixes=CHECK,MSVC,VC83,VC19,CHECK-NO-EXP10
; NOTE: The readonly attribute on the pow call should be preserved
; in the cases below where pow is transformed into another function call.
@ -23,32 +26,39 @@ declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>) nounwind readon
; Check pow(1.0, x) -> 1.0.
define float @test_simplify1(float %x) {
; ANY-LABEL: @test_simplify1(
; CHECK-LABEL: @test_simplify1(
; ANY-NEXT: ret float 1.000000e+00
; VC32-NEXT: [[POW:%.*]] = call float @powf(float 1.000000e+00, float [[X:%.*]])
; VC32-NEXT: ret float [[POW]]
; VC64-NEXT: ret float 1.000000e+00
;
%retval = call float @powf(float 1.0, float %x)
ret float %retval
}
define <2 x float> @test_simplify1v(<2 x float> %x) {
; ANY-LABEL: @test_simplify1v(
; CHECK-LABEL: @test_simplify1v(
; ANY-NEXT: ret <2 x float> <float 1.000000e+00, float 1.000000e+00>
; MSVC-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> <float 1.000000e+00, float 1.000000e+00>, <2 x float> [[X:%.*]])
; MSVC-NEXT: ret <2 x float> [[POW]]
;
%retval = call <2 x float> @llvm.pow.v2f32(<2 x float> <float 1.0, float 1.0>, <2 x float> %x)
ret <2 x float> %retval
}
define double @test_simplify2(double %x) {
; ANY-LABEL: @test_simplify2(
; ANY-NEXT: ret double 1.000000e+00
; CHECK-LABEL: @test_simplify2(
; CHECK-NEXT: ret double 1.000000e+00
;
%retval = call double @pow(double 1.0, double %x)
ret double %retval
}
define <2 x double> @test_simplify2v(<2 x double> %x) {
; ANY-LABEL: @test_simplify2v(
; CHECK-LABEL: @test_simplify2v(
; ANY-NEXT: ret <2 x double> <double 1.000000e+00, double 1.000000e+00>
; MSVC-NEXT: [[POW:%.*]] = call <2 x double> @llvm.pow.v2f64(<2 x double> <double 1.000000e+00, double 1.000000e+00>, <2 x double> [[X:%.*]])
; MSVC-NEXT: ret <2 x double> [[POW]]
;
%retval = call <2 x double> @llvm.pow.v2f64(<2 x double> <double 1.0, double 1.0>, <2 x double> %x)
ret <2 x double> %retval
@ -57,104 +67,114 @@ define <2 x double> @test_simplify2v(<2 x double> %x) {
; Check pow(2.0 ** n, x) -> exp2(n * x).
define float @test_simplify3(float %x) {
; ANY-LABEL: @test_simplify3(
; ANY-NEXT: [[EXP2F:%.*]] = call float @exp2f(float [[X:%.*]]) [[NUW_RO:#[0-9]+]]
; CHECK-LABEL: @test_simplify3(
; ANY-NEXT: [[EXP2F:%.*]] = call float @exp2f(float [[X:%.*]])
; ANY-NEXT: ret float [[EXP2F]]
;
; CHECK-WIN-LABEL: @test_simplify3(
; CHECK-WIN-NEXT: [[POW:%.*]] = call float @powf(float 2.000000e+00, float [[X:%.*]])
; CHECK-WIN-NEXT: ret float [[POW]]
; VC32-NEXT: [[POW:%.*]] = call float @powf(float 2.000000e+00, float [[X:%.*]])
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call float @powf(float 2.000000e+00, float [[X:%.*]])
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: [[POW:%.*]] = call float @powf(float 2.000000e+00, float [[X:%.*]])
; VC64-NEXT: ret float [[POW]]
; VC83-NEXT: [[EXP2F:%.*]] = call float @exp2f(float [[X:%.*]])
; VC83-NEXT: ret float [[EXP2F]]
;
%retval = call float @powf(float 2.0, float %x)
ret float %retval
}
define double @test_simplify3n(double %x) {
; ANY-LABEL: @test_simplify3n(
; CHECK-LABEL: @test_simplify3n(
; ANY-NEXT: [[MUL:%.*]] = fmul double [[X:%.*]], -2.000000e+00
; ANY-NEXT: [[EXP2:%.*]] = call double @exp2(double [[MUL]]) [[NUW_RO]]
; ANY-NEXT: [[EXP2:%.*]] = call double @exp2(double [[MUL]])
; ANY-NEXT: ret double [[EXP2]]
;
; CHECK-WIN-LABEL: @test_simplify3n(
; CHECK-WIN-NEXT: [[POW:%.*]] = call double @pow(double 2.500000e-01, double [[X:%.*]])
; CHECK-WIN-NEXT: ret double [[POW]]
; VC19-NEXT: [[MUL:%.*]] = fmul double [[X:%.*]], -2.000000e+00
; VC19-NEXT: [[EXP2:%.*]] = call double @exp2(double [[MUL]])
; VC19-NEXT: ret double [[EXP2]]
; VC32-NEXT: [[POW:%.*]] = call double @pow(double 2.500000e-01, double [[X:%.*]])
; VC32-NEXT: ret double [[POW]]
; VC64-NEXT: [[POW:%.*]] = call double @pow(double 2.500000e-01, double [[X:%.*]])
; VC64-NEXT: ret double [[POW]]
;
%retval = call double @pow(double 0.25, double %x)
ret double %retval
}
define <2 x float> @test_simplify3v(<2 x float> %x) {
; ANY-LABEL: @test_simplify3v(
; CHECK-LABEL: @test_simplify3v(
; ANY-NEXT: [[EXP2:%.*]] = call <2 x float> @llvm.exp2.v2f32(<2 x float> [[X:%.*]])
; ANY-NEXT: ret <2 x float> [[EXP2]]
;
; CHECK-WIN-LABEL: @test_simplify3v(
; CHECK-WIN-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> <float 2.000000e+00, float 2.000000e+00>, <2 x float> [[X:%.*]])
; CHECK-WIN-NEXT: ret <2 x float> [[POW]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> <float 2.000000e+00, float 2.000000e+00>, <2 x float> [[X:%.*]])
; MSVC-NEXT: ret <2 x float> [[POW]]
;
%retval = call <2 x float> @llvm.pow.v2f32(<2 x float> <float 2.0, float 2.0>, <2 x float> %x)
ret <2 x float> %retval
}
define <2 x double> @test_simplify3vn(<2 x double> %x) {
; ANY-LABEL: @test_simplify3vn(
; CHECK-LABEL: @test_simplify3vn(
; ANY-NEXT: [[MUL:%.*]] = fmul <2 x double> [[X:%.*]], <double 2.000000e+00, double 2.000000e+00>
; ANY-NEXT: [[EXP2:%.*]] = call <2 x double> @llvm.exp2.v2f64(<2 x double> [[MUL]])
; ANY-NEXT: ret <2 x double> [[EXP2]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x double> @llvm.pow.v2f64(<2 x double> <double 4.000000e+00, double 4.000000e+00>, <2 x double> [[X:%.*]])
; MSVC-NEXT: ret <2 x double> [[POW]]
;
%retval = call <2 x double> @llvm.pow.v2f64(<2 x double> <double 4.0, double 4.0>, <2 x double> %x)
ret <2 x double> %retval
}
define double @test_simplify4(double %x) {
; ANY-LABEL: @test_simplify4(
; ANY-NEXT: [[EXP2:%.*]] = call double @exp2(double [[X:%.*]]) [[NUW_RO]]
; CHECK-LABEL: @test_simplify4(
; ANY-NEXT: [[EXP2:%.*]] = call double @exp2(double [[X:%.*]])
; ANY-NEXT: ret double [[EXP2]]
;
; CHECK-WIN-LABEL: @test_simplify4(
; CHECK-WIN-NEXT: [[POW:%.*]] = call double @pow(double 2.000000e+00, double [[X:%.*]])
; CHECK-WIN-NEXT: ret double [[POW]]
; VC19-NEXT: [[EXP2:%.*]] = call double @exp2(double [[X:%.*]])
; VC19-NEXT: ret double [[EXP2]]
; VC32-NEXT: [[POW:%.*]] = call double @pow(double 2.000000e+00, double [[X:%.*]])
; VC32-NEXT: ret double [[POW]]
; VC64-NEXT: [[POW:%.*]] = call double @pow(double 2.000000e+00, double [[X:%.*]])
; VC64-NEXT: ret double [[POW]]
;
%retval = call double @pow(double 2.0, double %x)
ret double %retval
}
define float @test_simplify4n(float %x) {
; ANY-LABEL: @test_simplify4n(
; CHECK-LABEL: @test_simplify4n(
; ANY-NEXT: [[MUL:%.*]] = fmul float [[X:%.*]], 3.000000e+00
; ANY-NEXT: [[EXP2F:%.*]] = call float @exp2f(float [[MUL]]) [[NUW_RO]]
; ANY-NEXT: [[EXP2F:%.*]] = call float @exp2f(float [[MUL]])
; ANY-NEXT: ret float [[EXP2F]]
;
; CHECK-WIN-LABEL: @test_simplify4n(
; CHECK-WIN-NEXT: [[POW:%.*]] = call float @powf(float 8.000000e+00, float [[X:%.*]])
; CHECK-WIN-NEXT: ret float [[POW]]
; VC32-NEXT: [[POW:%.*]] = call float @powf(float 8.000000e+00, float [[X:%.*]])
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call float @powf(float 8.000000e+00, float [[X:%.*]])
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: [[POW:%.*]] = call float @powf(float 8.000000e+00, float [[X:%.*]])
; VC64-NEXT: ret float [[POW]]
; VC83-NEXT: [[MUL:%.*]] = fmul float [[X:%.*]], 3.000000e+00
; VC83-NEXT: [[EXP2F:%.*]] = call float @exp2f(float [[MUL]])
; VC83-NEXT: ret float [[EXP2F]]
;
%retval = call float @powf(float 8.0, float %x)
ret float %retval
}
define <2 x double> @test_simplify4v(<2 x double> %x) {
; ANY-LABEL: @test_simplify4v(
; CHECK-LABEL: @test_simplify4v(
; ANY-NEXT: [[EXP2:%.*]] = call <2 x double> @llvm.exp2.v2f64(<2 x double> [[X:%.*]])
; ANY-NEXT: ret <2 x double> [[EXP2]]
;
; CHECK-WIN-LABEL: @test_simplify4v(
; CHECK-WIN-NEXT: [[POW:%.*]] = call <2 x double> @llvm.pow.v2f64(<2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double> [[X:%.*]])
; CHECK-WIN-NEXT: ret <2 x double> [[POW]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x double> @llvm.pow.v2f64(<2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double> [[X:%.*]])
; MSVC-NEXT: ret <2 x double> [[POW]]
;
%retval = call <2 x double> @llvm.pow.v2f64(<2 x double> <double 2.0, double 2.0>, <2 x double> %x)
ret <2 x double> %retval
}
define <2 x float> @test_simplify4vn(<2 x float> %x) {
; ANY-LABEL: @test_simplify4vn(
; CHECK-LABEL: @test_simplify4vn(
; ANY-NEXT: [[MUL:%.*]] = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, [[X:%.*]]
; ANY-NEXT: [[EXP2:%.*]] = call <2 x float> @llvm.exp2.v2f32(<2 x float> [[MUL]])
; ANY-NEXT: ret <2 x float> [[EXP2]]
;
; CHECK-WIN-LABEL: @test_simplify4vn(
; CHECK-WIN-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> <float 5.000000e-01, float 5.000000e-01>, <2 x float> [[X:%.*]])
; CHECK-WIN-NEXT: ret <2 x float> [[POW]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> <float 5.000000e-01, float 5.000000e-01>, <2 x float> [[X:%.*]])
; MSVC-NEXT: ret <2 x float> [[POW]]
;
%retval = call <2 x float> @llvm.pow.v2f32(<2 x float> <float 0.5, float 0.5>, <2 x float> %x)
ret <2 x float> %retval
@ -163,32 +183,42 @@ define <2 x float> @test_simplify4vn(<2 x float> %x) {
; Check pow(x, 0.0) -> 1.0.
define float @test_simplify5(float %x) {
; ANY-LABEL: @test_simplify5(
; CHECK-LABEL: @test_simplify5(
; ANY-NEXT: ret float 1.000000e+00
; VC32-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float 0.000000e+00)
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float 0.000000e+00)
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: ret float 1.000000e+00
; VC83-NEXT: ret float 1.000000e+00
;
%retval = call float @powf(float %x, float 0.0)
ret float %retval
}
define <2 x float> @test_simplify5v(<2 x float> %x) {
; ANY-LABEL: @test_simplify5v(
; CHECK-LABEL: @test_simplify5v(
; ANY-NEXT: ret <2 x float> <float 1.000000e+00, float 1.000000e+00>
; MSVC-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> [[X:%.*]], <2 x float> zeroinitializer)
; MSVC-NEXT: ret <2 x float> [[POW]]
;
%retval = call <2 x float> @llvm.pow.v2f32(<2 x float> %x, <2 x float> <float 0.0, float 0.0>)
ret <2 x float> %retval
}
define double @test_simplify6(double %x) {
; ANY-LABEL: @test_simplify6(
; ANY-NEXT: ret double 1.000000e+00
; CHECK-LABEL: @test_simplify6(
; CHECK-NEXT: ret double 1.000000e+00
;
%retval = call double @pow(double %x, double 0.0)
ret double %retval
}
define <2 x double> @test_simplify6v(<2 x double> %x) {
; ANY-LABEL: @test_simplify6v(
; CHECK-LABEL: @test_simplify6v(
; ANY-NEXT: ret <2 x double> <double 1.000000e+00, double 1.000000e+00>
; MSVC-NEXT: [[POW:%.*]] = call <2 x double> @llvm.pow.v2f64(<2 x double> [[X:%.*]], <2 x double> zeroinitializer)
; MSVC-NEXT: ret <2 x double> [[POW]]
;
%retval = call <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 0.0, double 0.0>)
ret <2 x double> %retval
@ -197,24 +227,38 @@ define <2 x double> @test_simplify6v(<2 x double> %x) {
; Check pow(x, 0.5) -> fabs(sqrt(x)), where x != -infinity.
define float @test_simplify7(float %x) {
; ANY-LABEL: @test_simplify7(
; ANY-NEXT: [[SQRTF:%.*]] = call float @sqrtf(float [[X:%.*]]) [[NUW_RO]]
; CHECK-LABEL: @test_simplify7(
; ANY-NEXT: [[SQRTF:%.*]] = call float @sqrtf(float [[X:%.*]])
; ANY-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SQRTF]])
; ANY-NEXT: [[ISINF:%.*]] = fcmp oeq float [[X]], 0xFFF0000000000000
; ANY-NEXT: [[TMP1:%.*]] = select i1 [[ISINF]], float 0x7FF0000000000000, float [[ABS]]
; ANY-NEXT: ret float [[TMP1]]
; VC32-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float 5.000000e-01)
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float 5.000000e-01)
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: [[SQRTF:%.*]] = call float @sqrtf(float [[X:%.*]])
; VC64-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SQRTF]])
; VC64-NEXT: [[ISINF:%.*]] = fcmp oeq float [[X]], 0xFFF0000000000000
; VC64-NEXT: [[TMP1:%.*]] = select i1 [[ISINF]], float 0x7FF0000000000000, float [[ABS]]
; VC64-NEXT: ret float [[TMP1]]
; VC83-NEXT: [[SQRTF:%.*]] = call float @sqrtf(float [[X:%.*]])
; VC83-NEXT: [[ABS:%.*]] = call float @llvm.fabs.f32(float [[SQRTF]])
; VC83-NEXT: [[ISINF:%.*]] = fcmp oeq float [[X]], 0xFFF0000000000000
; VC83-NEXT: [[TMP1:%.*]] = select i1 [[ISINF]], float 0x7FF0000000000000, float [[ABS]]
; VC83-NEXT: ret float [[TMP1]]
;
%retval = call float @powf(float %x, float 0.5)
ret float %retval
}
define double @test_simplify8(double %x) {
; ANY-LABEL: @test_simplify8(
; ANY-NEXT: [[SQRT:%.*]] = call double @sqrt(double [[X:%.*]]) [[NUW_RO]]
; ANY-NEXT: [[ABS:%.*]] = call double @llvm.fabs.f64(double [[SQRT]])
; ANY-NEXT: [[ISINF:%.*]] = fcmp oeq double [[X]], 0xFFF0000000000000
; ANY-NEXT: [[TMP1:%.*]] = select i1 [[ISINF]], double 0x7FF0000000000000, double [[ABS]]
; ANY-NEXT: ret double [[TMP1]]
; CHECK-LABEL: @test_simplify8(
; CHECK-NEXT: [[SQRT:%.*]] = call double @sqrt(double [[X:%.*]])
; CHECK-NEXT: [[ABS:%.*]] = call double @llvm.fabs.f64(double [[SQRT]])
; CHECK-NEXT: [[ISINF:%.*]] = fcmp oeq double [[X]], 0xFFF0000000000000
; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[ISINF]], double 0x7FF0000000000000, double [[ABS]]
; CHECK-NEXT: ret double [[TMP1]]
;
%retval = call double @pow(double %x, double 0.5)
ret double %retval
@ -223,16 +267,22 @@ define double @test_simplify8(double %x) {
; Check pow(-infinity, 0.5) -> +infinity.
define float @test_simplify9(float %x) {
; ANY-LABEL: @test_simplify9(
; CHECK-LABEL: @test_simplify9(
; ANY-NEXT: ret float 0x7FF0000000000000
; VC32-NEXT: [[POW:%.*]] = call float @powf(float 0xFFF0000000000000, float 5.000000e-01)
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call float @powf(float 0xFFF0000000000000, float 5.000000e-01)
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: ret float 0x7FF0000000000000
; VC83-NEXT: ret float 0x7FF0000000000000
;
%retval = call float @powf(float 0xFFF0000000000000, float 0.5)
ret float %retval
}
define double @test_simplify10(double %x) {
; ANY-LABEL: @test_simplify10(
; ANY-NEXT: ret double 0x7FF0000000000000
; CHECK-LABEL: @test_simplify10(
; CHECK-NEXT: ret double 0x7FF0000000000000
;
%retval = call double @pow(double 0xFFF0000000000000, double 0.5)
ret double %retval
@ -241,32 +291,42 @@ define double @test_simplify10(double %x) {
; Check pow(x, 1.0) -> x.
define float @test_simplify11(float %x) {
; ANY-LABEL: @test_simplify11(
; CHECK-LABEL: @test_simplify11(
; ANY-NEXT: ret float [[X:%.*]]
; VC32-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float 1.000000e+00)
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float 1.000000e+00)
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: ret float [[X:%.*]]
; VC83-NEXT: ret float [[X:%.*]]
;
%retval = call float @powf(float %x, float 1.0)
ret float %retval
}
define <2 x float> @test_simplify11v(<2 x float> %x) {
; ANY-LABEL: @test_simplify11v(
; CHECK-LABEL: @test_simplify11v(
; ANY-NEXT: ret <2 x float> [[X:%.*]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> [[X:%.*]], <2 x float> <float 1.000000e+00, float 1.000000e+00>)
; MSVC-NEXT: ret <2 x float> [[POW]]
;
%retval = call <2 x float> @llvm.pow.v2f32(<2 x float> %x, <2 x float> <float 1.0, float 1.0>)
ret <2 x float> %retval
}
define double @test_simplify12(double %x) {
; ANY-LABEL: @test_simplify12(
; ANY-NEXT: ret double [[X:%.*]]
; CHECK-LABEL: @test_simplify12(
; CHECK-NEXT: ret double [[X:%.*]]
;
%retval = call double @pow(double %x, double 1.0)
ret double %retval
}
define <2 x double> @test_simplify12v(<2 x double> %x) {
; ANY-LABEL: @test_simplify12v(
; CHECK-LABEL: @test_simplify12v(
; ANY-NEXT: ret <2 x double> [[X:%.*]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x double> @llvm.pow.v2f64(<2 x double> [[X:%.*]], <2 x double> <double 1.000000e+00, double 1.000000e+00>)
; MSVC-NEXT: ret <2 x double> [[POW]]
;
%retval = call <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 1.0, double 1.0>)
ret <2 x double> %retval
@ -275,36 +335,48 @@ define <2 x double> @test_simplify12v(<2 x double> %x) {
; Check pow(x, 2.0) -> x*x.
define float @pow2_strict(float %x) {
; ANY-LABEL: @pow2_strict(
; CHECK-LABEL: @pow2_strict(
; ANY-NEXT: [[SQUARE:%.*]] = fmul float [[X:%.*]], [[X]]
; ANY-NEXT: ret float [[SQUARE]]
; VC32-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float 2.000000e+00)
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float 2.000000e+00)
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: [[SQUARE:%.*]] = fmul float [[X:%.*]], [[X]]
; VC64-NEXT: ret float [[SQUARE]]
; VC83-NEXT: [[SQUARE:%.*]] = fmul float [[X:%.*]], [[X]]
; VC83-NEXT: ret float [[SQUARE]]
;
%r = call float @powf(float %x, float 2.0)
ret float %r
}
define <2 x float> @pow2_strictv(<2 x float> %x) {
; ANY-LABEL: @pow2_strictv(
; CHECK-LABEL: @pow2_strictv(
; ANY-NEXT: [[SQUARE:%.*]] = fmul <2 x float> [[X:%.*]], [[X]]
; ANY-NEXT: ret <2 x float> [[SQUARE]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> [[X:%.*]], <2 x float> <float 2.000000e+00, float 2.000000e+00>)
; MSVC-NEXT: ret <2 x float> [[POW]]
;
%r = call <2 x float> @llvm.pow.v2f32(<2 x float> %x, <2 x float> <float 2.0, float 2.0>)
ret <2 x float> %r
}
define double @pow2_double_strict(double %x) {
; ANY-LABEL: @pow2_double_strict(
; ANY-NEXT: [[SQUARE:%.*]] = fmul double [[X:%.*]], [[X]]
; ANY-NEXT: ret double [[SQUARE]]
; CHECK-LABEL: @pow2_double_strict(
; CHECK-NEXT: [[SQUARE:%.*]] = fmul double [[X:%.*]], [[X]]
; CHECK-NEXT: ret double [[SQUARE]]
;
%r = call double @pow(double %x, double 2.0)
ret double %r
}
define <2 x double> @pow2_double_strictv(<2 x double> %x) {
; ANY-LABEL: @pow2_double_strictv(
; CHECK-LABEL: @pow2_double_strictv(
; ANY-NEXT: [[SQUARE:%.*]] = fmul <2 x double> [[X:%.*]], [[X]]
; ANY-NEXT: ret <2 x double> [[SQUARE]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x double> @llvm.pow.v2f64(<2 x double> [[X:%.*]], <2 x double> <double 2.000000e+00, double 2.000000e+00>)
; MSVC-NEXT: ret <2 x double> [[POW]]
;
%r = call <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 2.0, double 2.0>)
ret <2 x double> %r
@ -313,9 +385,17 @@ define <2 x double> @pow2_double_strictv(<2 x double> %x) {
; Don't drop the FMF - PR35601 ( https://bugs.llvm.org/show_bug.cgi?id=35601 )
define float @pow2_fast(float %x) {
; ANY-LABEL: @pow2_fast(
; CHECK-LABEL: @pow2_fast(
; ANY-NEXT: [[SQUARE:%.*]] = fmul fast float [[X:%.*]], [[X]]
; ANY-NEXT: ret float [[SQUARE]]
; VC32-NEXT: [[POW:%.*]] = call fast float @powf(float [[X:%.*]], float 2.000000e+00)
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call fast float @powf(float [[X:%.*]], float 2.000000e+00)
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: [[SQUARE:%.*]] = fmul fast float [[X:%.*]], [[X]]
; VC64-NEXT: ret float [[SQUARE]]
; VC83-NEXT: [[SQUARE:%.*]] = fmul fast float [[X:%.*]], [[X]]
; VC83-NEXT: ret float [[SQUARE]]
;
%r = call fast float @powf(float %x, float 2.0)
ret float %r
@ -324,48 +404,60 @@ define float @pow2_fast(float %x) {
; Check pow(x, -1.0) -> 1.0/x.
define float @pow_neg1_strict(float %x) {
; ANY-LABEL: @pow_neg1_strict(
; CHECK-LABEL: @pow_neg1_strict(
; ANY-NEXT: [[RECIPROCAL:%.*]] = fdiv float 1.000000e+00, [[X:%.*]]
; ANY-NEXT: ret float [[RECIPROCAL]]
; VC32-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float -1.000000e+00)
; VC32-NEXT: ret float [[POW]]
; VC51-NEXT: [[POW:%.*]] = call float @powf(float [[X:%.*]], float -1.000000e+00)
; VC51-NEXT: ret float [[POW]]
; VC64-NEXT: [[RECIPROCAL:%.*]] = fdiv float 1.000000e+00, [[X:%.*]]
; VC64-NEXT: ret float [[RECIPROCAL]]
; VC83-NEXT: [[RECIPROCAL:%.*]] = fdiv float 1.000000e+00, [[X:%.*]]
; VC83-NEXT: ret float [[RECIPROCAL]]
;
%r = call float @powf(float %x, float -1.0)
ret float %r
}
define <2 x float> @pow_neg1_strictv(<2 x float> %x) {
; ANY-LABEL: @pow_neg1_strictv(
; CHECK-LABEL: @pow_neg1_strictv(
; ANY-NEXT: [[RECIPROCAL:%.*]] = fdiv <2 x float> <float 1.000000e+00, float 1.000000e+00>, [[X:%.*]]
; ANY-NEXT: ret <2 x float> [[RECIPROCAL]]
; MSVC-NEXT: [[POW:%.*]] = call <2 x float> @llvm.pow.v2f32(<2 x float> [[X:%.*]], <2 x float> <float -1.000000e+00, float -1.000000e+00>)
; MSVC-NEXT: ret <2 x float> [[POW]]
;
%r = call <2 x float> @llvm.pow.v2f32(<2 x float> %x, <2 x float> <float -1.0, float -1.0>)
ret <2 x float> %r
}
define double @pow_neg1_double_fast(double %x) {
; ANY-LABEL: @pow_neg1_double_fast(
; ANY-NEXT: [[RECIPROCAL:%.*]] = fdiv fast double 1.000000e+00, [[X:%.*]]
; ANY-NEXT: ret double [[RECIPROCAL]]
; CHECK-LABEL: @pow_neg1_double_fast(
; CHECK-NEXT: [[RECIPROCAL:%.*]] = fdiv fast double 1.000000e+00, [[X:%.*]]
; CHECK-NEXT: ret double [[RECIPROCAL]]
;
%r = call fast double @pow(double %x, double -1.0)
ret double %r
}
define <2 x double> @pow_neg1_double_fastv(<2 x double> %x) {
; ANY-LABEL: @pow_neg1_double_fastv(
; CHECK-LABEL: @pow_neg1_double_fastv(
; ANY-NEXT: [[RECIPROCAL:%.*]] = fdiv fast <2 x double> <double 1.000000e+00, double 1.000000e+00>, [[X:%.*]]
; ANY-NEXT: ret <2 x double> [[RECIPROCAL]]
; MSVC-NEXT: [[POW:%.*]] = call fast <2 x double> @llvm.pow.v2f64(<2 x double> [[X:%.*]], <2 x double> <double -1.000000e+00, double -1.000000e+00>)
; MSVC-NEXT: ret <2 x double> [[POW]]
;
%r = call fast <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double -1.0, double -1.0>)
ret <2 x double> %r
}
define double @test_simplify17(double %x) {
; ANY-LABEL: @test_simplify17(
; ANY-NEXT: [[SQRT:%.*]] = call double @llvm.sqrt.f64(double [[X:%.*]])
; ANY-NEXT: [[ABS:%.*]] = call double @llvm.fabs.f64(double [[SQRT]])
; ANY-NEXT: [[ISINF:%.*]] = fcmp oeq double [[X]], 0xFFF0000000000000
; ANY-NEXT: [[TMP1:%.*]] = select i1 [[ISINF]], double 0x7FF0000000000000, double [[ABS]]
; ANY-NEXT: ret double [[TMP1]]
; CHECK-LABEL: @test_simplify17(
; CHECK-NEXT: [[SQRT:%.*]] = call double @llvm.sqrt.f64(double [[X:%.*]])
; CHECK-NEXT: [[ABS:%.*]] = call double @llvm.fabs.f64(double [[SQRT]])
; CHECK-NEXT: [[ISINF:%.*]] = fcmp oeq double [[X]], 0xFFF0000000000000
; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[ISINF]], double 0x7FF0000000000000, double [[ABS]]
; CHECK-NEXT: ret double [[TMP1]]
;
%retval = call double @llvm.pow.f64(double %x, double 0.5)
ret double %retval
@ -374,29 +466,23 @@ define double @test_simplify17(double %x) {
; Check pow(10.0, x) -> __exp10(x) on OS X 10.9+ and iOS 7.0+.
define float @test_simplify18(float %x) {
; CHECK-EXP10-LABEL: @test_simplify18(
; CHECK-EXP10-NEXT: [[__EXP10F:%.*]] = call float @__exp10f(float [[X:%.*]]) [[NUW_RO]]
; CHECK-EXP10-NEXT: ret float [[__EXP10F]]
;
; CHECK-NO-EXP10-LABEL: @test_simplify18(
; CHECK-NO-EXP10-NEXT: [[RETVAL:%.*]] = call float @powf(float 1.000000e+01, float [[X:%.*]])
; CHECK-NO-EXP10-NEXT: ret float [[RETVAL]]
; CHECK-LABEL: @test_simplify18(
; CHECK-EXP10-NEXT: [[__EXP10F:%.*]] = call float @__exp10f(float [[X:%.*]])
; CHECK-EXP10-NEXT: ret float [[__EXP10F]]
; CHECK-NO-EXP10-NEXT: [[RETVAL:%.*]] = call float @powf(float 1.000000e+01, float [[X:%.*]])
; CHECK-NO-EXP10-NEXT: ret float [[RETVAL]]
;
%retval = call float @powf(float 10.0, float %x)
ret float %retval
}
define double @test_simplify19(double %x) {
; CHECK-EXP10-LABEL: @test_simplify19(
; CHECK-EXP10-NEXT: [[__EXP10:%.*]] = call double @__exp10(double [[X:%.*]]) [[NUW_RO]]
; CHECK-EXP10-NEXT: ret double [[__EXP10]]
;
; CHECK-NO-EXP10-LABEL: @test_simplify19(
; CHECK-NO-EXP10-NEXT: [[RETVAL:%.*]] = call double @pow(double 1.000000e+01, double [[X:%.*]])
; CHECK-NO-EXP10-NEXT: ret double [[RETVAL]]
; CHECK-LABEL: @test_simplify19(
; CHECK-EXP10-NEXT: [[__EXP10:%.*]] = call double @__exp10(double [[X:%.*]])
; CHECK-EXP10-NEXT: ret double [[__EXP10]]
; CHECK-NO-EXP10-NEXT: [[RETVAL:%.*]] = call double @pow(double 1.000000e+01, double [[X:%.*]])
; CHECK-NO-EXP10-NEXT: ret double [[RETVAL]]
;
%retval = call double @pow(double 10.0, double %x)
ret double %retval
}
; CHECK-EXP10: attributes [[NUW_RO]] = { nounwind readonly }

261
test/Transforms/InstCombine/win-math.ll
View File

@ -1,17 +1,21 @@
; RUN: opt -O2 -S -mtriple=i386-pc-win32 < %s | FileCheck %s -check-prefix=WIN32
; RUN: opt -O2 -S -mtriple=x86_64-pc-win32 < %s | FileCheck %s -check-prefix=WIN64
; RUN: opt -O2 -S -mtriple=i386-pc-mingw32 < %s | FileCheck %s -check-prefix=MINGW32
; RUN: opt -O2 -S -mtriple=x86_64-pc-mingw32 < %s | FileCheck %s -check-prefix=MINGW64
; RUN: opt < %s -O2 -S -mtriple=i386-pc-windows-msvc18 | FileCheck %s --check-prefixes=CHECK,MSVCXX,MSVC32
; RUN: opt < %s -O2 -S -mtriple=i386-pc-windows-msvc | FileCheck %s --check-prefixes=CHECK,MSVC19,MSVC51
; RUN: opt < %s -O2 -S -mtriple=x86_64-pc-windows-msvc17 | FileCheck %s --check-prefixes=CHECK,MSVCXX,MSVC64
; RUN: opt < %s -O2 -S -mtriple=x86_64-pc-win32 | FileCheck %s --check-prefixes=CHECK,MSVC19,MSVC83
; RUN: opt < %s -O2 -S -mtriple=i386-pc-mingw32 | FileCheck %s --check-prefixes=CHECK,MINGW32
; RUN: opt < %s -O2 -S -mtriple=x86_64-pc-mingw32 | FileCheck %s --check-prefixes=CHECK,MINGW64
; x86 win32 msvcrt does not provide entry points for single-precision libm.
; x86-64 win32 msvcrt does (except for fabsf)
; msvcrt does not provide C99 math, but mingw32 does.
; x86-64 win32 msvcrt does, but with exceptions
; msvcrt does not provide all of C99 math, but mingw32 does.
declare double @acos(double %x)
define float @float_acos(float %x) nounwind readnone {
; WIN32-LABEL: @float_acos(
; WIN32-NOT: float @acosf
; WIN32: double @acos
; CHECK-LABEL: @float_acos(
; MSVCXX-NOT: float @acosf
; MSVCXX: double @acos
; MSVC19-NOT: float @acosf
; MSVC19: double @acos
%1 = fpext float %x to double
%2 = call double @acos(double %1)
%3 = fptrunc double %2 to float
@ -20,9 +24,11 @@ define float @float_acos(float %x) nounwind readnone {
declare double @asin(double %x)
define float @float_asin(float %x) nounwind readnone {
; WIN32-LABEL: @float_asin(
; WIN32-NOT: float @asinf
; WIN32: double @asin
; CHECK-LABEL: @float_asin(
; MSVCXX-NOT: float @asinf
; MSVCXX: double @asin
; MSVC19-NOT: float @asinf
; MSVC19: double @asin
%1 = fpext float %x to double
%2 = call double @asin(double %1)
%3 = fptrunc double %2 to float
@ -31,9 +37,11 @@ define float @float_asin(float %x) nounwind readnone {
declare double @atan(double %x)
define float @float_atan(float %x) nounwind readnone {
; WIN32-LABEL: @float_atan(
; WIN32-NOT: float @atanf
; WIN32: double @atan
; CHECK-LABEL: @float_atan(
; MSVCXX-NOT: float @atanf
; MSVCXX: double @atan
; MSVC19-NOT: float @atanf
; MSVC19: double @atan
%1 = fpext float %x to double
%2 = call double @atan(double %1)
%3 = fptrunc double %2 to float
@ -42,9 +50,11 @@ define float @float_atan(float %x) nounwind readnone {
declare double @atan2(double %x, double %y)
define float @float_atan2(float %x, float %y) nounwind readnone {
; WIN32-LABEL: @float_atan2(
; WIN32-NOT: float @atan2f
; WIN32: double @atan2
; CHECK-LABEL: @float_atan2(
; MSVCXX-NOT: float @atan2f
; MSVCXX: double @atan2
; MSVC19-NOT: float @atan2f
; MSVC19: double @atan2
%1 = fpext float %x to double
%2 = fpext float %y to double
%3 = call double @atan2(double %1, double %2)
@ -54,18 +64,15 @@ define float @float_atan2(float %x, float %y) nounwind readnone {
declare double @ceil(double %x)
define float @float_ceil(float %x) nounwind readnone {
; WIN32-LABEL: @float_ceil(
; WIN32-NOT: float @ceilf
; WIN32: float @llvm.ceil.f32
; WIN64-LABEL: @float_ceil(
; WIN64: float @llvm.ceil.f32
; WIN64-NOT: double @ceil
; MINGW32-LABEL: @float_ceil(
; MINGW32: float @llvm.ceil.f32
; CHECK-LABEL: @float_ceil(
; MSVCXX-NOT: float @ceilf
; MSVCXX: float @llvm.ceil.f32
; MSVC19-NOT: double @ceil
; MSVC19: float @llvm.ceil.f32
; MINGW32-NOT: double @ceil
; MINGW64-LABEL: @float_ceil(
; MINGW64: float @llvm.ceil.f32
; MINGW32: float @llvm.ceil.f32
; MINGW64-NOT: double @ceil
; MINGW64: float @llvm.ceil.f32
%1 = fpext float %x to double
%2 = call double @ceil(double %1)
%3 = fptrunc double %2 to float
@ -74,10 +81,11 @@ define float @float_ceil(float %x) nounwind readnone {
declare double @_copysign(double %x)
define float @float_copysign(float %x) nounwind readnone {
; WIN32-LABEL: @float_copysign(
; WIN32-NOT: float @copysignf
; WIN32-NOT: float @_copysignf
; WIN32: double @_copysign
; CHECK-LABEL: @float_copysign(
; MSVCXX-NOT: float @_copysignf
; MSVCXX: double @_copysign
; MSVC19-NOT: float @_copysignf
; MSVC19: double @_copysign
%1 = fpext float %x to double
%2 = call double @_copysign(double %1)
%3 = fptrunc double %2 to float
@ -86,9 +94,11 @@ define float @float_copysign(float %x) nounwind readnone {
declare double @cos(double %x)
define float @float_cos(float %x) nounwind readnone {
; WIN32-LABEL: @float_cos(
; WIN32-NOT: float @cosf
; WIN32: double @cos
; CHECK-LABEL: @float_cos(
; MSVCXX-NOT: float @cosf
; MSVCXX: double @cos
; MSVC19-NOT: float @cosf
; MSVC19: double @cos
%1 = fpext float %x to double
%2 = call double @cos(double %1)
%3 = fptrunc double %2 to float
@ -97,9 +107,11 @@ define float @float_cos(float %x) nounwind readnone {
declare double @cosh(double %x)
define float @float_cosh(float %x) nounwind readnone {
; WIN32-LABEL: @float_cosh(
; WIN32-NOT: float @coshf
; WIN32: double @cosh
; CHECK-LABEL: @float_cosh(
; MSVCXX-NOT: float @coshf
; MSVCXX: double @cosh
; MSVC19-NOT: float @coshf
; MSVC19: double @cosh
%1 = fpext float %x to double
%2 = call double @cosh(double %1)
%3 = fptrunc double %2 to float
@ -108,9 +120,11 @@ define float @float_cosh(float %x) nounwind readnone {
declare double @exp(double %x, double %y)
define float @float_exp(float %x, float %y) nounwind readnone {
; WIN32-LABEL: @float_exp(
; WIN32-NOT: float @expf
; WIN32: double @exp
; CHECK-LABEL: @float_exp(
; MSVCXX-NOT: float @expf
; MSVCXX: double @exp
; MSVC19-NOT: float @expf
; MSVC19: double @exp
%1 = fpext float %x to double
%2 = fpext float %y to double
%3 = call double @exp(double %1, double %2)
@ -120,12 +134,11 @@ define float @float_exp(float %x, float %y) nounwind readnone {
declare double @fabs(double %x, double %y)
define float @float_fabs(float %x, float %y) nounwind readnone {
; WIN32-LABEL: @float_fabs(
; WIN32-NOT: float @fabsf
; WIN32: double @fabs
; WIN64-LABEL: @float_fabs(
; WIN64-NOT: float @fabsf
; WIN64: double @fabs
; CHECK-LABEL: @float_fabs(
; MSVCXX-NOT: float @fabsf
; MSVCXX: double @fabs
; MSVC19-NOT: float @fabsf
; MSVC19: double @fabs
%1 = fpext float %x to double
%2 = fpext float %y to double
%3 = call double @fabs(double %1, double %2)
@ -135,18 +148,15 @@ define float @float_fabs(float %x, float %y) nounwind readnone {
declare double @floor(double %x)
define float @float_floor(float %x) nounwind readnone {
; WIN32-LABEL: @float_floor(
; WIN32-NOT: float @floorf
; WIN32: float @llvm.floor.f32
; WIN64-LABEL: @float_floor(
; WIN64: float @llvm.floor.f32
; WIN64-NOT: double @floor
; MINGW32-LABEL: @float_floor(
; MINGW32: float @llvm.floor.f32
; CHECK-LABEL: @float_floor(
; MSVCXX-NOT: float @floorf
; MSVCXX: float @llvm.floor.f32
; MSVC19-NOT: double @floor
; MSVC19: float @llvm.floor.f32
; MINGW32-NOT: double @floor
; MINGW64-LABEL: @float_floor(
; MINGW64: float @llvm.floor.f32
; MINGW32: float @llvm.floor.f32
; MINGW64-NOT: double @floor
; MINGW64: float @llvm.floor.f32
%1 = fpext float %x to double
%2 = call double @floor(double %1)
%3 = fptrunc double %2 to float
@ -155,9 +165,11 @@ define float @float_floor(float %x) nounwind readnone {
declare double @fmod(double %x, double %y)
define float @float_fmod(float %x, float %y) nounwind readnone {
; WIN32-LABEL: @float_fmod(
; WIN32-NOT: float @fmodf
; WIN32: double @fmod
; MSVCXX-LABEL: @float_fmod(
; MSVCXX-NOT: float @fmodf
; MSVCXX: double @fmod
; MSVC19-NOT: float @fmodf
; MSVC19: double @fmod
%1 = fpext float %x to double
%2 = fpext float %y to double
%3 = call double @fmod(double %1, double %2)
@ -167,20 +179,37 @@ define float @float_fmod(float %x, float %y) nounwind readnone {
declare double @log(double %x)
define float @float_log(float %x) nounwind readnone {
; WIN32-LABEL: @float_log(
; WIN32-NOT: float @logf
; WIN32: double @log
; CHECK-LABEL: @float_log(
; MSVCXX-NOT: float @logf
; MSVCXX: double @log
; MSVC19-NOT: float @logf
; MSVC19: double @log
%1 = fpext float %x to double
%2 = call double @log(double %1)
%3 = fptrunc double %2 to float
ret float %3
}
declare double @logb(double %x)
define float @float_logb(float %x) nounwind readnone {
; CHECK-LABEL: @float_logb(
; MSVCXX-NOT: float @logbf
; MSVCXX: double @logb
; MSVC19-NOT: float @logbf
; MSVC19: double @logb
%1 = fpext float %x to double
%2 = call double @logb(double %1)
%3 = fptrunc double %2 to float
ret float %3
}
declare double @pow(double %x, double %y)
define float @float_pow(float %x, float %y) nounwind readnone {
; WIN32-LABEL: @float_pow(
; WIN32-NOT: float @powf
; WIN32: double @pow
; CHECK-LABEL: @float_pow(
; MSVCXX-NOT: float @powf
; MSVCXX: double @pow
; MSVC19-NOT: float @powf
; MSVC19: double @pow
%1 = fpext float %x to double
%2 = fpext float %y to double
%3 = call double @pow(double %1, double %2)
@ -190,9 +219,11 @@ define float @float_pow(float %x, float %y) nounwind readnone {
declare double @sin(double %x)
define float @float_sin(float %x) nounwind readnone {
; WIN32-LABEL: @float_sin(
; WIN32-NOT: float @sinf
; WIN32: double @sin
; CHECK-LABEL: @float_sin(
; MSVCXX-NOT: float @sinf
; MSVCXX: double @sin
; MSVC19-NOT: float @sinf
; MSVC19: double @sin
%1 = fpext float %x to double
%2 = call double @sin(double %1)
%3 = fptrunc double %2 to float
@ -201,9 +232,11 @@ define float @float_sin(float %x) nounwind readnone {
declare double @sinh(double %x)
define float @float_sinh(float %x) nounwind readnone {
; WIN32-LABEL: @float_sinh(
; WIN32-NOT: float @sinhf
; WIN32: double @sinh
; CHECK-LABEL: @float_sinh(
; MSVCXX-NOT: float @sinhf
; MSVCXX: double @sinh
; MSVC19-NOT: float @sinhf
; MSVC19: double @sinh
%1 = fpext float %x to double
%2 = call double @sinh(double %1)
%3 = fptrunc double %2 to float
@ -212,18 +245,19 @@ define float @float_sinh(float %x) nounwind readnone {
declare double @sqrt(double %x)
define float @float_sqrt(float %x) nounwind readnone {
; WIN32-LABEL: @float_sqrt(
; WIN32-NOT: float @sqrtf
; WIN32: double @sqrt
; WIN64-LABEL: @float_sqrt(
; WIN64: float @sqrtf
; WIN64-NOT: double @sqrt
; MINGW32-LABEL: @float_sqrt(
; MINGW32: float @sqrtf
; CHECK-LABEL: @float_sqrt(
; MSVC32-NOT: float @sqrtf
; MSVC32: double @sqrt
; MSVC51-NOT: float @sqrtf
; MSVC51: double @sqrt
; MSVC64-NOT: double @sqrt
; MSVC64: float @sqrtf
; MSVC83-NOT: double @sqrt
; MSVC83: float @sqrtf
; MINGW32-NOT: double @sqrt
; MINGW64-LABEL: @float_sqrt(
; MINGW64: float @sqrtf
; MINGW32: float @sqrtf
; MINGW64-NOT: double @sqrt
; MINGW64: float @sqrtf
%1 = fpext float %x to double
%2 = call double @sqrt(double %1)
%3 = fptrunc double %2 to float
@ -232,9 +266,11 @@ define float @float_sqrt(float %x) nounwind readnone {
declare double @tan(double %x)
define float @float_tan(float %x) nounwind readnone {
; WIN32-LABEL: @float_tan(
; WIN32-NOT: float @tanf
; WIN32: double @tan
; CHECK-LABEL: @float_tan(
; MSVCXX-NOT: float @tanf
; MSVCXX: double @tan
; MSVC19-NOT: float @tanf
; MSVC19: double @tan
%1 = fpext float %x to double
%2 = call double @tan(double %1)
%3 = fptrunc double %2 to float
@ -243,30 +279,29 @@ define float @float_tan(float %x) nounwind readnone {
declare double @tanh(double %x)
define float @float_tanh(float %x) nounwind readnone {
; WIN32-LABEL: @float_tanh(
; WIN32-NOT: float @tanhf
; WIN32: double @tanh
; CHECK-LABEL: @float_tanh(
; MSVCXX-NOT: float @tanhf
; MSVCXX: double @tanh
; MSVC19-NOT: float @tanhf
; MSVC19: double @tanh
%1 = fpext float %x to double
%2 = call double @tanh(double %1)
%3 = fptrunc double %2 to float
ret float %3
}
; win32 does not have round; mingw32 does
; win32 does not have roundf; mingw32 does
declare double @round(double %x)
define float @float_round(float %x) nounwind readnone {
; WIN32-LABEL: @float_round(
; WIN32-NOT: float @roundf
; WIN32: double @round
; WIN64-LABEL: @float_round(
; WIN64-NOT: float @roundf
; WIN64: double @round
; MINGW32-LABEL: @float_round(
; MINGW32: float @llvm.round.f32
; CHECK-LABEL: @float_round(
; MSVCXX-NOT: double @roundf
; MSVCXX: double @round
; MSVC19-NOT: double @round
; MSVC19: float @llvm.round.f32
; MINGW32-NOT: double @round
; MINGW64-LABEL: @float_round(
; MINGW64: float @llvm.round.f32
; MINGW32: float @llvm.round.f32
; MINGW64-NOT: double @round
; MINGW64: float @llvm.round.f32
%1 = fpext float %x to double
%2 = call double @round(double %1)
%3 = fptrunc double %2 to float
@ -275,26 +310,26 @@ define float @float_round(float %x) nounwind readnone {
declare float @powf(float, float)
; win32 lacks sqrtf&fabsf, win64 lacks fabsf, but
; win32 lacks sqrtf & fabsf, win64 lacks fabsf, but
; calls to the intrinsics can be emitted instead.
define float @float_powsqrt(float %x) nounwind readnone {
; WIN32-LABEL: @float_powsqrt(
; WIN32-NOT: float @sqrtf
; WIN32: float @powf
; WIN64-LABEL: @float_powsqrt(
; WIN64: float @sqrtf
; WIN64: float @llvm.fabs.f32(
; WIN64-NOT: float @powf
; MINGW32-LABEL: @float_powsqrt(
; CHECK-LABEL: @float_powsqrt(
; MSVC32-NOT: float @sqrtf
; MSVC32: float @powf
; MSVC51-NOT: float @sqrtf
; MSVC51: float @powf
; MSVC64-NOT: float @powf
; MSVC64: float @sqrtf
; MSVC64: float @llvm.fabs.f32(
; MSVC83-NOT: float @powf
; MSVC83: float @sqrtf
; MSVC83: float @llvm.fabs.f32(
; MINGW32-NOT: float @powf
; MINGW32: float @sqrtf
; MINGW32: float @llvm.fabs.f32
; MINGW32-NOT: float @powf
; MINGW64-LABEL: @float_powsqrt(
; MINGW64-NOT: float @powf
; MINGW64: float @sqrtf
; MINGW64: float @llvm.fabs.f32(
; MINGW64-NOT: float @powf
%1 = call float @powf(float %x, float 0.5)
ret float %1
}

172
test/tools/llvm-mca/X86/Atom/resources-x87.s
View File

@ -5,7 +5,7 @@ f2xm1
fabs
fadd %st(0), %st(1)
fadd %st, %st(1)
fadd %st(2)
fadds (%ecx)
faddl (%ecx)
@ -21,14 +21,14 @@ fchs
fnclex
fcmovb %st(1), %st(0)
fcmovbe %st(1), %st(0)
fcmove %st(1), %st(0)
fcmovnb %st(1), %st(0)
fcmovnbe %st(1), %st(0)
fcmovne %st(1), %st(0)
fcmovnu %st(1), %st(0)
fcmovu %st(1), %st(0)
fcmovb %st(1), %st
fcmovbe %st(1), %st
fcmove %st(1), %st
fcmovnb %st(1), %st
fcmovnbe %st(1), %st
fcmovne %st(1), %st
fcmovnu %st(1), %st
fcmovu %st(1), %st
fcom %st(1)
fcom %st(3)
@ -47,7 +47,7 @@ fcos
fdecstp
fdiv %st(0), %st(1)
fdiv %st, %st(1)
fdiv %st(2)
fdivs (%ecx)
fdivl (%eax)
@ -56,7 +56,7 @@ fdivp %st(2)
fidivs (%ecx)
fidivl (%eax)
fdivr %st(0), %st(1)
fdivr %st, %st(1)
fdivr %st(2)
fdivrs (%ecx)
fdivrl (%eax)
@ -106,7 +106,7 @@ fldln2
fldpi
fldz
fmul %st(0), %st(1)
fmul %st, %st(1)
fmul %st(2)
fmuls (%ecx)
fmull (%eax)
@ -153,7 +153,7 @@ fnstsw (%eax)
frstor (%eax)
fsave (%eax)
fsub %st(0), %st(1)
fsub %st, %st(1)
fsub %st(2)
fsubs (%ecx)
fsubl (%eax)
@ -162,7 +162,7 @@ fsubp %st(2)
fisubs (%ecx)
fisubl (%eax)
fsubr %st(0), %st(1)
fsubr %st, %st(1)
fsubr %st(2)
fsubrs (%ecx)
fsubrl (%eax)
@ -208,26 +208,26 @@ fyl2xp1
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 99 49.50 U f2xm1
# CHECK-NEXT: 1 1 1.00 U fabs
# CHECK-NEXT: 1 5 5.00 U fadd %st(0), %st(1)
# CHECK-NEXT: 1 5 5.00 U fadd %st(2)
# CHECK-NEXT: 1 5 5.00 U fadd %st, %st(1)
# CHECK-NEXT: 1 5 5.00 U fadd %st(2), %st
# CHECK-NEXT: 1 5 5.00 * U fadds (%ecx)
# CHECK-NEXT: 1 5 5.00 * U faddl (%ecx)
# CHECK-NEXT: 1 5 5.00 U faddp %st(1)
# CHECK-NEXT: 1 5 5.00 U faddp %st(2)
# CHECK-NEXT: 1 5 5.00 U faddp %st, %st(1)
# CHECK-NEXT: 1 5 5.00 U faddp %st, %st(2)
# CHECK-NEXT: 1 5 5.00 * U fiadds (%ecx)
# CHECK-NEXT: 1 5 5.00 * U fiaddl (%ecx)
# CHECK-NEXT: 1 100 0.50 U fbld (%ecx)
# CHECK-NEXT: 1 100 0.50 U fbstp (%eax)
# CHECK-NEXT: 1 1 1.00 U fchs
# CHECK-NEXT: 1 25 12.50 U fnclex
# CHECK-NEXT: 1 9 4.50 U fcmovb %st(1), %st(0)
# CHECK-NEXT: 1 9 4.50 U fcmovbe %st(1), %st(0)
# CHECK-NEXT: 1 9 4.50 U fcmove %st(1), %st(0)
# CHECK-NEXT: 1 9 4.50 U fcmovnb %st(1), %st(0)
# CHECK-NEXT: 1 9 4.50 U fcmovnbe %st(1), %st(0)
# CHECK-NEXT: 1 9 4.50 U fcmovne %st(1), %st(0)
# CHECK-NEXT: 1 9 4.50 U fcmovnu %st(1), %st(0)
# CHECK-NEXT: 1 9 4.50 U fcmovu %st(1), %st(0)
# CHECK-NEXT: 1 9 4.50 U fcmovb %st(1), %st
# CHECK-NEXT: 1 9 4.50 U fcmovbe %st(1), %st
# CHECK-NEXT: 1 9 4.50 U fcmove %st(1), %st
# CHECK-NEXT: 1 9 4.50 U fcmovnb %st(1), %st
# CHECK-NEXT: 1 9 4.50 U fcmovnbe %st(1), %st
# CHECK-NEXT: 1 9 4.50 U fcmovne %st(1), %st
# CHECK-NEXT: 1 9 4.50 U fcmovnu %st(1), %st
# CHECK-NEXT: 1 9 4.50 U fcmovu %st(1), %st
# CHECK-NEXT: 1 5 5.00 U fcom %st(1)
# CHECK-NEXT: 1 5 5.00 U fcom %st(3)
# CHECK-NEXT: 1 5 5.00 U fcoms (%ecx)
@ -237,24 +237,24 @@ fyl2xp1
# CHECK-NEXT: 1 5 5.00 U fcomps (%ecx)
# CHECK-NEXT: 1 5 5.00 U fcompl (%eax)
# CHECK-NEXT: 1 1 1.00 U fcompp
# CHECK-NEXT: 1 9 4.50 U fcomi %st(3)
# CHECK-NEXT: 1 9 4.50 U fcompi %st(3)
# CHECK-NEXT: 1 9 4.50 U fcomi %st(3), %st
# CHECK-NEXT: 1 9 4.50 U fcompi %st(3), %st
# CHECK-NEXT: 1 174 87.00 U fcos
# CHECK-NEXT: 1 1 0.50 U fdecstp
# CHECK-NEXT: 1 34 17.00 U fdiv %st(0), %st(1)
# CHECK-NEXT: 1 34 17.00 U fdiv %st(2)
# CHECK-NEXT: 1 34 17.00 U fdiv %st, %st(1)
# CHECK-NEXT: 1 34 17.00 U fdiv %st(2), %st
# CHECK-NEXT: 1 34 17.00 * U fdivs (%ecx)
# CHECK-NEXT: 1 34 17.00 * U fdivl (%eax)
# CHECK-NEXT: 1 34 17.00 U fdivp %st(1)
# CHECK-NEXT: 1 34 17.00 U fdivp %st(2)
# CHECK-NEXT: 1 34 17.00 U fdivp %st, %st(1)
# CHECK-NEXT: 1 34 17.00 U fdivp %st, %st(2)
# CHECK-NEXT: 1 34 17.00 * U fidivs (%ecx)
# CHECK-NEXT: 1 34 17.00 * U fidivl (%eax)
# CHECK-NEXT: 1 34 17.00 U fdivr %st(0), %st(1)
# CHECK-NEXT: 1 34 17.00 U fdivr %st(2)
# CHECK-NEXT: 1 34 17.00 U fdivr %st, %st(1)
# CHECK-NEXT: 1 34 17.00 U fdivr %st(2), %st
# CHECK-NEXT: 1 34 17.00 * U fdivrs (%ecx)
# CHECK-NEXT: 1 34 17.00 * U fdivrl (%eax)
# CHECK-NEXT: 1 34 17.00 U fdivrp %st(1)
# CHECK-NEXT: 1 34 17.00 U fdivrp %st(2)
# CHECK-NEXT: 1 34 17.00 U fdivrp %st, %st(1)
# CHECK-NEXT: 1 34 17.00 U fdivrp %st, %st(2)
# CHECK-NEXT: 1 34 17.00 * U fidivrs (%ecx)
# CHECK-NEXT: 1 34 17.00 * U fidivrl (%eax)
# CHECK-NEXT: 1 1 0.50 U ffree %st(0)
@ -288,12 +288,12 @@ fyl2xp1
# CHECK-NEXT: 1 10 5.00 U fldln2
# CHECK-NEXT: 1 10 5.00 U fldpi
# CHECK-NEXT: 1 1 0.50 U fldz
# CHECK-NEXT: 1 4 4.00 U fmul %st(0), %st(1)
# CHECK-NEXT: 1 4 4.00 U fmul %st(2)
# CHECK-NEXT: 1 4 4.00 U fmul %st, %st(1)
# CHECK-NEXT: 1 4 4.00 U fmul %st(2), %st
# CHECK-NEXT: 1 4 4.00 * U fmuls (%ecx)
# CHECK-NEXT: 1 4 4.00 * U fmull (%eax)
# CHECK-NEXT: 1 4 4.00 U fmulp %st(1)
# CHECK-NEXT: 1 4 4.00 U fmulp %st(2)
# CHECK-NEXT: 1 4 4.00 U fmulp %st, %st(1)
# CHECK-NEXT: 1 4 4.00 U fmulp %st, %st(2)
# CHECK-NEXT: 1 4 4.00 * U fimuls (%ecx)
# CHECK-NEXT: 1 4 4.00 * U fimull (%eax)
# CHECK-NEXT: 1 1 0.50 U fnop
@ -321,20 +321,20 @@ fyl2xp1
# CHECK-NEXT: 1 100 0.50 U frstor (%eax)
# CHECK-NEXT: 1 1 0.50 U wait
# CHECK-NEXT: 1 100 0.50 U fnsave (%eax)
# CHECK-NEXT: 1 5 5.00 U fsub %st(0), %st(1)
# CHECK-NEXT: 1 5 5.00 U fsub %st(2)
# CHECK-NEXT: 1 5 5.00 U fsub %st, %st(1)
# CHECK-NEXT: 1 5 5.00 U fsub %st(2), %st
# CHECK-NEXT: 1 5 5.00 * U fsubs (%ecx)
# CHECK-NEXT: 1 5 5.00 * U fsubl (%eax)
# CHECK-NEXT: 1 5 5.00 U fsubp %st(1)
# CHECK-NEXT: 1 5 5.00 U fsubp %st(2)
# CHECK-NEXT: 1 5 5.00 U fsubp %st, %st(1)
# CHECK-NEXT: 1 5 5.00 U fsubp %st, %st(2)
# CHECK-NEXT: 1 5 5.00 * U fisubs (%ecx)
# CHECK-NEXT: 1 5 5.00 * U fisubl (%eax)
# CHECK-NEXT: 1 5 5.00 U fsubr %st(0), %st(1)
# CHECK-NEXT: 1 5 5.00 U fsubr %st(2)
# CHECK-NEXT: 1 5 5.00 U fsubr %st, %st(1)
# CHECK-NEXT: 1 5 5.00 U fsubr %st(2), %st
# CHECK-NEXT: 1 5 5.00 * U fsubrs (%ecx)
# CHECK-NEXT: 1 5 5.00 * U fsubrl (%eax)
# CHECK-NEXT: 1 5 5.00 U fsubrp %st(1)
# CHECK-NEXT: 1 5 5.00 U fsubrp %st(2)
# CHECK-NEXT: 1 5 5.00 U fsubrp %st, %st(1)
# CHECK-NEXT: 1 5 5.00 U fsubrp %st, %st(2)
# CHECK-NEXT: 1 5 5.00 * U fisubrs (%ecx)
# CHECK-NEXT: 1 5 5.00 * U fisubrl (%eax)
# CHECK-NEXT: 1 9 4.50 U ftst
@ -343,8 +343,8 @@ fyl2xp1
# CHECK-NEXT: 1 1 1.00 U fucomp %st(1)
# CHECK-NEXT: 1 1 1.00 U fucomp %st(3)
# CHECK-NEXT: 1 1 1.00 U fucompp
# CHECK-NEXT: 1 9 4.50 U fucomi %st(3)
# CHECK-NEXT: 1 9 4.50 U fucompi %st(3)
# CHECK-NEXT: 1 9 4.50 U fucomi %st(3), %st
# CHECK-NEXT: 1 9 4.50 U fucompi %st(3), %st
# CHECK-NEXT: 1 1 0.50 U wait
# CHECK-NEXT: 1 1 1.00 U fxam
# CHECK-NEXT: 1 1 1.00 U fxch %st(1)
@ -367,26 +367,26 @@ fyl2xp1
# CHECK-NEXT: [0] [1] Instructions:
# CHECK-NEXT: 49.50 49.50 f2xm1
# CHECK-NEXT: - 1.00 fabs
# CHECK-NEXT: 5.00 - fadd %st(0), %st(1)
# CHECK-NEXT: 5.00 - fadd %st(2)
# CHECK-NEXT: 5.00 - fadd %st, %st(1)
# CHECK-NEXT: 5.00 - fadd %st(2), %st
# CHECK-NEXT: 5.00 - fadds (%ecx)
# CHECK-NEXT: 5.00 - faddl (%ecx)
# CHECK-NEXT: 5.00 - faddp %st(1)
# CHECK-NEXT: 5.00 - faddp %st(2)
# CHECK-NEXT: 5.00 - faddp %st, %st(1)
# CHECK-NEXT: 5.00 - faddp %st, %st(2)
# CHECK-NEXT: 5.00 - fiadds (%ecx)
# CHECK-NEXT: 5.00 - fiaddl (%ecx)
# CHECK-NEXT: 0.50 0.50 fbld (%ecx)
# CHECK-NEXT: 0.50 0.50 fbstp (%eax)
# CHECK-NEXT: - 1.00 fchs
# CHECK-NEXT: 12.50 12.50 fnclex
# CHECK-NEXT: 4.50 4.50 fcmovb %st(1), %st(0)
# CHECK-NEXT: 4.50 4.50 fcmovbe %st(1), %st(0)
# CHECK-NEXT: 4.50 4.50 fcmove %st(1), %st(0)
# CHECK-NEXT: 4.50 4.50 fcmovnb %st(1), %st(0)
# CHECK-NEXT: 4.50 4.50 fcmovnbe %st(1), %st(0)
# CHECK-NEXT: 4.50 4.50 fcmovne %st(1), %st(0)
# CHECK-NEXT: 4.50 4.50 fcmovnu %st(1), %st(0)
# CHECK-NEXT: 4.50 4.50 fcmovu %st(1), %st(0)
# CHECK-NEXT: 4.50 4.50 fcmovb %st(1), %st
# CHECK-NEXT: 4.50 4.50 fcmovbe %st(1), %st
# CHECK-NEXT: 4.50 4.50 fcmove %st(1), %st
# CHECK-NEXT: 4.50 4.50 fcmovnb %st(1), %st
# CHECK-NEXT: 4.50 4.50 fcmovnbe %st(1), %st
# CHECK-NEXT: 4.50 4.50 fcmovne %st(1), %st
# CHECK-NEXT: 4.50 4.50 fcmovnu %st(1), %st
# CHECK-NEXT: 4.50 4.50 fcmovu %st(1), %st
# CHECK-NEXT: 5.00 - fcom %st(1)
# CHECK-NEXT: 5.00 - fcom %st(3)
# CHECK-NEXT: 5.00 - fcoms (%ecx)
@ -396,24 +396,24 @@ fyl2xp1
# CHECK-NEXT: 5.00 - fcomps (%ecx)
# CHECK-NEXT: 5.00 - fcompl (%eax)
# CHECK-NEXT: - 1.00 fcompp
# CHECK-NEXT: 4.50 4.50 fcomi %st(3)
# CHECK-NEXT: 4.50 4.50 fcompi %st(3)
# CHECK-NEXT: 4.50 4.50 fcomi %st(3), %st
# CHECK-NEXT: 4.50 4.50 fcompi %st(3), %st
# CHECK-NEXT: 87.00 87.00 fcos
# CHECK-NEXT: 0.50 0.50 fdecstp
# CHECK-NEXT: 17.00 17.00 fdiv %st(0), %st(1)
# CHECK-NEXT: 17.00 17.00 fdiv %st(2)
# CHECK-NEXT: 17.00 17.00 fdiv %st, %st(1)
# CHECK-NEXT: 17.00 17.00 fdiv %st(2), %st
# CHECK-NEXT: 17.00 17.00 fdivs (%ecx)
# CHECK-NEXT: 17.00 17.00 fdivl (%eax)
# CHECK-NEXT: 17.00 17.00 fdivp %st(1)
# CHECK-NEXT: 17.00 17.00 fdivp %st(2)
# CHECK-NEXT: 17.00 17.00 fdivp %st, %st(1)
# CHECK-NEXT: 17.00 17.00 fdivp %st, %st(2)
# CHECK-NEXT: 17.00 17.00 fidivs (%ecx)
# CHECK-NEXT: 17.00 17.00 fidivl (%eax)
# CHECK-NEXT: 17.00 17.00 fdivr %st(0), %st(1)
# CHECK-NEXT: 17.00 17.00 fdivr %st(2)
# CHECK-NEXT: 17.00 17.00 fdivr %st, %st(1)
# CHECK-NEXT: 17.00 17.00 fdivr %st(2), %st
# CHECK-NEXT: 17.00 17.00 fdivrs (%ecx)
# CHECK-NEXT: 17.00 17.00 fdivrl (%eax)
# CHECK-NEXT: 17.00 17.00 fdivrp %st(1)
# CHECK-NEXT: 17.00 17.00 fdivrp %st(2)
# CHECK-NEXT: 17.00 17.00 fdivrp %st, %st(1)
# CHECK-NEXT: 17.00 17.00 fdivrp %st, %st(2)
# CHECK-NEXT: 17.00 17.00 fidivrs (%ecx)
# CHECK-NEXT: 17.00 17.00 fidivrl (%eax)
# CHECK-NEXT: 0.50 0.50 ffree %st(0)
@ -447,12 +447,12 @@ fyl2xp1
# CHECK-NEXT: 5.00 5.00 fldln2
# CHECK-NEXT: 5.00 5.00 fldpi
# CHECK-NEXT: 0.50 0.50 fldz
# CHECK-NEXT: 4.00 - fmul %st(0), %st(1)
# CHECK-NEXT: 4.00 - fmul %st(2)
# CHECK-NEXT: 4.00 - fmul %st, %st(1)
# CHECK-NEXT: 4.00 - fmul %st(2), %st
# CHECK-NEXT: 4.00 - fmuls (%ecx)
# CHECK-NEXT: 4.00 - fmull (%eax)
# CHECK-NEXT: 4.00 - fmulp %st(1)
# CHECK-NEXT: 4.00 - fmulp %st(2)
# CHECK-NEXT: 4.00 - fmulp %st, %st(1)
# CHECK-NEXT: 4.00 - fmulp %st, %st(2)
# CHECK-NEXT: 4.00 - fimuls (%ecx)
# CHECK-NEXT: 4.00 - fimull (%eax)
# CHECK-NEXT: 0.50 0.50 fnop
@ -480,20 +480,20 @@ fyl2xp1
# CHECK-NEXT: 0.50 0.50 frstor (%eax)
# CHECK-NEXT: 0.50 0.50 wait
# CHECK-NEXT: 0.50 0.50 fnsave (%eax)
# CHECK-NEXT: 5.00 - fsub %st(0), %st(1)
# CHECK-NEXT: 5.00 - fsub %st(2)
# CHECK-NEXT: 5.00 - fsub %st, %st(1)
# CHECK-NEXT: 5.00 - fsub %st(2), %st
# CHECK-NEXT: 5.00 - fsubs (%ecx)
# CHECK-NEXT: 5.00 - fsubl (%eax)
# CHECK-NEXT: 5.00 - fsubp %st(1)
# CHECK-NEXT: 5.00 - fsubp %st(2)
# CHECK-NEXT: 5.00 - fsubp %st, %st(1)
# CHECK-NEXT: 5.00 - fsubp %st, %st(2)
# CHECK-NEXT: 5.00 - fisubs (%ecx)
# CHECK-NEXT: 5.00 - fisubl (%eax)
# CHECK-NEXT: 5.00 - fsubr %st(0), %st(1)
# CHECK-NEXT: 5.00 - fsubr %st(2)
# CHECK-NEXT: 5.00 - fsubr %st, %st(1)
# CHECK-NEXT: 5.00 - fsubr %st(2), %st
# CHECK-NEXT: 5.00 - fsubrs (%ecx)
# CHECK-NEXT: 5.00 - fsubrl (%eax)
# CHECK-NEXT: 5.00 - fsubrp %st(1)
# CHECK-NEXT: 5.00 - fsubrp %st(2)
# CHECK-NEXT: 5.00 - fsubrp %st, %st(1)
# CHECK-NEXT: 5.00 - fsubrp %st, %st(2)
# CHECK-NEXT: 5.00 - fisubrs (%ecx)
# CHECK-NEXT: 5.00 - fisubrl (%eax)
# CHECK-NEXT: 4.50 4.50 ftst
@ -502,8 +502,8 @@ fyl2xp1
# CHECK-NEXT: - 1.00 fucomp %st(1)
# CHECK-NEXT: - 1.00 fucomp %st(3)
# CHECK-NEXT: - 1.00 fucompp
# CHECK-NEXT: 4.50 4.50 fucomi %st(3)
# CHECK-NEXT: 4.50 4.50 fucompi %st(3)
# CHECK-NEXT: 4.50 4.50 fucomi %st(3), %st
# CHECK-NEXT: 4.50 4.50 fucompi %st(3), %st
# CHECK-NEXT: 0.50 0.50 wait
# CHECK-NEXT: 1.00 - fxam
# CHECK-NEXT: 1.00 1.00 fxch %st(1)

172
test/tools/llvm-mca/X86/BdVer2/resources-x87.s
View File

@ -5,7 +5,7 @@ f2xm1
fabs
fadd %st(0), %st(1)
fadd %st, %st(1)
fadd %st(2)
fadds (%ecx)
faddl (%ecx)
@ -21,14 +21,14 @@ fchs
fnclex
fcmovb %st(1), %st(0)
fcmovbe %st(1), %st(0)
fcmove %st(1), %st(0)
fcmovnb %st(1), %st(0)
fcmovnbe %st(1), %st(0)
fcmovne %st(1), %st(0)
fcmovnu %st(1), %st(0)
fcmovu %st(1), %st(0)
fcmovb %st(1), %st
fcmovbe %st(1), %st
fcmove %st(1), %st
fcmovnb %st(1), %st
fcmovnbe %st(1), %st
fcmovne %st(1), %st
fcmovnu %st(1), %st
fcmovu %st(1), %st
fcom %st(1)
fcom %st(3)
@ -47,7 +47,7 @@ fcos
fdecstp
fdiv %st(0), %st(1)
fdiv %st, %st(1)
fdiv %st(2)
fdivs (%ecx)
fdivl (%eax)
@ -56,7 +56,7 @@ fdivp %st(2)
fidivs (%ecx)
fidivl (%eax)
fdivr %st(0), %st(1)
fdivr %st, %st(1)
fdivr %st(2)
fdivrs (%ecx)
fdivrl (%eax)
@ -106,7 +106,7 @@ fldln2
fldpi
fldz
fmul %st(0), %st(1)
fmul %st, %st(1)
fmul %st(2)
fmuls (%ecx)
fmull (%eax)
@ -153,7 +153,7 @@ fnstsw (%eax)
frstor (%eax)
fsave (%eax)
fsub %st(0), %st(1)
fsub %st, %st(1)
fsub %st(2)
fsubs (%ecx)
fsubl (%eax)
@ -162,7 +162,7 @@ fsubp %st(2)
fisubs (%ecx)
fisubl (%eax)
fsubr %st(0), %st(1)
fsubr %st, %st(1)
fsubr %st(2)
fsubrs (%ecx)
fsubrl (%eax)
@ -208,26 +208,26 @@ fyl2xp1
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 100 0.50 U f2xm1
# CHECK-NEXT: 1 1 1.00 U fabs
# CHECK-NEXT: 1 5 1.00 U fadd %st(0), %st(1)
# CHECK-NEXT: 1 5 1.00 U fadd %st(2)
# CHECK-NEXT: 1 5 1.00 U fadd %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fadd %st(2), %st
# CHECK-NEXT: 1 10 1.00 * U fadds (%ecx)
# CHECK-NEXT: 1 10 1.00 * U faddl (%ecx)
# CHECK-NEXT: 1 5 1.00 U faddp %st(1)
# CHECK-NEXT: 1 5 1.00 U faddp %st(2)
# CHECK-NEXT: 1 5 1.00 U faddp %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U faddp %st, %st(2)
# CHECK-NEXT: 1 10 1.00 * U fiadds (%ecx)
# CHECK-NEXT: 1 10 1.00 * U fiaddl (%ecx)
# CHECK-NEXT: 1 100 0.50 U fbld (%ecx)
# CHECK-NEXT: 1 100 0.50 U fbstp (%eax)
# CHECK-NEXT: 1 1 1.00 U fchs
# CHECK-NEXT: 1 100 0.50 U fnclex
# CHECK-NEXT: 1 1 1.00 U fcmovb %st(1), %st(0)
# CHECK-NEXT: 1 1 1.00 U fcmovbe %st(1), %st(0)
# CHECK-NEXT: 1 1 1.00 U fcmove %st(1), %st(0)
# CHECK-NEXT: 1 1 1.00 U fcmovnb %st(1), %st(0)
# CHECK-NEXT: 1 1 1.00 U fcmovnbe %st(1), %st(0)
# CHECK-NEXT: 1 1 1.00 U fcmovne %st(1), %st(0)
# CHECK-NEXT: 1 1 1.00 U fcmovnu %st(1), %st(0)
# CHECK-NEXT: 1 1 1.00 U fcmovu %st(1), %st(0)
# CHECK-NEXT: 1 1 1.00 U fcmovb %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcmovbe %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcmove %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcmovnb %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcmovnbe %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcmovne %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcmovnu %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcmovu %st(1), %st
# CHECK-NEXT: 2 1 1.00 U fcom %st(1)
# CHECK-NEXT: 2 1 1.00 U fcom %st(3)
# CHECK-NEXT: 1 6 1.00 U fcoms (%ecx)
@ -237,24 +237,24 @@ fyl2xp1
# CHECK-NEXT: 1 6 1.00 U fcomps (%ecx)
# CHECK-NEXT: 1 6 1.00 U fcompl (%eax)
# CHECK-NEXT: 1 100 0.50 U fcompp
# CHECK-NEXT: 2 1 1.00 U fcomi %st(3)
# CHECK-NEXT: 2 1 1.00 U fcompi %st(3)
# CHECK-NEXT: 2 1 1.00 U fcomi %st(3), %st
# CHECK-NEXT: 2 1 1.00 U fcompi %st(3), %st
# CHECK-NEXT: 1 100 0.50 U fcos
# CHECK-NEXT: 1 100 0.50 U fdecstp
# CHECK-NEXT: 1 9 9.50 U fdiv %st(0), %st(1)
# CHECK-NEXT: 1 9 9.50 U fdiv %st(2)
# CHECK-NEXT: 1 9 9.50 U fdiv %st, %st(1)
# CHECK-NEXT: 1 9 9.50 U fdiv %st(2), %st
# CHECK-NEXT: 1 14 9.50 * U fdivs (%ecx)
# CHECK-NEXT: 1 14 9.50 * U fdivl (%eax)
# CHECK-NEXT: 1 9 9.50 U fdivp %st(1)
# CHECK-NEXT: 1 9 9.50 U fdivp %st(2)
# CHECK-NEXT: 1 9 9.50 U fdivp %st, %st(1)
# CHECK-NEXT: 1 9 9.50 U fdivp %st, %st(2)
# CHECK-NEXT: 1 14 9.50 * U fidivs (%ecx)
# CHECK-NEXT: 1 14 9.50 * U fidivl (%eax)
# CHECK-NEXT: 1 9 9.50 U fdivr %st(0), %st(1)
# CHECK-NEXT: 1 9 9.50 U fdivr %st(2)
# CHECK-NEXT: 1 9 9.50 U fdivr %st, %st(1)
# CHECK-NEXT: 1 9 9.50 U fdivr %st(2), %st
# CHECK-NEXT: 1 14 9.50 * U fdivrs (%ecx)
# CHECK-NEXT: 1 14 9.50 * U fdivrl (%eax)
# CHECK-NEXT: 1 9 9.50 U fdivrp %st(1)
# CHECK-NEXT: 1 9 9.50 U fdivrp %st(2)
# CHECK-NEXT: 1 9 9.50 U fdivrp %st, %st(1)
# CHECK-NEXT: 1 9 9.50 U fdivrp %st, %st(2)
# CHECK-NEXT: 1 14 9.50 * U fidivrs (%ecx)
# CHECK-NEXT: 1 14 9.50 * U fidivrl (%eax)
# CHECK-NEXT: 1 100 0.50 U ffree %st(0)
@ -288,12 +288,12 @@ fyl2xp1
# CHECK-NEXT: 1 3 1.00 U fldln2
# CHECK-NEXT: 1 3 1.00 U fldpi
# CHECK-NEXT: 1 3 1.00 U fldz
# CHECK-NEXT: 1 5 1.00 U fmul %st(0), %st(1)
# CHECK-NEXT: 1 5 1.00 U fmul %st(2)
# CHECK-NEXT: 1 5 1.00 U fmul %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fmul %st(2), %st
# CHECK-NEXT: 1 10 1.00 * U fmuls (%ecx)
# CHECK-NEXT: 1 10 1.00 * U fmull (%eax)
# CHECK-NEXT: 1 5 1.00 U fmulp %st(1)
# CHECK-NEXT: 1 5 1.00 U fmulp %st(2)
# CHECK-NEXT: 1 5 1.00 U fmulp %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fmulp %st, %st(2)
# CHECK-NEXT: 1 10 1.00 * U fimuls (%ecx)
# CHECK-NEXT: 1 10 1.00 * U fimull (%eax)
# CHECK-NEXT: 1 1 0.50 U fnop
@ -321,20 +321,20 @@ fyl2xp1
# CHECK-NEXT: 1 100 0.50 U frstor (%eax)
# CHECK-NEXT: 1 100 0.50 U wait
# CHECK-NEXT: 1 100 0.50 U fnsave (%eax)
# CHECK-NEXT: 1 5 1.00 U fsub %st(0), %st(1)
# CHECK-NEXT: 1 5 1.00 U fsub %st(2)
# CHECK-NEXT: 1 5 1.00 U fsub %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fsub %st(2), %st
# CHECK-NEXT: 1 10 1.00 * U fsubs (%ecx)
# CHECK-NEXT: 1 10 1.00 * U fsubl (%eax)
# CHECK-NEXT: 1 5 1.00 U fsubp %st(1)
# CHECK-NEXT: 1 5 1.00 U fsubp %st(2)
# CHECK-NEXT: 1 5 1.00 U fsubp %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fsubp %st, %st(2)
# CHECK-NEXT: 1 10 1.00 * U fisubs (%ecx)
# CHECK-NEXT: 1 10 1.00 * U fisubl (%eax)
# CHECK-NEXT: 1 5 1.00 U fsubr %st(0), %st(1)
# CHECK-NEXT: 1 5 1.00 U fsubr %st(2)
# CHECK-NEXT: 1 5 1.00 U fsubr %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fsubr %st(2), %st
# CHECK-NEXT: 1 10 1.00 * U fsubrs (%ecx)
# CHECK-NEXT: 1 10 1.00 * U fsubrl (%eax)
# CHECK-NEXT: 1 5 1.00 U fsubrp %st(1)
# CHECK-NEXT: 1 5 1.00 U fsubrp %st(2)
# CHECK-NEXT: 1 5 1.00 U fsubrp %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fsubrp %st, %st(2)
# CHECK-NEXT: 1 10 1.00 * U fisubrs (%ecx)
# CHECK-NEXT: 1 10 1.00 * U fisubrl (%eax)
# CHECK-NEXT: 1 1 1.00 U ftst
@ -343,8 +343,8 @@ fyl2xp1
# CHECK-NEXT: 2 1 1.00 U fucomp %st(1)
# CHECK-NEXT: 2 1 1.00 U fucomp %st(3)
# CHECK-NEXT: 1 1 1.00 U fucompp
# CHECK-NEXT: 2 1 1.00 U fucomi %st(3)
# CHECK-NEXT: 2 1 1.00 U fucompi %st(3)
# CHECK-NEXT: 2 1 1.00 U fucomi %st(3), %st
# CHECK-NEXT: 2 1 1.00 U fucompi %st(3), %st
# CHECK-NEXT: 1 100 0.50 U wait
# CHECK-NEXT: 1 100 0.50 U fxam
# CHECK-NEXT: 1 1 0.50 U fxch %st(1)
@ -388,26 +388,26 @@ fyl2xp1
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions:
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - f2xm1
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fabs
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fadd %st(0), %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fadd %st(2)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fadd %st, %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fadd %st(2), %st
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fadds (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - faddl (%ecx)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - faddp %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - faddp %st(2)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - faddp %st, %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - faddp %st, %st(2)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fiadds (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fiaddl (%ecx)
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fbld (%ecx)
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fbstp (%eax)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fchs
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fnclex
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovb %st(1), %st(0)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovbe %st(1), %st(0)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmove %st(1), %st(0)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovnb %st(1), %st(0)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovnbe %st(1), %st(0)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovne %st(1), %st(0)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovnu %st(1), %st(0)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovu %st(1), %st(0)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovb %st(1), %st
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovbe %st(1), %st
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmove %st(1), %st
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovnb %st(1), %st
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovnbe %st(1), %st
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovne %st(1), %st
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovnu %st(1), %st
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcmovu %st(1), %st
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcom %st(1)
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcom %st(3)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fcoms (%ecx)
@ -417,24 +417,24 @@ fyl2xp1
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fcomps (%ecx)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fcompl (%eax)
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fcompp
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcomi %st(3)
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcompi %st(3)
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcomi %st(3), %st
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fcompi %st(3), %st
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fcos
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fdecstp
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdiv %st(0), %st(1)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdiv %st(2)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdiv %st, %st(1)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdiv %st(2), %st
# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - 0.50 0.50 - - fdivs (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - 0.50 0.50 - - fdivl (%eax)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivp %st(1)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivp %st(2)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivp %st, %st(1)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivp %st, %st(2)
# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - 0.50 0.50 - - fidivs (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - 0.50 0.50 - - fidivl (%eax)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivr %st(0), %st(1)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivr %st(2)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivr %st, %st(1)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivr %st(2), %st
# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - 0.50 0.50 - - fdivrs (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - 0.50 0.50 - - fdivrl (%eax)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivrp %st(1)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivrp %st(2)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivrp %st, %st(1)
# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - - - - fdivrp %st, %st(2)
# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - 0.50 0.50 - - fidivrs (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - 0.50 0.50 - - fidivrl (%eax)
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - ffree %st(0)
@ -468,12 +468,12 @@ fyl2xp1
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - - - - fldln2
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - - - - fldpi
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - - - - fldz
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fmul %st(0), %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fmul %st(2)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fmul %st, %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fmul %st(2), %st
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - 0.50 0.50 - - fmuls (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - 0.50 0.50 - - fmull (%eax)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fmulp %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fmulp %st(2)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fmulp %st, %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fmulp %st, %st(2)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - 0.50 0.50 - - fimuls (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - 0.50 0.50 - - fimull (%eax)
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fnop
@ -501,20 +501,20 @@ fyl2xp1
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - frstor (%eax)
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - wait
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fnsave (%eax)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsub %st(0), %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsub %st(2)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsub %st, %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsub %st(2), %st
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fsubs (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fsubl (%eax)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubp %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubp %st(2)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubp %st, %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubp %st, %st(2)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fisubs (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fisubl (%eax)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubr %st(0), %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubr %st(2)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubr %st, %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubr %st(2), %st
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fsubrs (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fsubrl (%eax)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubrp %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubrp %st(2)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubrp %st, %st(1)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - - - - fsubrp %st, %st(2)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fisubrs (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - 0.50 0.50 - - fisubrl (%eax)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - ftst
@ -523,8 +523,8 @@ fyl2xp1
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fucomp %st(1)
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fucomp %st(3)
# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - - - - fucompp
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fucomi %st(3)
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fucompi %st(3)
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fucomi %st(3), %st
# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - - - - fucompi %st(3), %st
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - wait
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fxam
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - fxch %st(1)

172
test/tools/llvm-mca/X86/Broadwell/resources-x87.s
View File

@ -5,7 +5,7 @@ f2xm1
fabs
fadd %st(0), %st(1)
fadd %st, %st(1)
fadd %st(2)
fadds (%ecx)
faddl (%ecx)
@ -21,14 +21,14 @@ fchs
fnclex
fcmovb %st(1), %st(0)
fcmovbe %st(1), %st(0)
fcmove %st(1), %st(0)
fcmovnb %st(1), %st(0)
fcmovnbe %st(1), %st(0)
fcmovne %st(1), %st(0)
fcmovnu %st(1), %st(0)
fcmovu %st(1), %st(0)
fcmovb %st(1), %st
fcmovbe %st(1), %st
fcmove %st(1), %st
fcmovnb %st(1), %st
fcmovnbe %st(1), %st
fcmovne %st(1), %st
fcmovnu %st(1), %st
fcmovu %st(1), %st
fcom %st(1)
fcom %st(3)
@ -47,7 +47,7 @@ fcos
fdecstp
fdiv %st(0), %st(1)
fdiv %st, %st(1)
fdiv %st(2)
fdivs (%ecx)
fdivl (%eax)
@ -56,7 +56,7 @@ fdivp %st(2)
fidivs (%ecx)
fidivl (%eax)
fdivr %st(0), %st(1)
fdivr %st, %st(1)
fdivr %st(2)
fdivrs (%ecx)
fdivrl (%eax)
@ -106,7 +106,7 @@ fldln2
fldpi
fldz
fmul %st(0), %st(1)
fmul %st, %st(1)
fmul %st(2)
fmuls (%ecx)
fmull (%eax)
@ -153,7 +153,7 @@ fnstsw (%eax)
frstor (%eax)
fsave (%eax)
fsub %st(0), %st(1)
fsub %st, %st(1)
fsub %st(2)
fsubs (%ecx)
fsubl (%eax)
@ -162,7 +162,7 @@ fsubp %st(2)
fisubs (%ecx)
fisubl (%eax)
fsubr %st(0), %st(1)
fsubr %st, %st(1)
fsubr %st(2)
fsubrs (%ecx)
fsubrl (%eax)
@ -208,26 +208,26 @@ fyl2xp1
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 100 0.25 U f2xm1
# CHECK-NEXT: 1 1 1.00 U fabs
# CHECK-NEXT: 1 3 1.00 U fadd %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fadd %st(2)
# CHECK-NEXT: 1 3 1.00 U fadd %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fadd %st(2), %st
# CHECK-NEXT: 2 9 1.00 * U fadds (%ecx)
# CHECK-NEXT: 2 9 1.00 * U faddl (%ecx)
# CHECK-NEXT: 1 3 1.00 U faddp %st(1)
# CHECK-NEXT: 1 3 1.00 U faddp %st(2)
# CHECK-NEXT: 1 3 1.00 U faddp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U faddp %st, %st(2)
# CHECK-NEXT: 3 12 2.00 * U fiadds (%ecx)
# CHECK-NEXT: 3 12 2.00 * U fiaddl (%ecx)
# CHECK-NEXT: 1 100 0.25 U fbld (%ecx)
# CHECK-NEXT: 2 1 1.00 U fbstp (%eax)
# CHECK-NEXT: 1 1 1.00 U fchs
# CHECK-NEXT: 4 4 1.00 U fnclex
# CHECK-NEXT: 1 3 1.00 U fcmovb %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovbe %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmove %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovnb %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovnbe %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovne %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovnu %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovu %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovb %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovbe %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmove %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovnb %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovnbe %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovne %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovnu %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovu %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcom %st(1)
# CHECK-NEXT: 1 1 1.00 U fcom %st(3)
# CHECK-NEXT: 2 7 1.00 U fcoms (%ecx)
@ -237,24 +237,24 @@ fyl2xp1
# CHECK-NEXT: 2 7 1.00 U fcomps (%ecx)
# CHECK-NEXT: 2 7 1.00 U fcompl (%eax)
# CHECK-NEXT: 1 100 0.25 U fcompp
# CHECK-NEXT: 1 3 1.00 U fcomi %st(3)
# CHECK-NEXT: 1 3 1.00 U fcompi %st(3)
# CHECK-NEXT: 1 3 1.00 U fcomi %st(3), %st
# CHECK-NEXT: 1 3 1.00 U fcompi %st(3), %st
# CHECK-NEXT: 1 100 0.25 U fcos
# CHECK-NEXT: 2 2 1.00 U fdecstp
# CHECK-NEXT: 1 15 1.00 U fdiv %st(0), %st(1)
# CHECK-NEXT: 1 20 1.00 U fdiv %st(2)
# CHECK-NEXT: 1 15 1.00 U fdiv %st, %st(1)
# CHECK-NEXT: 1 20 1.00 U fdiv %st(2), %st
# CHECK-NEXT: 2 21 1.00 * U fdivs (%ecx)
# CHECK-NEXT: 2 21 1.00 * U fdivl (%eax)
# CHECK-NEXT: 1 15 1.00 U fdivp %st(1)
# CHECK-NEXT: 1 15 1.00 U fdivp %st(2)
# CHECK-NEXT: 1 15 1.00 U fdivp %st, %st(1)
# CHECK-NEXT: 1 15 1.00 U fdivp %st, %st(2)
# CHECK-NEXT: 3 24 1.00 * U fidivs (%ecx)
# CHECK-NEXT: 3 24 1.00 * U fidivl (%eax)
# CHECK-NEXT: 1 20 1.00 U fdivr %st(0), %st(1)
# CHECK-NEXT: 1 15 1.00 U fdivr %st(2)
# CHECK-NEXT: 1 20 1.00 U fdivr %st, %st(1)
# CHECK-NEXT: 1 15 1.00 U fdivr %st(2), %st
# CHECK-NEXT: 2 26 1.00 * U fdivrs (%ecx)
# CHECK-NEXT: 2 26 1.00 * U fdivrl (%eax)
# CHECK-NEXT: 1 20 1.00 U fdivrp %st(1)
# CHECK-NEXT: 1 20 1.00 U fdivrp %st(2)
# CHECK-NEXT: 1 20 1.00 U fdivrp %st, %st(1)
# CHECK-NEXT: 1 20 1.00 U fdivrp %st, %st(2)
# CHECK-NEXT: 3 29 1.00 * U fidivrs (%ecx)
# CHECK-NEXT: 3 29 1.00 * U fidivrl (%eax)
# CHECK-NEXT: 1 100 0.25 U ffree %st(0)
@ -288,12 +288,12 @@ fyl2xp1
# CHECK-NEXT: 2 1 1.00 U fldln2
# CHECK-NEXT: 2 1 1.00 U fldpi
# CHECK-NEXT: 1 1 0.50 U fldz
# CHECK-NEXT: 1 5 1.00 U fmul %st(0), %st(1)
# CHECK-NEXT: 1 5 1.00 U fmul %st(2)
# CHECK-NEXT: 1 5 1.00 U fmul %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fmul %st(2), %st
# CHECK-NEXT: 2 11 1.00 * U fmuls (%ecx)
# CHECK-NEXT: 2 11 1.00 * U fmull (%eax)
# CHECK-NEXT: 1 5 1.00 U fmulp %st(1)
# CHECK-NEXT: 1 5 1.00 U fmulp %st(2)
# CHECK-NEXT: 1 5 1.00 U fmulp %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fmulp %st, %st(2)
# CHECK-NEXT: 3 14 1.00 * U fimuls (%ecx)
# CHECK-NEXT: 3 14 1.00 * U fimull (%eax)
# CHECK-NEXT: 1 1 0.50 U fnop
@ -321,20 +321,20 @@ fyl2xp1
# CHECK-NEXT: 1 100 0.25 U frstor (%eax)
# CHECK-NEXT: 2 2 0.50 U wait
# CHECK-NEXT: 1 100 0.25 U fnsave (%eax)
# CHECK-NEXT: 1 3 1.00 U fsub %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fsub %st(2)
# CHECK-NEXT: 1 3 1.00 U fsub %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsub %st(2), %st
# CHECK-NEXT: 2 9 1.00 * U fsubs (%ecx)
# CHECK-NEXT: 2 9 1.00 * U fsubl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubp %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubp %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubp %st, %st(2)
# CHECK-NEXT: 3 12 2.00 * U fisubs (%ecx)
# CHECK-NEXT: 3 12 2.00 * U fisubl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubr %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(2), %st
# CHECK-NEXT: 2 9 1.00 * U fsubrs (%ecx)
# CHECK-NEXT: 2 9 1.00 * U fsubrl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st, %st(2)
# CHECK-NEXT: 3 12 2.00 * U fisubrs (%ecx)
# CHECK-NEXT: 3 12 2.00 * U fisubrl (%eax)
# CHECK-NEXT: 1 3 1.00 U ftst
@ -343,8 +343,8 @@ fyl2xp1
# CHECK-NEXT: 1 1 1.00 U fucomp %st(1)
# CHECK-NEXT: 1 1 1.00 U fucomp %st(3)
# CHECK-NEXT: 1 3 1.00 U fucompp
# CHECK-NEXT: 1 3 1.00 U fucomi %st(3)
# CHECK-NEXT: 1 3 1.00 U fucompi %st(3)
# CHECK-NEXT: 1 3 1.00 U fucomi %st(3), %st
# CHECK-NEXT: 1 3 1.00 U fucompi %st(3), %st
# CHECK-NEXT: 2 2 0.50 U wait
# CHECK-NEXT: 1 100 0.25 U fxam
# CHECK-NEXT: 12 14 4.00 U fxch %st(1)
@ -375,26 +375,26 @@ fyl2xp1
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - f2xm1
# CHECK-NEXT: - - - - - - - 1.00 - - fabs
# CHECK-NEXT: - - - 1.00 - - - - - - fadd %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fadd %st(2)
# CHECK-NEXT: - - - 1.00 - - - - - - fadd %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fadd %st(2), %st
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - fadds (%ecx)
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - faddl (%ecx)
# CHECK-NEXT: - - - 1.00 - - - - - - faddp %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - faddp %st(2)
# CHECK-NEXT: - - - 1.00 - - - - - - faddp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - faddp %st, %st(2)
# CHECK-NEXT: - - - 2.00 0.50 0.50 - - - - fiadds (%ecx)
# CHECK-NEXT: - - - 2.00 0.50 0.50 - - - - fiaddl (%ecx)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - fbld (%ecx)
# CHECK-NEXT: - - - - 0.33 0.33 1.00 - - 0.33 fbstp (%eax)
# CHECK-NEXT: - - - - - - - 1.00 - - fchs
# CHECK-NEXT: - - 1.00 1.00 - - - 1.00 1.00 - fnclex
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovb %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovbe %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - - - - - - fcmove %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovnb %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovnbe %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovne %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovnu %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovu %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovb %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovbe %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcmove %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovnb %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovnbe %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovne %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovnu %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcmovu %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcom %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fcom %st(3)
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - fcoms (%ecx)
@ -404,24 +404,24 @@ fyl2xp1
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - fcomps (%ecx)
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - fcompl (%eax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - fcompp
# CHECK-NEXT: - - - 1.00 - - - - - - fcomi %st(3)
# CHECK-NEXT: - - - 1.00 - - - - - - fcompi %st(3)
# CHECK-NEXT: - - - 1.00 - - - - - - fcomi %st(3), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fcompi %st(3), %st
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - fcos
# CHECK-NEXT: - - 1.00 1.00 - - - - - - fdecstp
# CHECK-NEXT: - - 1.00 - - - - - - - fdiv %st(0), %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fdiv %st(2)
# CHECK-NEXT: - - 1.00 - - - - - - - fdiv %st, %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fdiv %st(2), %st
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - fdivs (%ecx)
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - fdivl (%eax)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivp %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivp %st(2)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivp %st, %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivp %st, %st(2)
# CHECK-NEXT: - - 1.00 1.00 0.50 0.50 - - - - fidivs (%ecx)
# CHECK-NEXT: - - 1.00 1.00 0.50 0.50 - - - - fidivl (%eax)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivr %st(0), %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivr %st(2)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivr %st, %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivr %st(2), %st
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - fdivrs (%ecx)
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - fdivrl (%eax)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivrp %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivrp %st(2)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivrp %st, %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fdivrp %st, %st(2)
# CHECK-NEXT: - - 1.00 1.00 0.50 0.50 - - - - fidivrs (%ecx)
# CHECK-NEXT: - - 1.00 1.00 0.50 0.50 - - - - fidivrl (%eax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - ffree %st(0)
@ -455,12 +455,12 @@ fyl2xp1
# CHECK-NEXT: - - 1.00 1.00 - - - - - - fldln2
# CHECK-NEXT: - - 1.00 1.00 - - - - - - fldpi
# CHECK-NEXT: - - 0.50 0.50 - - - - - - fldz
# CHECK-NEXT: - - 1.00 - - - - - - - fmul %st(0), %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fmul %st(2)
# CHECK-NEXT: - - 1.00 - - - - - - - fmul %st, %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fmul %st(2), %st
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - fmuls (%ecx)
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - fmull (%eax)
# CHECK-NEXT: - - 1.00 - - - - - - - fmulp %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fmulp %st(2)
# CHECK-NEXT: - - 1.00 - - - - - - - fmulp %st, %st(1)
# CHECK-NEXT: - - 1.00 - - - - - - - fmulp %st, %st(2)
# CHECK-NEXT: - - 1.00 1.00 0.50 0.50 - - - - fimuls (%ecx)
# CHECK-NEXT: - - 1.00 1.00 0.50 0.50 - - - - fimull (%eax)
# CHECK-NEXT: - - 0.50 0.50 - - - - - - fnop
@ -488,20 +488,20 @@ fyl2xp1
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - frstor (%eax)
# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - wait
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - fnsave (%eax)
# CHECK-NEXT: - - - 1.00 - - - - - - fsub %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fsub %st(2)
# CHECK-NEXT: - - - 1.00 - - - - - - fsub %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fsub %st(2), %st
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - fsubs (%ecx)
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - fsubl (%eax)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubp %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubp %st(2)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubp %st, %st(2)
# CHECK-NEXT: - - - 2.00 0.50 0.50 - - - - fisubs (%ecx)
# CHECK-NEXT: - - - 2.00 0.50 0.50 - - - - fisubl (%eax)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubr %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubr %st(2)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubr %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubr %st(2), %st
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - fsubrs (%ecx)
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - fsubrl (%eax)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubrp %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubrp %st(2)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubrp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fsubrp %st, %st(2)
# CHECK-NEXT: - - - 2.00 0.50 0.50 - - - - fisubrs (%ecx)
# CHECK-NEXT: - - - 2.00 0.50 0.50 - - - - fisubrl (%eax)
# CHECK-NEXT: - - - 1.00 - - - - - - ftst
@ -510,8 +510,8 @@ fyl2xp1
# CHECK-NEXT: - - - 1.00 - - - - - - fucomp %st(1)
# CHECK-NEXT: - - - 1.00 - - - - - - fucomp %st(3)
# CHECK-NEXT: - - - 1.00 - - - - - - fucompp
# CHECK-NEXT: - - - 1.00 - - - - - - fucomi %st(3)
# CHECK-NEXT: - - - 1.00 - - - - - - fucompi %st(3)
# CHECK-NEXT: - - - 1.00 - - - - - - fucomi %st(3), %st
# CHECK-NEXT: - - - 1.00 - - - - - - fucompi %st(3), %st
# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - wait
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - fxam
# CHECK-NEXT: - - 3.25 2.25 - - - 1.25 5.25 - fxch %st(1)

172
test/tools/llvm-mca/X86/BtVer2/resources-x87.s
View File

@ -5,7 +5,7 @@ f2xm1
fabs
fadd %st(0), %st(1)
fadd %st, %st(1)
fadd %st(2)
fadds (%ecx)
faddl (%ecx)
@ -21,14 +21,14 @@ fchs
fnclex
fcmovb %st(1), %st(0)
fcmovbe %st(1), %st(0)
fcmove %st(1), %st(0)
fcmovnb %st(1), %st(0)
fcmovnbe %st(1), %st(0)
fcmovne %st(1), %st(0)
fcmovnu %st(1), %st(0)
fcmovu %st(1), %st(0)
fcmovb %st(1), %st
fcmovbe %st(1), %st
fcmove %st(1), %st
fcmovnb %st(1), %st
fcmovnbe %st(1), %st
fcmovne %st(1), %st
fcmovnu %st(1), %st
fcmovu %st(1), %st
fcom %st(1)
fcom %st(3)
@ -47,7 +47,7 @@ fcos
fdecstp
fdiv %st(0), %st(1)
fdiv %st, %st(1)
fdiv %st(2)
fdivs (%ecx)
fdivl (%eax)
@ -56,7 +56,7 @@ fdivp %st(2)
fidivs (%ecx)
fidivl (%eax)
fdivr %st(0), %st(1)
fdivr %st, %st(1)
fdivr %st(2)
fdivrs (%ecx)
fdivrl (%eax)
@ -106,7 +106,7 @@ fldln2
fldpi
fldz
fmul %st(0), %st(1)
fmul %st, %st(1)
fmul %st(2)
fmuls (%ecx)
fmull (%eax)
@ -153,7 +153,7 @@ fnstsw (%eax)
frstor (%eax)
fsave (%eax)
fsub %st(0), %st(1)
fsub %st, %st(1)
fsub %st(2)
fsubs (%ecx)
fsubl (%eax)
@ -162,7 +162,7 @@ fsubp %st(2)
fisubs (%ecx)
fisubl (%eax)
fsubr %st(0), %st(1)
fsubr %st, %st(1)
fsubr %st(2)
fsubrs (%ecx)
fsubrl (%eax)
@ -208,26 +208,26 @@ fyl2xp1
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 100 0.50 U f2xm1
# CHECK-NEXT: 1 2 1.00 U fabs
# CHECK-NEXT: 1 3 1.00 U fadd %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fadd %st(2)
# CHECK-NEXT: 1 3 1.00 U fadd %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fadd %st(2), %st
# CHECK-NEXT: 1 8 1.00 * U fadds (%ecx)
# CHECK-NEXT: 1 8 1.00 * U faddl (%ecx)
# CHECK-NEXT: 1 3 1.00 U faddp %st(1)
# CHECK-NEXT: 1 3 1.00 U faddp %st(2)
# CHECK-NEXT: 1 3 1.00 U faddp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U faddp %st, %st(2)
# CHECK-NEXT: 1 8 1.00 * U fiadds (%ecx)
# CHECK-NEXT: 1 8 1.00 * U fiaddl (%ecx)
# CHECK-NEXT: 1 100 0.50 U fbld (%ecx)
# CHECK-NEXT: 1 100 0.50 U fbstp (%eax)
# CHECK-NEXT: 1 2 1.00 U fchs
# CHECK-NEXT: 1 100 0.50 U fnclex
# CHECK-NEXT: 1 3 1.00 U fcmovb %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovbe %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmove %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovnb %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovnbe %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovne %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovnu %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovu %st(1), %st(0)
# CHECK-NEXT: 1 3 1.00 U fcmovb %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovbe %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmove %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovnb %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovnbe %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovne %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovnu %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcmovu %st(1), %st
# CHECK-NEXT: 1 3 1.00 U fcom %st(1)
# CHECK-NEXT: 1 3 1.00 U fcom %st(3)
# CHECK-NEXT: 1 8 1.00 U fcoms (%ecx)
@ -237,24 +237,24 @@ fyl2xp1
# CHECK-NEXT: 1 8 1.00 U fcomps (%ecx)
# CHECK-NEXT: 1 8 1.00 U fcompl (%eax)
# CHECK-NEXT: 1 100 0.50 U fcompp
# CHECK-NEXT: 1 3 1.00 U fcomi %st(3)
# CHECK-NEXT: 1 3 1.00 U fcompi %st(3)
# CHECK-NEXT: 1 3 1.00 U fcomi %st(3), %st
# CHECK-NEXT: 1 3 1.00 U fcompi %st(3), %st
# CHECK-NEXT: 1 100 0.50 U fcos
# CHECK-NEXT: 1 100 0.50 U fdecstp
# CHECK-NEXT: 1 19 19.00 U fdiv %st(0), %st(1)
# CHECK-NEXT: 1 19 19.00 U fdiv %st(2)
# CHECK-NEXT: 1 19 19.00 U fdiv %st, %st(1)
# CHECK-NEXT: 1 19 19.00 U fdiv %st(2), %st
# CHECK-NEXT: 1 24 19.00 * U fdivs (%ecx)
# CHECK-NEXT: 1 24 19.00 * U fdivl (%eax)
# CHECK-NEXT: 1 19 19.00 U fdivp %st(1)
# CHECK-NEXT: 1 19 19.00 U fdivp %st(2)
# CHECK-NEXT: 1 19 19.00 U fdivp %st, %st(1)
# CHECK-NEXT: 1 19 19.00 U fdivp %st, %st(2)
# CHECK-NEXT: 1 24 19.00 * U fidivs (%ecx)
# CHECK-NEXT: 1 24 19.00 * U fidivl (%eax)
# CHECK-NEXT: 1 19 19.00 U fdivr %st(0), %st(1)
# CHECK-NEXT: 1 19 19.00 U fdivr %st(2)
# CHECK-NEXT: 1 19 19.00 U fdivr %st, %st(1)
# CHECK-NEXT: 1 19 19.00 U fdivr %st(2), %st
# CHECK-NEXT: 1 24 19.00 * U fdivrs (%ecx)
# CHECK-NEXT: 1 24 19.00 * U fdivrl (%eax)
# CHECK-NEXT: 1 19 19.00 U fdivrp %st(1)
# CHECK-NEXT: 1 19 19.00 U fdivrp %st(2)
# CHECK-NEXT: 1 19 19.00 U fdivrp %st, %st(1)
# CHECK-NEXT: 1 19 19.00 U fdivrp %st, %st(2)
# CHECK-NEXT: 1 24 19.00 * U fidivrs (%ecx)
# CHECK-NEXT: 1 24 19.00 * U fidivrl (%eax)
# CHECK-NEXT: 1 100 0.50 U ffree %st(0)
@ -288,12 +288,12 @@ fyl2xp1
# CHECK-NEXT: 1 3 1.00 U fldln2
# CHECK-NEXT: 1 3 1.00 U fldpi
# CHECK-NEXT: 1 3 1.00 U fldz
# CHECK-NEXT: 1 2 1.00 U fmul %st(0), %st(1)
# CHECK-NEXT: 1 2 1.00 U fmul %st(2)
# CHECK-NEXT: 1 2 1.00 U fmul %st, %st(1)
# CHECK-NEXT: 1 2 1.00 U fmul %st(2), %st
# CHECK-NEXT: 1 7 1.00 * U fmuls (%ecx)
# CHECK-NEXT: 1 7 1.00 * U fmull (%eax)
# CHECK-NEXT: 1 2 1.00 U fmulp %st(1)
# CHECK-NEXT: 1 2 1.00 U fmulp %st(2)
# CHECK-NEXT: 1 2 1.00 U fmulp %st, %st(1)
# CHECK-NEXT: 1 2 1.00 U fmulp %st, %st(2)
# CHECK-NEXT: 1 7 1.00 * U fimuls (%ecx)
# CHECK-NEXT: 1 7 1.00 * U fimull (%eax)
# CHECK-NEXT: 1 1 0.50 U fnop
@ -321,20 +321,20 @@ fyl2xp1
# CHECK-NEXT: 1 100 0.50 U frstor (%eax)
# CHECK-NEXT: 1 100 0.50 U wait
# CHECK-NEXT: 1 100 0.50 U fnsave (%eax)
# CHECK-NEXT: 1 3 1.00 U fsub %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fsub %st(2)
# CHECK-NEXT: 1 3 1.00 U fsub %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsub %st(2), %st
# CHECK-NEXT: 1 8 1.00 * U fsubs (%ecx)
# CHECK-NEXT: 1 8 1.00 * U fsubl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubp %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubp %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubp %st, %st(2)
# CHECK-NEXT: 1 8 1.00 * U fisubs (%ecx)
# CHECK-NEXT: 1 8 1.00 * U fisubl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubr %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(2), %st
# CHECK-NEXT: 1 8 1.00 * U fsubrs (%ecx)
# CHECK-NEXT: 1 8 1.00 * U fsubrl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st, %st(2)
# CHECK-NEXT: 1 8 1.00 * U fisubrs (%ecx)
# CHECK-NEXT: 1 8 1.00 * U fisubrl (%eax)
# CHECK-NEXT: 1 3 1.00 U ftst
@ -343,8 +343,8 @@ fyl2xp1
# CHECK-NEXT: 1 3 1.00 U fucomp %st(1)
# CHECK-NEXT: 1 3 1.00 U fucomp %st(3)
# CHECK-NEXT: 1 3 1.00 U fucompp
# CHECK-NEXT: 1 3 1.00 U fucomi %st(3)
# CHECK-NEXT: 1 3 1.00 U fucompi %st(3)
# CHECK-NEXT: 1 3 1.00 U fucomi %st(3), %st
# CHECK-NEXT: 1 3 1.00 U fucompi %st(3), %st
# CHECK-NEXT: 1 100 0.50 U wait
# CHECK-NEXT: 1 100 0.50 U fxam
# CHECK-NEXT: 1 1 0.50 U fxch %st(1)
@ -379,26 +379,26 @@ fyl2xp1
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions:
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - f2xm1
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fabs
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fadd %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fadd %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fadd %st, %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fadd %st(2), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fadds (%ecx)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - faddl (%ecx)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - faddp %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - faddp %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - faddp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - faddp %st, %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fiadds (%ecx)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fiaddl (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fbld (%ecx)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fbstp (%eax)
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fchs
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fnclex
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovb %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovbe %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmove %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovnb %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovnbe %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovne %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovnu %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovu %st(1), %st(0)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovb %st(1), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovbe %st(1), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmove %st(1), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovnb %st(1), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovnbe %st(1), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovne %st(1), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovnu %st(1), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fcmovu %st(1), %st
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fcom %st(1)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fcom %st(3)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - 1.00 - - - - - - fcoms (%ecx)
@ -408,24 +408,24 @@ fyl2xp1
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - 1.00 - - - - - - fcomps (%ecx)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - 1.00 - - - - - - fcompl (%eax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fcompp
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fcomi %st(3)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fcompi %st(3)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fcomi %st(3), %st
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fcompi %st(3), %st
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fcos
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fdecstp
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdiv %st(0), %st(1)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdiv %st(2)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdiv %st, %st(1)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdiv %st(2), %st
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - fdivs (%ecx)
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - fdivl (%eax)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivp %st(1)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivp %st(2)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivp %st, %st(1)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivp %st, %st(2)
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - fidivs (%ecx)
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - fidivl (%eax)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivr %st(0), %st(1)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivr %st(2)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivr %st, %st(1)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivr %st(2), %st
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - fdivrs (%ecx)
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - fdivrl (%eax)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivrp %st(1)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivrp %st(2)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivrp %st, %st(1)
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - fdivrp %st, %st(2)
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - fidivrs (%ecx)
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - fidivrl (%eax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - ffree %st(0)
@ -459,12 +459,12 @@ fyl2xp1
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - fldln2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - fldpi
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - fldz
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fmul %st(0), %st(1)
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fmul %st(2)
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fmul %st, %st(1)
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fmul %st(2), %st
# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 - - - - - - fmuls (%ecx)
# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 - - - - - - fmull (%eax)
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fmulp %st(1)
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fmulp %st(2)
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fmulp %st, %st(1)
# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - fmulp %st, %st(2)
# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 - - - - - - fimuls (%ecx)
# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 - - - - - - fimull (%eax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fnop
@ -492,20 +492,20 @@ fyl2xp1
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - frstor (%eax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - wait
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fnsave (%eax)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsub %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsub %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsub %st, %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsub %st(2), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fsubs (%ecx)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fsubl (%eax)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubp %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubp %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubp %st, %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fisubs (%ecx)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fisubl (%eax)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubr %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubr %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubr %st, %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubr %st(2), %st
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fsubrs (%ecx)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fsubrl (%eax)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubrp %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubrp %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubrp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - fsubrp %st, %st(2)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fisubrs (%ecx)
# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - fisubrl (%eax)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - ftst
@ -514,8 +514,8 @@ fyl2xp1
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fucomp %st(1)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fucomp %st(3)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fucompp
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fucomi %st(3)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fucompi %st(3)
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fucomi %st(3), %st
# CHECK-NEXT: 1.00 - - 1.00 - 1.00 - - - - - - - - fucompi %st(3), %st
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - wait
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fxam
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - fxch %st(1)

172
test/tools/llvm-mca/X86/Generic/resources-x87.s
View File

@ -5,7 +5,7 @@ f2xm1
fabs
fadd %st(0), %st(1)
fadd %st, %st(1)
fadd %st(2)
fadds (%ecx)
faddl (%ecx)
@ -21,14 +21,14 @@ fchs
fnclex
fcmovb %st(1), %st(0)
fcmovbe %st(1), %st(0)
fcmove %st(1), %st(0)
fcmovnb %st(1), %st(0)
fcmovnbe %st(1), %st(0)
fcmovne %st(1), %st(0)
fcmovnu %st(1), %st(0)
fcmovu %st(1), %st(0)
fcmovb %st(1), %st
fcmovbe %st(1), %st
fcmove %st(1), %st
fcmovnb %st(1), %st
fcmovnbe %st(1), %st
fcmovne %st(1), %st
fcmovnu %st(1), %st
fcmovu %st(1), %st
fcom %st(1)
fcom %st(3)
@ -47,7 +47,7 @@ fcos
fdecstp
fdiv %st(0), %st(1)
fdiv %st, %st(1)
fdiv %st(2)
fdivs (%ecx)
fdivl (%eax)
@ -56,7 +56,7 @@ fdivp %st(2)
fidivs (%ecx)
fidivl (%eax)
fdivr %st(0), %st(1)
fdivr %st, %st(1)
fdivr %st(2)
fdivrs (%ecx)
fdivrl (%eax)
@ -106,7 +106,7 @@ fldln2
fldpi
fldz
fmul %st(0), %st(1)
fmul %st, %st(1)
fmul %st(2)
fmuls (%ecx)
fmull (%eax)
@ -153,7 +153,7 @@ fnstsw (%eax)
frstor (%eax)
fsave (%eax)
fsub %st(0), %st(1)
fsub %st, %st(1)
fsub %st(2)
fsubs (%ecx)
fsubl (%eax)
@ -162,7 +162,7 @@ fsubp %st(2)
fisubs (%ecx)
fisubl (%eax)
fsubr %st(0), %st(1)
fsubr %st, %st(1)
fsubr %st(2)
fsubrs (%ecx)
fsubrl (%eax)
@ -208,26 +208,26 @@ fyl2xp1
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 100 0.33 U f2xm1
# CHECK-NEXT: 1 1 1.00 U fabs
# CHECK-NEXT: 1 3 1.00 U fadd %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fadd %st(2)
# CHECK-NEXT: 1 3 1.00 U fadd %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fadd %st(2), %st
# CHECK-NEXT: 2 10 1.00 * U fadds (%ecx)
# CHECK-NEXT: 2 10 1.00 * U faddl (%ecx)
# CHECK-NEXT: 1 3 1.00 U faddp %st(1)
# CHECK-NEXT: 1 3 1.00 U faddp %st(2)
# CHECK-NEXT: 1 3 1.00 U faddp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U faddp %st, %st(2)
# CHECK-NEXT: 3 13 2.00 * U fiadds (%ecx)
# CHECK-NEXT: 3 13 2.00 * U fiaddl (%ecx)
# CHECK-NEXT: 1 100 0.33 U fbld (%ecx)
# CHECK-NEXT: 1 100 0.33 U fbstp (%eax)
# CHECK-NEXT: 1 1 1.00 U fchs
# CHECK-NEXT: 1 100 0.33 U fnclex
# CHECK-NEXT: 3 3 2.00 U fcmovb %st(1), %st(0)
# CHECK-NEXT: 3 3 2.00 U fcmovbe %st(1), %st(0)
# CHECK-NEXT: 3 3 2.00 U fcmove %st(1), %st(0)
# CHECK-NEXT: 3 3 2.00 U fcmovnb %st(1), %st(0)
# CHECK-NEXT: 3 3 2.00 U fcmovnbe %st(1), %st(0)
# CHECK-NEXT: 3 3 2.00 U fcmovne %st(1), %st(0)
# CHECK-NEXT: 3 3 2.00 U fcmovnu %st(1), %st(0)
# CHECK-NEXT: 3 3 2.00 U fcmovu %st(1), %st(0)
# CHECK-NEXT: 3 3 2.00 U fcmovb %st(1), %st
# CHECK-NEXT: 3 3 2.00 U fcmovbe %st(1), %st
# CHECK-NEXT: 3 3 2.00 U fcmove %st(1), %st
# CHECK-NEXT: 3 3 2.00 U fcmovnb %st(1), %st
# CHECK-NEXT: 3 3 2.00 U fcmovnbe %st(1), %st
# CHECK-NEXT: 3 3 2.00 U fcmovne %st(1), %st
# CHECK-NEXT: 3 3 2.00 U fcmovnu %st(1), %st
# CHECK-NEXT: 3 3 2.00 U fcmovu %st(1), %st
# CHECK-NEXT: 1 1 1.00 U fcom %st(1)
# CHECK-NEXT: 1 1 1.00 U fcom %st(3)
# CHECK-NEXT: 2 8 1.00 U fcoms (%ecx)
@ -237,24 +237,24 @@ fyl2xp1
# CHECK-NEXT: 2 8 1.00 U fcomps (%ecx)
# CHECK-NEXT: 2 8 1.00 U fcompl (%eax)
# CHECK-NEXT: 1 100 0.33 U fcompp
# CHECK-NEXT: 3 3 1.00 U fcomi %st(3)
# CHECK-NEXT: 3 3 1.00 U fcompi %st(3)
# CHECK-NEXT: 3 3 1.00 U fcomi %st(3), %st
# CHECK-NEXT: 3 3 1.00 U fcompi %st(3), %st
# CHECK-NEXT: 1 100 0.33 U fcos
# CHECK-NEXT: 1 1 1.00 U fdecstp
# CHECK-NEXT: 1 14 14.00 U fdiv %st(0), %st(1)
# CHECK-NEXT: 1 14 14.00 U fdiv %st(2)
# CHECK-NEXT: 1 14 14.00 U fdiv %st, %st(1)
# CHECK-NEXT: 1 14 14.00 U fdiv %st(2), %st
# CHECK-NEXT: 2 31 1.00 * U fdivs (%ecx)
# CHECK-NEXT: 2 31 1.00 * U fdivl (%eax)
# CHECK-NEXT: 1 14 14.00 U fdivp %st(1)
# CHECK-NEXT: 1 14 14.00 U fdivp %st(2)
# CHECK-NEXT: 1 14 14.00 U fdivp %st, %st(1)
# CHECK-NEXT: 1 14 14.00 U fdivp %st, %st(2)
# CHECK-NEXT: 3 34 1.00 * U fidivs (%ecx)
# CHECK-NEXT: 3 34 1.00 * U fidivl (%eax)
# CHECK-NEXT: 1 14 14.00 U fdivr %st(0), %st(1)
# CHECK-NEXT: 1 14 14.00 U fdivr %st(2)
# CHECK-NEXT: 1 14 14.00 U fdivr %st, %st(1)
# CHECK-NEXT: 1 14 14.00 U fdivr %st(2), %st
# CHECK-NEXT: 2 31 1.00 * U fdivrs (%ecx)
# CHECK-NEXT: 2 31 1.00 * U fdivrl (%eax)
# CHECK-NEXT: 1 14 14.00 U fdivrp %st(1)
# CHECK-NEXT: 1 14 14.00 U fdivrp %st(2)
# CHECK-NEXT: 1 14 14.00 U fdivrp %st, %st(1)
# CHECK-NEXT: 1 14 14.00 U fdivrp %st, %st(2)
# CHECK-NEXT: 3 34 1.00 * U fidivrs (%ecx)
# CHECK-NEXT: 3 34 1.00 * U fidivrl (%eax)
# CHECK-NEXT: 1 1 1.00 U ffree %st(0)
@ -288,12 +288,12 @@ fyl2xp1
# CHECK-NEXT: 2 1 1.00 U fldln2
# CHECK-NEXT: 2 1 1.00 U fldpi
# CHECK-NEXT: 1 1 1.00 U fldz
# CHECK-NEXT: 1 5 1.00 U fmul %st(0), %st(1)
# CHECK-NEXT: 1 5 1.00 U fmul %st(2)
# CHECK-NEXT: 1 5 1.00 U fmul %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fmul %st(2), %st
# CHECK-NEXT: 2 12 1.00 * U fmuls (%ecx)
# CHECK-NEXT: 2 12 1.00 * U fmull (%eax)
# CHECK-NEXT: 1 5 1.00 U fmulp %st(1)
# CHECK-NEXT: 1 5 1.00 U fmulp %st(2)
# CHECK-NEXT: 1 5 1.00 U fmulp %st, %st(1)
# CHECK-NEXT: 1 5 1.00 U fmulp %st, %st(2)
# CHECK-NEXT: 3 15 1.00 * U fimuls (%ecx)
# CHECK-NEXT: 3 15 1.00 * U fimull (%eax)
# CHECK-NEXT: 1 1 1.00 U fnop
@ -321,20 +321,20 @@ fyl2xp1
# CHECK-NEXT: 1 100 0.33 U frstor (%eax)
# CHECK-NEXT: 1 100 0.33 U wait
# CHECK-NEXT: 1 100 0.33 U fnsave (%eax)
# CHECK-NEXT: 1 3 1.00 U fsub %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fsub %st(2)
# CHECK-NEXT: 1 3 1.00 U fsub %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsub %st(2), %st
# CHECK-NEXT: 2 10 1.00 * U fsubs (%ecx)
# CHECK-NEXT: 2 10 1.00 * U fsubl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubp %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubp %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubp %st, %st(2)
# CHECK-NEXT: 3 13 2.00 * U fisubs (%ecx)
# CHECK-NEXT: 3 13 2.00 * U fisubl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(0), %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubr %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubr %st(2), %st
# CHECK-NEXT: 2 10 1.00 * U fsubrs (%ecx)
# CHECK-NEXT: 2 10 1.00 * U fsubrl (%eax)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st(2)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st, %st(1)
# CHECK-NEXT: 1 3 1.00 U fsubrp %st, %st(2)
# CHECK-NEXT: 3 13 2.00 * U fisubrs (%ecx)
# CHECK-NEXT: 3 13 2.00 * U fisubrl (%eax)
# CHECK-NEXT: 1 3 1.00 U ftst
@ -343,8 +343,8 @@ fyl2xp1
# CHECK-NEXT: 1 1 1.00 U fucomp %st(1)
# CHECK-NEXT: 1 1 1.00 U fucomp %st(3)
# CHECK-NEXT: 1 3 1.00 U fucompp
# CHECK-NEXT: 3 3 1.00 U fucomi %st(3)
# CHECK-NEXT: 3 3 1.00 U fucompi %st(3)
# CHECK-NEXT: 3 3 1.00 U fucomi %st(3), %st
# CHECK-NEXT: 3 3 1.00 U fucompi %st(3), %st
# CHECK-NEXT: 1 100 0.33 U wait
# CHECK-NEXT: 1 100 0.33 U fxam
# CHECK-NEXT: 1 1 0.33 U fxch %st(1)
@ -373,26 +373,26 @@ fyl2xp1
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - f2xm1
# CHECK-NEXT: - - - - - 1.00 - - fabs
# CHECK-NEXT: - - - 1.00 - - - - fadd %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fadd %st(2)
# CHECK-NEXT: - - - 1.00 - - - - fadd %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fadd %st(2), %st
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fadds (%ecx)
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 faddl (%ecx)
# CHECK-NEXT: - - - 1.00 - - - - faddp %st(1)
# CHECK-NEXT: - - - 1.00 - - - - faddp %st(2)
# CHECK-NEXT: - - - 1.00 - - - - faddp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - faddp %st, %st(2)
# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fiadds (%ecx)
# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fiaddl (%ecx)
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fbld (%ecx)
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fbstp (%eax)
# CHECK-NEXT: - - - - - 1.00 - - fchs
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fnclex
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovb %st(1), %st(0)
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovbe %st(1), %st(0)
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmove %st(1), %st(0)
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnb %st(1), %st(0)
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnbe %st(1), %st(0)
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovne %st(1), %st(0)
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnu %st(1), %st(0)
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovu %st(1), %st(0)
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovb %st(1), %st
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovbe %st(1), %st
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmove %st(1), %st
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnb %st(1), %st
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnbe %st(1), %st
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovne %st(1), %st
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnu %st(1), %st
# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovu %st(1), %st
# CHECK-NEXT: - - - 1.00 - - - - fcom %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fcom %st(3)
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fcoms (%ecx)
@ -402,24 +402,24 @@ fyl2xp1
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fcomps (%ecx)
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fcompl (%eax)
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fcompp
# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fcomi %st(3)
# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fcompi %st(3)
# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fcomi %st(3), %st
# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fcompi %st(3), %st
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fcos
# CHECK-NEXT: - - - - - 1.00 - - fdecstp
# CHECK-NEXT: - 14.00 1.00 - - - - - fdiv %st(0), %st(1)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdiv %st(2)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdiv %st, %st(1)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdiv %st(2), %st
# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fdivs (%ecx)
# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fdivl (%eax)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivp %st(1)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivp %st(2)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivp %st, %st(1)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivp %st, %st(2)
# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fidivs (%ecx)
# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fidivl (%eax)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivr %st(0), %st(1)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivr %st(2)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivr %st, %st(1)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivr %st(2), %st
# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fdivrs (%ecx)
# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fdivrl (%eax)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivrp %st(1)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivrp %st(2)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivrp %st, %st(1)
# CHECK-NEXT: - 14.00 1.00 - - - - - fdivrp %st, %st(2)
# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fidivrs (%ecx)
# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fidivrl (%eax)
# CHECK-NEXT: - - - - - 1.00 - - ffree %st(0)
@ -453,12 +453,12 @@ fyl2xp1
# CHECK-NEXT: - - 1.00 1.00 - - - - fldln2
# CHECK-NEXT: - - 1.00 1.00 - - - - fldpi
# CHECK-NEXT: - - - - - 1.00 - - fldz
# CHECK-NEXT: - - 1.00 - - - - - fmul %st(0), %st(1)
# CHECK-NEXT: - - 1.00 - - - - - fmul %st(2)
# CHECK-NEXT: - - 1.00 - - - - - fmul %st, %st(1)
# CHECK-NEXT: - - 1.00 - - - - - fmul %st(2), %st
# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fmuls (%ecx)
# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fmull (%eax)
# CHECK-NEXT: - - 1.00 - - - - - fmulp %st(1)
# CHECK-NEXT: - - 1.00 - - - - - fmulp %st(2)
# CHECK-NEXT: - - 1.00 - - - - - fmulp %st, %st(1)
# CHECK-NEXT: - - 1.00 - - - - - fmulp %st, %st(2)
# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fimuls (%ecx)
# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fimull (%eax)
# CHECK-NEXT: - - - - - 1.00 - - fnop
@ -486,20 +486,20 @@ fyl2xp1
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - frstor (%eax)
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - wait
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fnsave (%eax)
# CHECK-NEXT: - - - 1.00 - - - - fsub %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fsub %st(2)
# CHECK-NEXT: - - - 1.00 - - - - fsub %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fsub %st(2), %st
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fsubs (%ecx)
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fsubl (%eax)
# CHECK-NEXT: - - - 1.00 - - - - fsubp %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fsubp %st(2)
# CHECK-NEXT: - - - 1.00 - - - - fsubp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fsubp %st, %st(2)
# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fisubs (%ecx)
# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fisubl (%eax)
# CHECK-NEXT: - - - 1.00 - - - - fsubr %st(0), %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fsubr %st(2)
# CHECK-NEXT: - - - 1.00 - - - - fsubr %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fsubr %st(2), %st
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fsubrs (%ecx)
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fsubrl (%eax)
# CHECK-NEXT: - - - 1.00 - - - - fsubrp %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fsubrp %st(2)
# CHECK-NEXT: - - - 1.00 - - - - fsubrp %st, %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fsubrp %st, %st(2)
# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fisubrs (%ecx)
# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fisubrl (%eax)
# CHECK-NEXT: - - - 1.00 - - - - ftst
@ -508,8 +508,8 @@ fyl2xp1
# CHECK-NEXT: - - - 1.00 - - - - fucomp %st(1)
# CHECK-NEXT: - - - 1.00 - - - - fucomp %st(3)
# CHECK-NEXT: - - - 1.00 - - - - fucompp
# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fucomi %st(3)
# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fucompi %st(3)
# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fucomi %st(3), %st
# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fucompi %st(3), %st
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - wait
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fxam
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fxch %st(1)

Some files were not shown because too many files have changed in this diff Show More