Initial support for the Digi ConnectCore(c) i.MX53 / Wi-i.MX53 boards.

There are many drivers missing, but we can reach single user mode now.

Hardware graciously donated by Douglas Beattie.
This commit is contained in:
Rui Paulo 2013-09-01 20:15:35 +00:00
parent 865ca149dc
commit 530031a8f1
12 changed files with 1196 additions and 6 deletions

175
sys/arm/conf/DIGI-CCWMX53 Normal file
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@ -0,0 +1,175 @@
# Kernel configuration for Digi ConnectCore Wi-i.MX53 boards
#
# For more information on this file, please read the config(5) manual page,
# and/or the handbook section on Kernel Configuration Files:
#
# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
#
# The handbook is also available locally in /usr/share/doc/handbook
# if you've installed the doc distribution, otherwise always see the
# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
# latest information.
#
# An exhaustive list of options and more detailed explanations of the
# device lines is also present in the ../../conf/NOTES and NOTES files.
# If you are in doubt as to the purpose or necessity of a line, check first
# in NOTES.
#
# $FreeBSD$
ident DIGI-CCWMX53
include "../freescale/imx/std.imx53"
makeoptions WITHOUT_MODULES="ahc"
makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
#options DEBUG
options SCHED_4BSD # 4BSD scheduler
#options PREEMPTION # Enable kernel thread preemption
options INET # InterNETworking
options INET6 # IPv6 communications protocols
#options SCTP # Stream Control Transmission Protocol
options FFS # Berkeley Fast Filesystem
options SOFTUPDATES # Enable FFS soft updates support
options UFS_ACL # Support for access control lists
options UFS_DIRHASH # Improve performance on big directories
options UFS_GJOURNAL # Enable gjournal-based UFS journaling
#options MD_ROOT # MD is a potential root device
options NFSCL # New Network Filesystem Client
#options NFSD # New Network Filesystem Server
options NFSLOCKD # Network Lock Manager
options NFS_ROOT # NFS usable as /, requires NFSCL
options MSDOSFS # MSDOS Filesystem
options CD9660 # ISO 9660 Filesystem
#options PROCFS # Process filesystem (requires PSEUDOFS)
options PSEUDOFS # Pseudo-filesystem framework
options TMPFS # TMP Memory Filesystem
options GEOM_PART_GPT # GUID Partition Tables.
options GEOM_LABEL # Provides labelization
#options COMPAT_FREEBSD5 # Compatible with FreeBSD5
#options COMPAT_FREEBSD6 # Compatible with FreeBSD6
#options COMPAT_FREEBSD7 # Compatible with FreeBSD7
options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI
options KTRACE # ktrace(1) support
options SYSVSHM # SYSV-style shared memory
options SYSVMSG # SYSV-style message queues
options SYSVSEM # SYSV-style semaphores
options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions
options INCLUDE_CONFIG_FILE # Include this file in kernel
options VFP # vfp/neon
# required for netbooting
#options BOOTP
#options BOOTP_COMPAT
#options BOOTP_NFSROOT
#options BOOTP_NFSV3
#options BOOTP_WIRED_TO=ue0
#options ROOTDEVNAME=\"ufs:ada0s2a\"
# kernel/memory size reduction
#options MUTEX_NOINLINE
#options NO_FFS_SNAPSHOT
#options NO_SWAPPING
#options NO_SYSCTL_DESCR
#options RWLOCK_NOINLINE
# Debugging support. Always need this:
options KDB # Enable kernel debugger support.
# For minimum debugger support (stable branch) use:
#options KDB_TRACE # Print a stack trace for a panic.
# For full debugger support use this instead:
options DDB # Support DDB.
#options GDB # Support remote GDB.
options DEADLKRES # Enable the deadlock resolver
options INVARIANTS # Enable calls of extra sanity checking
options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS
options WITNESS # Enable checks to detect deadlocks and cycles
# The `bpf' device enables the Berkeley Packet Filter.
# Be aware of the administrative consequences of enabling this!
# Note that 'bpf' is required for DHCP.
device bpf # Berkeley packet filter
# Pseudo devices.
device loop # Network loopback
device random # Entropy device
device ether # Ethernet support
#device vlan # 802.1Q VLAN support
#device tun # Packet tunnel.
#device md # Memory "disks"
#device gif # IPv6 and IPv4 tunneling
#device faith # IPv6-to-IPv4 relaying (translation)
#device firmware # firmware assist module
# Serial (COM) ports
#device uart # Multi-uart driver
options ALT_BREAK_TO_DEBUGGER
device ata
device atapci # Only for helper functions
device imxata
options ATA_STATIC_ID # Static device numbering
device iomux # IO Multiplexor
device gpio
device gpioled
device fsliic
device iic
device iicbus
# SCSI peripherals
device scbus # SCSI bus (required for SCSI)
device da # Direct Access (disks)
device cd # CD
device pass # Passthrough device (direct SCSI access)
# USB support
#options USB_DEBUG # enable debug msgs
#device ehci # OHCI USB interface
#device usb # USB Bus (required)
#device umass # Disks/Mass storage - Requires scbus and da
#device uhid # "Human Interface Devices"
#device ukbd # Allow keyboard like HIDs to control console
#device ums
# USB Ethernet, requires miibus
#device miibus
#device aue # ADMtek USB Ethernet
#device axe # ASIX Electronics USB Ethernet
#device cdce # Generic USB over Ethernet
#device cue # CATC USB Ethernet
#device kue # Kawasaki LSI USB Ethernet
#device rue # RealTek RTL8150 USB Ethernet
#device udav # Davicom DM9601E USB
# USB Wireless
#device rum # Ralink Technology RT2501USB wireless NICs
# Watchdog timer.
# WARNING: can't be disabled!!!
device imxwdt # Watchdog
# Wireless NIC cards
device wlan # 802.11 support
device wlan_wep # 802.11 WEP support
device wlan_ccmp # 802.11 CCMP support
device wlan_tkip # 802.11 TKIP support
device wlan_amrr # AMRR transmit rate control algorithm
# Flattened Device Tree
options FDT
options FDT_DTB_STATIC
makeoptions FDT_DTS_FILE=digi-ccwmx53.dts
# NOTE: serial console will be disabled if syscons enabled
# Uncomment following lines for framebuffer/syscons support
#device sc
#device kbdmux
#options SC_DFLT_FONT # compile font in
#makeoptions SC_DFLT_FONT=cp437

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@ -0,0 +1,51 @@
# $FreeBSD$
arm/arm/bus_space_asm_generic.S standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
kern/kern_clocksource.c standard
# Init
arm/freescale/imx/imx53_machdep.c standard
arm/freescale/imx/common.c standard
arm/freescale/imx/bus_space.c standard
# Dummy serial console
arm/freescale/imx/console.c standard
# TrustZone Interrupt Controller
arm/freescale/imx/tzic.c standard
# IOMUX - external pins multiplexor
arm/freescale/imx/imx51_iomux.c optional iomux
# GPIO
arm/freescale/imx/imx51_gpio.c optional gpio
# Generic Periodic Timer
arm/freescale/imx/imx_gpt.c standard
# Clock Configuration Manager
arm/freescale/imx/imx51_ccm.c standard
# i.MX5xx PATA controller
dev/ata/chipsets/ata-fsl.c optional imxata
# UART driver
#dev/uart/uart_dev_imx.c optional uart
# USB join controller (1 OTG, 3 EHCI)
dev/usb/controller/ehci_imx.c optional ehci
# Watchdog
arm/freescale/imx/imx_wdog.c optional imxwdt
# i2c
arm/freescale/imx/i2c.c optional fsliic
dev/ofw/ofw_iicbus.c optional fsliic
# IPU - Image Processing Unit (frame buffer also)
arm/freescale/imx/imx51_ipuv3.c optional sc

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@ -140,7 +140,8 @@ static int
imxccm_match(device_t dev)
{
if (!ofw_bus_is_compatible(dev, "fsl,imx51-ccm"))
if (!ofw_bus_is_compatible(dev, "fsl,imx51-ccm") &&
!ofw_bus_is_compatible(dev, "fsl,imx53-ccm"))
return (ENXIO);
device_set_desc(dev, "Freescale Clock Control Module");

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@ -370,7 +370,8 @@ static int
imx51_gpio_probe(device_t dev)
{
if (ofw_bus_is_compatible(dev, "fsl,imx51-gpio")) {
if (ofw_bus_is_compatible(dev, "fsl,imx51-gpio") ||
ofw_bus_is_compatible(dev, "fsl,imx53-gpio")) {
device_set_desc(dev, "i.MX515 GPIO Controller");
return (BUS_PROBE_DEFAULT);
}

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@ -106,7 +106,8 @@ static int
iomux_probe(device_t dev)
{
if (!ofw_bus_is_compatible(dev, "fsl,imx51-iomux"))
if (!ofw_bus_is_compatible(dev, "fsl,imx51-iomux") &&
!ofw_bus_is_compatible(dev, "fsl,imx53-iomux"))
return (ENXIO);
device_set_desc(dev, "Freescale i.MX51 IO pins multiplexor");

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@ -107,7 +107,7 @@ platform_devmap_init(void)
* Map segment where UART1 and UART2 located.
*/
fdt_devmap[0].pd_va = IMX51_DEV_VIRT_BASE + 0x03f00000;
fdt_devmap[0].pd_pa = 0x73f00000;
fdt_devmap[0].pd_pa = 0x53f00000;
fdt_devmap[0].pd_size = 0x00100000;
fdt_devmap[0].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
fdt_devmap[0].pd_cache = PTE_NOCACHE;

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@ -0,0 +1,141 @@
/*-
* Copyright (c) 1994-1998 Mark Brinicombe.
* Copyright (c) 1994 Brini.
* Copyright (c) 2012, 2013 The FreeBSD Foundation
* All rights reserved.
*
* This code is derived from software written for Brini by Mark Brinicombe
* Portions of this software were developed by Oleksandr Rybalko
* under sponsorship from the FreeBSD Foundation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Brini.
* 4. The name of the company nor the name of the author may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include "opt_platform.h"
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/reboot.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <machine/bus.h>
#include <machine/frame.h> /* For trapframe_t, used in <machine/machdep.h> */
#include <machine/machdep.h>
#include <machine/pmap.h>
#include <dev/fdt/fdt_common.h>
#define IMX53_DEV_VIRT_BASE 0xe0000000
vm_offset_t
initarm_lastaddr(void)
{
boothowto |= RB_VERBOSE|RB_MULTIPLE;
bootverbose = 1;
if (fdt_immr_addr(IMX53_DEV_VIRT_BASE) != 0)
while (1);
/* Platform-specific initialisation */
return (fdt_immr_va - ARM_NOCACHE_KVA_SIZE);
}
/*
* Set initial values of GPIO output ports
*/
void
initarm_gpio_init(void)
{
}
void
initarm_late_init(void)
{
}
#define FDT_DEVMAP_MAX 2
static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = {
{ 0, 0, 0, 0, 0, },
{ 0, 0, 0, 0, 0, }
};
/*
* Construct pmap_devmap[] with DT-derived config data.
*/
int
platform_devmap_init(void)
{
/*
* Map segment where UART1 and UART2 located.
*/
fdt_devmap[0].pd_va = IMX53_DEV_VIRT_BASE + 0x03f00000;
fdt_devmap[0].pd_pa = 0x53f00000;
fdt_devmap[0].pd_size = 0x00100000;
fdt_devmap[0].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
fdt_devmap[0].pd_cache = PTE_NOCACHE;
pmap_devmap_bootstrap_table = &fdt_devmap[0];
return (0);
}
struct arm32_dma_range *
bus_dma_get_range(void)
{
return (NULL);
}
int
bus_dma_get_range_nb(void)
{
return (0);
}
void
cpu_reset(void)
{
printf("Reset ...\n");
/* Clear n_reset flag */
*((volatile u_int16_t *)(IMX53_DEV_VIRT_BASE + 0x03f98000)) =
(u_int16_t)0;
while (1);
}

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@ -112,7 +112,8 @@ static int
imx_gpt_probe(device_t dev)
{
if (!ofw_bus_is_compatible(dev, "fsl,imx51-gpt"))
if (!ofw_bus_is_compatible(dev, "fsl,imx51-gpt") &&
!ofw_bus_is_compatible(dev, "fsl,imx53-gpt"))
return (ENXIO);
device_set_desc(dev, "Freescale i.MX GPT timer");

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@ -130,7 +130,8 @@ static int
imx_wdog_probe(device_t dev)
{
if (!ofw_bus_is_compatible(dev, "fsl,imx51-wdt"))
if (!ofw_bus_is_compatible(dev, "fsl,imx51-wdt") &&
!ofw_bus_is_compatible(dev, "fsl,imx53-wdt"))
return (ENXIO);
device_set_desc(dev, "Freescale i.MX5xx Watchdog Timer");

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@ -0,0 +1,15 @@
# $FreeBSD$
machine arm armv6
cpu CPU_CORTEXA
makeoptions ARM_LITTLE_ENDIAN
options ARM_L2_PIPT
options KERNVIRTADDR=0xc0100000
makeoptions KERNVIRTADDR=0xc0100000
options KERNPHYSADDR=0x70100000
makeoptions KERNPHYSADDR=0x70100000
options PHYSADDR=0x70000000
options STARTUP_PAGETABLE_ADDR=0x71000000
files "../freescale/imx/files.imx53"

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@ -0,0 +1,123 @@
/*
* Copyright (c) 2012 The FreeBSD Foundation
* Copyright (c) 2013 Rui Paulo
* All rights reserved.
*
* This software was developed by Semihalf under sponsorship from
* the FreeBSD Foundation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Digi ConnectCore Wi-i.MX53
*
* $FreeBSD$
*/
/dts-v1/;
/include/ "imx53x.dtsi"
/ {
model = "Digi ConnectCore Wi-i.MX53";
compatible = "digi,imx53-ccwm53";
memory {
/* RAM 512M */
reg = <0x70000000 0x20000000>;
};
localbus@18000000 {
ipu3@18000000 {
status = "okay";
};
};
soc@50000000 {
aips@50000000 {
spba@50000000 {
esdhc@50004000 {
clock-frequency = <216000000>;
status = "okay";
};
esdhc@50008000 {
clock-frequency = <216000000>;
status = "okay";
};
SSI2: ssi@50014000 {
status = "okay";
};
};
timer@53fa0000 {
status = "okay";
};
/* UART1, console */
UART1: serial@53fbc000 {
status = "okay";
clock-frequency = <3000000>; /* XXX */
};
clock@53fd4000 {
status = "okay";
};
gpio@53f84000 {
status = "okay";
};
gpio@53f88000 {
status = "okay";
};
gpio@53f8c000 {
status = "okay";
};
gpio@53f90000 {
status = "okay";
};
wdog@53f98000 {
status = "okay";
};
};
aips@60000000 {
i2c@63fc4000 {
status = "okay";
};
i2c@63fc8000 {
status = "okay";
};
audmux@63fd4000 {
status = "okay";
};
ide@63fe0000 {
status = "okay";
};
};
};
aliases {
UART1 = &UART1;
SSI2 = &SSI2;
};
chosen {
bootargs = "-v";
stdin = "UART1";
stdout = "UART1";
};
};

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@ -0,0 +1,680 @@
/*
* Copyright (c) 2012 The FreeBSD Foundation
* Copyright (c) 2013 Rui Paulo
* All rights reserved.
*
* This software was developed by Semihalf under sponsorship from
* the FreeBSD Foundation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Freescale i.MX535 Device Tree Source.
*
* $FreeBSD$
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
soc = &SOC;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "ARM,MCIMX535";
reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x8000>;
i-cache-size = <0x8000>;
l2-cache-line-size = <32>;
l2-cache-line = <0x40000>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
};
};
localbus@0fffc000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
/* This reflects CPU decode windows setup. */
ranges;
tzic: tz-interrupt-controller@0fffc000 {
compatible = "fsl,imx53-tzic", "fsl,tzic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x0fffc000 0x00004000>;
};
/*
* 40000000 40000FFF 4K Debug ROM
* 40001000 40001FFF 4K ETB
* 40002000 40002FFF 4K ETM
* 40003000 40003FFF 4K TPIU
* 40004000 40004FFF 4K CTI0
* 40005000 40005FFF 4K CTI1
* 40006000 40006FFF 4K CTI2
* 40007000 40007FFF 4K CTI3
* 40008000 40008FFF 4K ARM Debug Unit
*
* 0FFFC000 0FFFCFFF 0x4000 TZIC
*/
};
SOC: soc@50000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&tzic>;
ranges = <0x50000000 0x14000000>;
aips@50000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&tzic>;
ranges;
/* Required by many devices, so better to stay first */
/* 53FD4000 0x4000 CCM */
clock@53fd4000 {
compatible = "fsl,imx53-ccm";
/* 63F80000 0x4000 DPLLIP1 */
/* 63F84000 0x4000 DPLLIP2 */
/* 63F88000 0x4000 DPLLIP3 */
reg = <0x53fd4000 0x4000
0x63F80000 0x4000
0x63F84000 0x4000
0x63F88000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <71 72>;
status = "disabled";
};
/*
* GPIO modules moved up - to have it attached for
* drivers which rely on GPIO
*/
/* 53F84000 0x4000 GPIO1 */
gpio1: gpio@53f84000 {
compatible = "fsl,imx53-gpio";
reg = <0x53f84000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <50 51 42 43 44 45 46 47 48 49>;
/* TODO: use <> also */
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
/* 53F88000 0x4000 GPIO2 */
gpio2: gpio@53f88000 {
compatible = "fsl,imx53-gpio";
reg = <0x53f88000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <52 53>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
/* 53F8C000 0x4000 GPIO3 */
gpio3: gpio@53f8c000 {
compatible = "fsl,imx53-gpio";
reg = <0x53f8c000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <54 55>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
/* 53F90000 0x4000 GPIO4 */
gpio4: gpio@53f90000 {
compatible = "fsl,imx53-gpio";
reg = <0x53f90000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <56 57>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
/* 53FDC000 0x4000 GPIO5 */
gpio5: gpio@53fdc000 {
compatible = "fsl,imx53-gpio";
reg = <0x53fdc000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <103 104>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
/* 53FE0000 0x4000 GPIO6 */
gpio6: gpio@53fe0000 {
compatible = "fsl,imx53-gpio";
reg = <0x53fe0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <105 106>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
/* 53FE4000 0x4000 GPIO5 */
gpio7: gpio@53fe4000 {
compatible = "fsl,imx53-gpio";
reg = <0x53fe4000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <107 108>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
spba@50000000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&tzic>;
ranges;
/* 50004000 0x4000 ESDHC 1 */
esdhc@50004000 {
compatible = "fsl,imx53-esdhc";
reg = <0x50004000 0x4000>;
interrupt-parent = <&tzic>; interrupts = <1>;
status = "disabled";
};
/* 50008000 0x4000 ESDHC 2 */
esdhc@50008000 {
compatible = "fsl,imx53-esdhc";
reg = <0x50008000 0x4000>;
interrupt-parent = <&tzic>; interrupts = <2>;
status = "disabled";
};
/* 5000C000 0x4000 UART 3 */
uart3: serial@5000c000 {
compatible = "fsl,imx53-uart", "fsl,imx-uart";
reg = <0x5000c000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <33>;
status = "disabled";
};
/* 50010000 0x4000 eCSPI1 */
ecspi@50010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-ecspi";
reg = <0x50010000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <36>;
status = "disabled";
};
/* 50014000 0x4000 SSI2 irq30 */
SSI2: ssi@50014000 {
compatible = "fsl,imx53-ssi";
reg = <0x50014000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <30>;
status = "disabled";
};
/* 50020000 0x4000 ESDHC 3 */
esdhc@50020000 {
compatible = "fsl,imx53-esdhc";
reg = <0x50020000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <3>;
status = "disabled";
};
/* 50024000 0x4000 ESDHC 4 */
esdhc@50024000 {
compatible = "fsl,imx53-esdhc";
reg = <0x50024000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <4>;
status = "disabled";
};
/* 50028000 0x4000 SPDIF */
/* 91 SPDIF */
/* 50030000 0x4000 PATA (PORT UDMA) irq70 */
/* 50034000 0x4000 SLM */
/* 50038000 0x4000 HSI2C */
/* 64 HS-I2C */
/* 5003C000 0x4000 SPBA */
};
/* 73F80000 0x4000 USBOH3 */
/* irq14 USBOH3 USB Host 1 */
/* irq16 USBOH3 USB Host 2 */
/* irq17 USBOH3 USB Host 3 */
/* irq18 USBOH3 USB OTG */
usb1: usb@53F80000 {
compatible = "fsl,usb-4core";
reg = <0x53f80000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <18 14 16 17>;
};
/* 53F98000 0x4000 WDOG1 */
wdog@53f98000 {
compatible = "fsl,imx53-wdt";
reg = <0x53f98000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <58>;
status = "disabled";
};
/* 53F9C000 0x4000 WDOG2 (TZ) */
wdog@53f9c000 {
compatible = "fsl,imx53-wdt";
reg = <0x53f9c000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <59>;
status = "disabled";
};
/* 53F94000 0x4000 KPP */
keyboard@53f94000 {
compatible = "fsl,imx53-kpp";
reg = <0x53f94000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <60>;
status = "disabled";
};
/* 53FA0000 0x4000 GPT */
timer@53fa0000 {
compatible = "fsl,imx53-gpt";
reg = <0x53fa0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <39>;
status = "disabled";
};
/* 53FA4000 0x4000 SRTC */
rtc@53fa4000 {
compatible = "fsl,imx53-srtc";
reg = <0x53fa4000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <24 25>;
status = "disabled";
};
/* 53FA8000 0x4000 IOMUXC */
iomux@53fa8000 {
compatible = "fsl,imx53-iomux";
reg = <0x53fa8000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <7>;
};
/* 53FAC000 0x4000 EPIT1 */
epit1: timer@53fac000 {
compatible = "fsl,imx53-epit";
reg = <0x53fac000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <40>;
status = "disabled";
};
/* 53FB0000 0x4000 EPIT2 */
epit2: timer@53fb0000 {
compatible = "fsl,imx53-epit";
reg = <0x53fb0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <41>;
status = "disabled";
};
/* 53FB4000 0x4000 PWM1 */
pwm@53fb4000 {
compatible = "fsl,imx53-pwm";
reg = <0x53fb4000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <61>;
status = "disabled";
};
/* 53FB8000 0x4000 PWM2 */
pwm@53fb8000 {
compatible = "fsl,imx53-pwm";
reg = <0x53fb8000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <94>;
status = "disabled";
};
/* 53FBC000 0x4000 UART 1 */
uart1: serial@53fbc000 {
compatible = "fsl,imx53-uart", "fsl,imx-uart";
reg = <0x53fbc000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <31>;
status = "disabled";
};
/* 53FC0000 0x4000 UART 2 */
uart2: serial@53fc0000 {
compatible = "fsl,imx53-uart", "fsl,imx-uart";
reg = <0x53fc0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <32>;
status = "disabled";
};
/* 53FC0000 0x4000 UART 4 */
uart4: serial@53ff0000 {
compatible = "fsl,imx53-uart", "fsl,imx-uart";
reg = <0x53ff0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <13>;
status = "disabled";
};
/* 53FC4000 0x4000 USBOH3 */
/* NOTYET
usb@53fc4000 {
compatible = "fsl,imx53-otg";
reg = <0x53fc4000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <>;
status = "disabled";
};
*/
/* 53FD0000 0x4000 SRC */
reset@53fd0000 {
compatible = "fsl,imx53-src";
reg = <0x53fd0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <75>;
status = "disabled";
};
/* 53FD8000 0x4000 GPC */
power@53fd8000 {
compatible = "fsl,imx53-gpc";
reg = <0x53fd8000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <73 74>;
status = "disabled";
};
/* 53FE8000 0x4000 PATA (PORT PIO) */
/* 70 PATA Parallel ATA host controller interrupt */
ide@53fe8000 {
compatible = "fsl,imx53-ata";
reg = <0x83fe0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <70>;
status = "disabled";
};
};
aips@60000000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&tzic>;
ranges;
/* 53FC0000 0x4000 UART 5 */
uart5: serial@63f90000 {
compatible = "fsl,imx53-uart", "fsl,imx-uart";
reg = <0x63f90000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <32>;
status = "disabled";
};
/* 63F94000 0x4000 AHBMAX */
/* 63F98000 0x4000 IIM */
/*
* 69 IIM Interrupt request to the processor.
* Indicates to the processor that program or
* explicit.
*/
/* 63F9C000 0x4000 CSU */
/*
* 27 CSU Interrupt Request 1. Indicates to the
* processor that one or more alarm inputs were.
*/
/* 63FA0000 0x4000 TIGERP_PLATFORM_NE_32K_256K */
/* irq76 Neon Monitor Interrupt */
/* irq77 Performance Unit Interrupt */
/* irq78 CTI IRQ */
/* irq79 Debug Interrupt, Cross-Trigger Interface 1 */
/* irq80 Debug Interrupt, Cross-Trigger Interface 1 */
/* irq89 Debug Interrupt, Cross-Trigger Interface 2 */
/* irq98 Debug Interrupt, Cross-Trigger Interface 3 */
/* 63FA4000 0x4000 OWIRE irq88 */
/* 63FA8000 0x4000 FIRI irq93 */
/* 63FAC000 0x4000 eCSPI2 */
ecspi@63fac000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-ecspi";
reg = <0x63fac000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <37>;
status = "disabled";
};
/* 63FB0000 0x4000 SDMA */
sdma@63fb0000 {
compatible = "fsl,imx53-sdma";
reg = <0x63fb0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <6>;
};
/* 63FB4000 0x4000 SCC */
/* 21 SCC Security Monitor High Priority Interrupt. */
/* 22 SCC Secure (TrustZone) Interrupt. */
/* 23 SCC Regular (Non-Secure) Interrupt. */
/* 63FB8000 0x4000 ROMCP */
/* 63FBC000 0x4000 RTIC */
/*
* 26 RTIC RTIC (Trust Zone) Interrupt Request.
* Indicates that the RTIC has completed hashing the
*/
/* 63FC0000 0x4000 CSPI */
cspi@63fc0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-cspi";
reg = <0x63fc0000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <38>;
status = "disabled";
};
/* 63FC4000 0x4000 I2C2 */
i2c@63fc4000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c";
reg = <0x63fc4000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <63>;
status = "disabled";
};
/* 63FC8000 0x4000 I2C1 */
i2c@63fc8000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c";
reg = <0x63fc8000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <62>;
status = "disabled";
};
/* 63FCC000 0x4000 SSI1 */
/* 29 SSI1 SSI-1 Interrupt Request */
SSI1: ssi@63fcc000 {
compatible = "fsl,imx53-ssi";
reg = <0x63fcc000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <29>;
status = "disabled";
};
/* 63FD0000 0x4000 AUDMUX */
audmux@63fd4000 {
compatible = "fsl,imx53-audmux";
reg = <0x63fd4000 0x4000>;
status = "disabled";
};
/* 63FD8000 0x4000 EXTMC */
/* 8 EXTMC (NFC) */
/* 15 EXTMC */
/* 97 EXTMC Boot sequence completed interrupt */
/*
* 101 EMI Indicates all pages have been transferred
* to NFC during an auto program operation.
*/
/* 83FE4000 0x4000 SIM */
/* 67 SIM intr composed of oef, xte, sdi1, and sdi0 */
/* 68 SIM intr composed of tc, etc, tfe, and rdrf */
/* 63FD_C000 0x4000 apb2ip_pl301_2x2 */
/* 63FE_0000 0x4000 apb2ip_pl301_4x1 */
/* 63FE4000 0x4000 MLB */
/* 63FE8000 0x4000 SSI3 */
/* 96 SSI3 SSI-3 Interrupt Request */
SSI3: ssi@63fe8000 {
compatible = "fsl,imx51-ssi";
reg = <0x63fe8000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <96>;
status = "disabled";
};
/* 63FEC000 0x4000 FEC */
ethernet@63fec000 {
compatible = "fsl,imx53-fec";
reg = <0x63fec000 0x4000>;
interrupt-parent = <&tzic>;
interrupts = <87>;
status = "disabled";
};
/* 63FF0000 0x4000 TVE */
/* 92 TVE */
/* 63FF4000 0x4000 VPU */
/* 9 VPU */
/* 100 VPU Idle interrupt from VPU */
/* 63FF8000 0x4000 SAHARA */
/* 19 SAHARA SAHARA host 0 (TrustZone) Intr */
/* 20 SAHARA SAHARA host 1 (non-TrustZone) Intr */
};
};
localbus@18000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga: ipu3@18000000 {
compatible = "fsl,ipu3";
reg = <
0x18000000 0x08000 /* CM */
0x18008000 0x08000 /* IDMAC */
0x18018000 0x08000 /* DP */
0x18020000 0x08000 /* IC */
0x18028000 0x08000 /* IRT */
0x18030000 0x08000 /* CSI0 */
0x18038000 0x08000 /* CSI1 */
0x18040000 0x08000 /* DI0 */
0x18048000 0x08000 /* DI1 */
0x18050000 0x08000 /* SMFC */
0x18058000 0x08000 /* DC */
0x18060000 0x08000 /* DMFC */
0x18068000 0x08000 /* VDI */
0x19000000 0x20000 /* CPMEM */
0x19020000 0x20000 /* LUT */
0x19040000 0x20000 /* SRM */
0x19060000 0x20000 /* TPM */
0x19080000 0x20000 /* DCTMPL */
>;
interrupt-parent = <&tzic>;
interrupts = <
10 /* IPUEX Error */
11 /* IPUEX Sync */
>;
status = "disabled";
};
};
};
/*
TODO: Not mapped interrupts
5 DAP
84 GPU2D (OpenVG) general interrupt
85 GPU2D (OpenVG) busy signal (for S/W power gating feasibility)
12 GPU3D
102 GPU3D Idle interrupt from GPU3D (for S/W power gating)
90 SJC
*/