libdtrace: Fix some CPU register number definitions to match the kernel
MFC after: 1 week
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@ -80,11 +80,11 @@ inline int R_R0 = R_EAX;
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inline int R_R1 = R_EBX;
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#pragma D binding "1.0" R_R1
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inline int R_RSP = 18 + 1 + 20;
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inline int R_RSP = 18 + 1 + 24;
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#pragma D binding "1.0" R_RSP
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inline int R_RFL = 18 + 1 + 19;
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inline int R_RFL = 18 + 1 + 23;
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#pragma D binding "1.0" R_RFL
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inline int R_RIP = 18 + 1 + 17;
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inline int R_RIP = 18 + 1 + 21;
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#pragma D binding "1.0" R_RIP
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inline int R_RAX = 18 + 1 + 14;
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#pragma D binding "1.0" R_RAX
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