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Fix defects reported by Coverity

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1. Deadcode in ecore_init_cache_line_size(), qlnx_ioctl() and
	qlnx_clean_filters()
2. ARRAY_VS_SINGLETON issue in qlnx_remove_all_mcast_mac() and
	qlnx_update_rx_prod()

MFC after:5 days
This commit is contained in:
David C Somayajulu 2017-04-12 00:52:09 +00:00
parent 7d9b62e1a1
commit 54064a2fd3
2 changed files with 17 additions and 13 deletions
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9
sys/dev/qlnx/qlnxe/bcm_osal.h
View File

@ -144,7 +144,14 @@ rounddown_pow_of_two(unsigned long x)
#define OSAL_CPU_TO_LE16(val) htole16(val)
#define OSAL_LE16_TO_CPU(val) le16toh(val)
#define OSAL_CACHE_LINE_SIZE CACHE_LINE_SIZE
static __inline uint32_t
qlnx_get_cache_line_size(void)
{
return (CACHE_LINE_SIZE);
}
#define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size()
#define OSAL_BE32 uint32_t
#define dma_addr_t bus_addr_t
#define osal_size_t size_t

21
sys/dev/qlnx/qlnxe/qlnx_os.c
View File

@ -2167,9 +2167,6 @@ qlnx_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
}
QLNX_UNLOCK(ha);
if (ret)
ret = EINVAL;
}
break;
@ -5910,25 +5907,26 @@ qlnx_update_rx_prod(struct ecore_hwfn *p_hwfn, struct qlnx_rx_queue *rxq)
uint16_t bd_prod;
uint16_t cqe_prod;
struct eth_rx_prod_data rx_prods = {0};
union {
struct eth_rx_prod_data rx_prod_data;
uint32_t data32;
} rx_prods;
bd_prod = ecore_chain_get_prod_idx(&rxq->rx_bd_ring);
cqe_prod = ecore_chain_get_prod_idx(&rxq->rx_comp_ring);
/* Update producers */
rx_prods.bd_prod = htole16(bd_prod);
rx_prods.cqe_prod = htole16(cqe_prod);
rx_prods.rx_prod_data.bd_prod = htole16(bd_prod);
rx_prods.rx_prod_data.cqe_prod = htole16(cqe_prod);
/* Make sure that the BD and SGE data is updated before updating the
* producers since FW might read the BD/SGE right after the producer
* is updated.
*/
wmb();
//bus_barrier(ha->pci_reg, 0, 0, BUS_SPACE_BARRIER_READ);
//bus_barrier(ha->pci_dbells, 0, 0, BUS_SPACE_BARRIER_READ);
internal_ram_wr(p_hwfn, rxq->hw_rxq_prod_addr,
sizeof(rx_prods), (u32 *)&rx_prods);
sizeof(rx_prods), &rx_prods.data32);
/* mmiowb is needed to synchronize doorbell writes from more than one
* processor. It guarantees that the write arrives to the device before
@ -6342,9 +6340,8 @@ qlnx_remove_all_mcast_mac(qlnx_host_t *ha)
ha->mcast[i].addr[2] || ha->mcast[i].addr[3] ||
ha->mcast[i].addr[4] || ha->mcast[i].addr[5]) {
memcpy(&mcast->mac[0], &ha->mcast[i].addr[0], ETH_ALEN);
memcpy(&mcast->mac[i], &ha->mcast[i].addr[0], ETH_ALEN);
mcast->num_mc_addrs++;
mcast++;
}
}
mcast = &ha->ecore_mcast;
@ -6363,7 +6360,7 @@ qlnx_clean_filters(qlnx_host_t *ha)
int rc = 0;
/* Remove all unicast macs */
qlnx_remove_all_ucast_mac(ha);
rc = qlnx_remove_all_ucast_mac(ha);
if (rc)
return rc;