Fix SATA on nVidia MCP55 chipset. It needs some short time to allow BAR(5)

memory access.

PR:		amd64/128686, amd64/132372, amd64/139156
MFC after:	3 days
This commit is contained in:
Alexander Motin 2009-10-26 08:41:10 +00:00
parent 0fdcb6f055
commit 55944f2a75

View File

@ -165,7 +165,8 @@ ata_nvidia_chipinit(device_t dev)
/* enable control access */
pci_write_config(dev, 0x50, pci_read_config(dev, 0x50, 1) | 0x04,1);
/* MCP55 seems to need some time to allow r_res2 read. */
DELAY(10);
if (ctlr->chip->cfg1 & NVQ) {
/* clear interrupt status */
ATA_OUTL(ctlr->r_res2, offset, 0x00ff00ff);