From 5731987b71d0eb8ffdd8133a0a46f7b80e11804b Mon Sep 17 00:00:00 2001 From: Marius Strobl Date: Fri, 25 Dec 2020 15:44:39 +0100 Subject: [PATCH] mips: fix build w/ TICK_USE_MALTA_RTC defined This was mainly broken by 7e82012aff9888d64a85d19aaed51def9ebbff22 and r178192 respectively. Also, remove unused #include. --- sys/mips/malta/malta_machdep.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/sys/mips/malta/malta_machdep.c b/sys/mips/malta/malta_machdep.c index 0536abe09460..fd2b00355f89 100644 --- a/sys/mips/malta/malta_machdep.c +++ b/sys/mips/malta/malta_machdep.c @@ -73,8 +73,7 @@ __FBSDID("$FreeBSD$"); #endif #ifdef TICK_USE_MALTA_RTC -#include -#include +#include #include #endif @@ -157,7 +156,7 @@ lcd_puts(char *s) #ifdef TICK_USE_MALTA_RTC static __inline uint8_t -rtcin(uint8_t addr) +malta_rtcin(uint8_t addr) { *((volatile uint8_t *) @@ -167,7 +166,7 @@ rtcin(uint8_t addr) } static __inline void -writertc(uint8_t addr, uint8_t val) +malta_writertc(uint8_t addr, uint8_t val) { *((volatile uint8_t *) @@ -257,19 +256,19 @@ malta_cpu_freq(void) u_int64_t counterval[2]; /* Set RTC to binary mode. */ - writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD)); + malta_writertc(RTC_STATUSB, (malta_rtcin(RTC_STATUSB) | RTCSB_BCD)); /* Busy-wait for falling edge of RTC update. */ - while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) + while (((malta_rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) ; - while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) + while (((malta_rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) ; counterval[0] = mips_rd_count(); /* Busy-wait for falling edge of RTC update. */ - while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) + while (((malta_rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) ; - while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) + while (((malta_rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) ; counterval[1] = mips_rd_count();