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hwpmc_arm64: fill kern.hwpmc.cpuid

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This will be used to detect supported pmu events. The expected format is
the MIDR register with the revision and variant fields masked. See also:
lib/libpmc/pmu-events/arch/arm64/mapfile.csv.

MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D30601
This commit is contained in:
Mitchell Horne 2021-04-01 10:19:43 -03:00
parent 2129c8f677
commit 5867cccdc4
1 changed files with 13 additions and 0 deletions
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13
sys/dev/hwpmc/hwpmc_arm64.c
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@ -505,6 +505,7 @@ pmc_arm64_initialize()
struct pmc_classdep *pcd;
int idcode, impcode;
int reg;
uint64_t midr;
reg = arm64_pmcr_read();
arm64_npmcs = (reg & PMCR_N_MASK) >> PMCR_N_SHIFT;
@ -513,6 +514,18 @@ pmc_arm64_initialize()
PMCDBG1(MDP, INI, 1, "arm64-init npmcs=%d", arm64_npmcs);
/*
* Write the CPU model to kern.hwpmc.cpuid.
*
* We zero the variant and revision fields.
*
* TODO: how to handle differences between cores due to big.LITTLE?
* For now, just use MIDR from CPU 0.
*/
midr = (uint64_t)(pcpu_find(0)->pc_midr);
midr &= ~(CPU_VAR_MASK | CPU_REV_MASK);
snprintf(pmc_cpuid, sizeof(pmc_cpuid), "0x%016lx", midr);
/*
* Allocate space for pointers to PMC HW descriptors and for
* the MDEP structure used by MI code.