On POWER9 clear the HID0_RADIX before enabling the page tables
POWER9 supports Radix page tables in addition to Hashed page tables. When Radix page tables are in use, the TLB is cut in half, so that half of the TLB is used for the page walk cache. This is the default behavior, however FreeBSD currently does not support Radix tables. Clear this bit so that we can use the full TLB. Do this in the MMU logic so that configuration can be localized to the specific translation format. Once we do support Radix tables, the setup for that will be localized to the Radix MMU kobj.
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9ae8a6d3d1
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5ab39b6552
sys/powerpc
@ -116,6 +116,7 @@ __FBSDID("$FreeBSD$");
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#include <vm/vm_pageout.h>
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#include <machine/cpu.h>
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#include <machine/hid.h>
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#include <machine/md_var.h>
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#include <machine/mmuvar.h>
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@ -384,6 +385,12 @@ moea64_cpu_bootstrap_native(mmu_t mmup, int ap)
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mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR);
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switch (mfpvr() >> 16) {
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case IBMPOWER9:
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mtspr(SPR_HID0, mfspr(SPR_HID0) & ~HID0_RADIX);
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break;
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}
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/*
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* Install kernel SLB entries
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*/
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@ -33,6 +33,7 @@
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#define _POWERPC_HID_H_
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/* Hardware Implementation Dependent registers for the PowerPC */
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#define HID0_RADIX 0x0080000000000000 /* Enable Radix page tables (POWER9) */
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#define HID0_EMCP 0x80000000 /* Enable machine check pin */
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#define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */
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