Repocopy *.s to *.S
This commit is contained in:
Peter Wemm
parent
3674802f42
commit
5b27e93419
@ -283,7 +283,7 @@ ENTRY(fork_trampoline)
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* XXX it should be in a stand-alone file. It's still icu-dependent and
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* belongs in i386/isa.
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*/
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#include "amd64/isa/vector.s"
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#include "amd64/isa/vector.S"
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.data
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ALIGN_DATA
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@ -379,4 +379,4 @@ doreti_iret_fault:
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movq $0,TF_ERR(%rsp) /* XXX should be the error code */
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jmp alltraps_with_regs_pushed
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#include "amd64/isa/icu_ipl.s"
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#include "amd64/isa/icu_ipl.S"
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@ -1,382 +0,0 @@
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/*-
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* Copyright (c) 1989, 1990 William F. Jolitz.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <machine/asmacros.h>
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#include <sys/mutex.h>
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#include <machine/psl.h>
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#include <machine/trap.h>
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#include "assym.s"
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#define SEL_RPL_MASK 0x0003
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.text
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/*****************************************************************************/
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/* Trap handling */
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/*****************************************************************************/
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/*
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* Trap and fault vector routines.
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*
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* Most traps are 'trap gates', SDT_SYS386TGT. A trap gate pushes state on
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* the stack that mostly looks like an interrupt, but does not disable
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* interrupts. A few of the traps we are use are interrupt gates,
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* SDT_SYS386IGT, which are nearly the same thing except interrupts are
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* disabled on entry.
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*
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* The cpu will push a certain amount of state onto the kernel stack for
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* the current process. The amount of state depends on the type of trap
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* and whether the trap crossed rings or not. See i386/include/frame.h.
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* At the very least the current EFLAGS (status register, which includes
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* the interrupt disable state prior to the trap), the code segment register,
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* and the return instruction pointer are pushed by the cpu. The cpu
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* will also push an 'error' code for certain traps. We push a dummy
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* error code for those traps where the cpu doesn't in order to maintain
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* a consistent frame. We also push a contrived 'trap number'.
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*
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* The cpu does not push the general registers, we must do that, and we
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* must restore them prior to calling 'iret'. The cpu adjusts the %cs and
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* %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
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* must load them with appropriate values for supervisor mode operation.
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*/
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#define IDTVEC(name) ALIGN_TEXT; .globl __CONCAT(X,name); \
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.type __CONCAT(X,name),@function; __CONCAT(X,name):
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#define TRAP(a) pushq $(a) ; jmp alltraps
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MCOUNT_LABEL(user)
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MCOUNT_LABEL(btrap)
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IDTVEC(div)
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pushq $0; TRAP(T_DIVIDE)
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IDTVEC(dbg)
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pushq $0; TRAP(T_TRCTRAP)
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IDTVEC(nmi)
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pushq $0; TRAP(T_NMI)
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IDTVEC(bpt)
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pushq $0; TRAP(T_BPTFLT)
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IDTVEC(ofl)
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pushq $0; TRAP(T_OFLOW)
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IDTVEC(bnd)
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pushq $0; TRAP(T_BOUND)
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IDTVEC(ill)
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pushq $0; TRAP(T_PRIVINFLT)
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IDTVEC(dna)
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pushq $0; TRAP(T_DNA)
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IDTVEC(fpusegm)
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pushq $0; TRAP(T_FPOPFLT)
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IDTVEC(tss)
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TRAP(T_TSSFLT)
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IDTVEC(missing)
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TRAP(T_SEGNPFLT)
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IDTVEC(stk)
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TRAP(T_STKFLT)
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IDTVEC(prot)
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TRAP(T_PROTFLT)
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IDTVEC(page)
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TRAP(T_PAGEFLT)
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IDTVEC(mchk)
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pushq $0; TRAP(T_MCHK)
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IDTVEC(rsvd)
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pushq $0; TRAP(T_RESERVED)
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IDTVEC(fpu)
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pushq $0; TRAP(T_ARITHTRAP)
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IDTVEC(align)
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TRAP(T_ALIGNFLT)
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IDTVEC(xmm)
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pushq $0; TRAP(T_XMMFLT)
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/*
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* alltraps entry point. Interrupts are enabled if this was a trap
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* gate (TGT), else disabled if this was an interrupt gate (IGT).
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* Note that int0x80_syscall is a trap gate. Only page faults
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* use an interrupt gate.
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*/
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SUPERALIGN_TEXT
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.globl alltraps
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.type alltraps,@function
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alltraps:
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subq $TF_TRAPNO,%rsp /* tf_err and tf_trapno already pushed */
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movq %rdi,TF_RDI(%rsp)
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movq %rsi,TF_RSI(%rsp)
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movq %rdx,TF_RDX(%rsp)
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movq %rcx,TF_RCX(%rsp)
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movq %r8,TF_R8(%rsp)
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movq %r9,TF_R9(%rsp)
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movq %rax,TF_RAX(%rsp)
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movq %rbx,TF_RBX(%rsp)
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movq %rbp,TF_RBP(%rsp)
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movq %r10,TF_R10(%rsp)
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movq %r11,TF_R11(%rsp)
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movq %r12,TF_R12(%rsp)
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movq %r13,TF_R13(%rsp)
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movq %r14,TF_R14(%rsp)
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movq %r15,TF_R15(%rsp)
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alltraps_with_regs_pushed:
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FAKE_MCOUNT(13*4(%rsp))
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calltrap:
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FAKE_MCOUNT(btrap) /* init "from" btrap -> calltrap */
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call trap
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MEXITCOUNT
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jmp doreti /* Handle any pending ASTs */
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/*
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* Call gate entry for FreeBSD ELF and Linux/NetBSD syscall (int 0x80)
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*
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* Even though the name says 'int0x80', this is actually a TGT (trap gate)
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* rather then an IGT (interrupt gate). Thus interrupts are enabled on
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* entry just as they are for a normal syscall.
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*
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* This leaves a place to put eflags so that the call frame can be
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* converted to a trap frame. Note that the eflags is (semi-)bogusly
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* pushed into (what will be) tf_err and then copied later into the
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* final spot. It has to be done this way because esp can't be just
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* temporarily altered for the pushfl - an interrupt might come in
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* and clobber the saved cs/eip.
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*/
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SUPERALIGN_TEXT
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IDTVEC(int0x80_syscall)
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pushq $2 /* sizeof "int 0x80" */
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subq $TF_ERR,%rsp /* skip over tf_trapno */
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movq %rdi,TF_RDI(%rsp)
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movq %rsi,TF_RSI(%rsp)
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movq %rdx,TF_RDX(%rsp)
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movq %rcx,TF_RCX(%rsp)
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movq %r8,TF_R8(%rsp)
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movq %r9,TF_R9(%rsp)
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movq %rax,TF_RAX(%rsp)
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movq %rbx,TF_RBX(%rsp)
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movq %rbp,TF_RBP(%rsp)
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movq %r10,TF_R10(%rsp)
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movq %r11,TF_R11(%rsp)
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movq %r12,TF_R12(%rsp)
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movq %r13,TF_R13(%rsp)
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movq %r14,TF_R14(%rsp)
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movq %r15,TF_R15(%rsp)
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FAKE_MCOUNT(13*4(%rsp))
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call syscall
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MEXITCOUNT
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jmp doreti
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/*
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* Fast syscall entry point. We enter here with just our new %cs/%ss set,
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* and the new privilige level. We are still running on the old user stack
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* pointer. We have to juggle a few things around to find our stack etc.
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* swapgs gives us access to our PCPU space only.
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* XXX The PCPU stuff is stubbed out right now...
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*/
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IDTVEC(fast_syscall)
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#swapgs
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movq %rsp,PCPU(SCRATCH_RSP)
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movq common_tss+COMMON_TSS_RSP0,%rsp
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sti
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/* Now emulate a trapframe. Ugh. */
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subq $TF_SIZE,%rsp
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movq $KUDSEL,TF_SS(%rsp)
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/* defer TF_RSP till we have a spare register */
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movq %r11,TF_RFLAGS(%rsp)
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movq $KUCSEL,TF_CS(%rsp)
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movq %rcx,TF_RIP(%rsp) /* %rcx original value is in %r10 */
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movq $2,TF_ERR(%rsp)
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movq %rdi,TF_RDI(%rsp) /* arg 1 */
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movq %rsi,TF_RSI(%rsp) /* arg 2 */
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movq %rdx,TF_RDX(%rsp) /* arg 3 */
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movq %r10,TF_RCX(%rsp) /* arg 4 */
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movq %r8,TF_R8(%rsp) /* arg 5 */
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movq %r9,TF_R9(%rsp) /* arg 6 */
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movq %rax,TF_RAX(%rsp) /* syscall number */
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movq %rbx,TF_RBX(%rsp) /* C preserved */
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movq %rbp,TF_RBP(%rsp) /* C preserved */
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movq %r12,TF_R12(%rsp) /* C preserved */
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movq %r13,TF_R13(%rsp) /* C preserved */
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movq %r14,TF_R14(%rsp) /* C preserved */
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movq %r15,TF_R15(%rsp) /* C preserved */
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movq PCPU(SCRATCH_RSP),%r12 /* %r12 already saved */
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movq %r12,TF_RSP(%rsp) /* user stack pointer */
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call syscall
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movq PCPU(CURPCB),%rax
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testq $PCB_FULLCTX,PCB_FLAGS(%rax)
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jne 3f
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/* simplified from doreti */
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1: /* Check for and handle AST's on return to userland */
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cli
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movq PCPU(CURTHREAD),%rax
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testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%rax)
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je 2f
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sti
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movq %rsp, %rdi
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call ast
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jmp 1b
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2: /* restore preserved registers */
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movq TF_RDI(%rsp),%rdi /* bonus; preserve arg 1 */
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movq TF_RSI(%rsp),%rsi /* bonus: preserve arg 2 */
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movq TF_RDX(%rsp),%rdx /* return value 2 */
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movq TF_RAX(%rsp),%rax /* return value 1 */
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movq TF_RBX(%rsp),%rbx /* C preserved */
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movq TF_RBP(%rsp),%rbp /* C preserved */
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movq TF_R12(%rsp),%r12 /* C preserved */
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movq TF_R13(%rsp),%r13 /* C preserved */
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movq TF_R14(%rsp),%r14 /* C preserved */
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movq TF_R15(%rsp),%r15 /* C preserved */
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movq TF_RFLAGS(%rsp),%r11 /* original %rflags */
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movq TF_RIP(%rsp),%rcx /* original %rip */
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movq TF_RSP(%rsp),%r9 /* user stack pointer */
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movq %r9,%rsp /* original %rsp */
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#swapgs
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sysretq
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3: /* Requested full context restore, use doreti for that */
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andq $~PCB_FULLCTX,PCB_FLAGS(%rax)
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jmp doreti
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/*
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* Here for CYA insurance, in case a "syscall" instruction gets
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* issued from 32 bit compatability mode. MSR_CSTAR has to point
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* to *something* if EFER_SCE is enabled.
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*/
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IDTVEC(fast_syscall32)
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sysret
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ENTRY(fork_trampoline)
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movq %r12, %rdi /* function */
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movq %rbx, %rsi /* arg1 */
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movq %rsp, %rdx /* trapframe pointer */
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call fork_exit
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MEXITCOUNT
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jmp doreti /* Handle any ASTs */
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/*
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* Include what was once config+isa-dependent code.
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* XXX it should be in a stand-alone file. It's still icu-dependent and
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* belongs in i386/isa.
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*/
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#include "amd64/isa/vector.s"
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.data
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ALIGN_DATA
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/*
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* void doreti(struct trapframe)
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*
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* Handle return from interrupts, traps and syscalls.
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*/
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.text
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SUPERALIGN_TEXT
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.type doreti,@function
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doreti:
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FAKE_MCOUNT(bintr) /* init "from" bintr -> doreti */
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/*
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* Check if ASTs can be handled now.
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*/
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testb $SEL_RPL_MASK,TF_CS(%rsp) /* are we returning to user mode? */
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jz doreti_exit /* can't handle ASTs now if not */
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doreti_ast:
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/*
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* Check for ASTs atomically with returning. Disabling CPU
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* interrupts provides sufficient locking evein the SMP case,
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* since we will be informed of any new ASTs by an IPI.
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*/
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cli
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movq PCPU(CURTHREAD),%rax
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testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%rax)
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je doreti_exit
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sti
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movq %rsp, %rdi /* pass a pointer to the trapframe */
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call ast
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jmp doreti_ast
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/*
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* doreti_exit: pop registers, iret.
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*
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* The segment register pop is a special case, since it may
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* fault if (for example) a sigreturn specifies bad segment
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* registers. The fault is handled in trap.c.
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*/
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doreti_exit:
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MEXITCOUNT
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movq TF_RDI(%rsp),%rdi
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movq TF_RSI(%rsp),%rsi
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movq TF_RDX(%rsp),%rdx
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movq TF_RCX(%rsp),%rcx
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movq TF_R8(%rsp),%r8
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movq TF_R9(%rsp),%r9
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movq TF_RAX(%rsp),%rax
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movq TF_RBX(%rsp),%rbx
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movq TF_RBP(%rsp),%rbp
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movq TF_R10(%rsp),%r10
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movq TF_R11(%rsp),%r11
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movq TF_R12(%rsp),%r12
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movq TF_R13(%rsp),%r13
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movq TF_R14(%rsp),%r14
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movq TF_R15(%rsp),%r15
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addq $TF_RIP,%rsp /* skip over tf_err, tf_trapno */
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.globl doreti_iret
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doreti_iret:
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iretq
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/*
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* doreti_iret_fault and friends. Alternative return code for
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* the case where we get a fault in the doreti_exit code
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* above. trap() (i386/i386/trap.c) catches this specific
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* case, sends the process a signal and continues in the
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* corresponding place in the code below.
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*/
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ALIGN_TEXT
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.globl doreti_iret_fault
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doreti_iret_fault:
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subq $TF_RIP,%rsp /* space including tf_err, tf_trapno */
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movq %rdi,TF_RDI(%rsp)
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movq %rsi,TF_RSI(%rsp)
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movq %rdx,TF_RDX(%rsp)
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movq %rcx,TF_RCX(%rsp)
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movq %r8,TF_R8(%rsp)
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movq %r9,TF_R9(%rsp)
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movq %rax,TF_RAX(%rsp)
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movq %rbx,TF_RBX(%rsp)
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movq %rbp,TF_RBP(%rsp)
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movq %r10,TF_R10(%rsp)
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movq %r11,TF_R11(%rsp)
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movq %r12,TF_R12(%rsp)
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movq %r13,TF_R13(%rsp)
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movq %r14,TF_R14(%rsp)
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movq %r15,TF_R15(%rsp)
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movq $T_PROTFLT,TF_TRAPNO(%rsp)
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movq $0,TF_ERR(%rsp) /* XXX should be the error code */
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jmp alltraps_with_regs_pushed
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#include "amd64/isa/icu_ipl.s"
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@ -1,92 +0,0 @@
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/*-
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* Copyright (c) 2003 Peter Wemm <peter@FreeBSD.org>
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||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <machine/asmacros.h>
|
||||
#include <machine/psl.h>
|
||||
#include <machine/pmap.h>
|
||||
#include <machine/specialreg.h>
|
||||
|
||||
#include "assym.s"
|
||||
|
||||
/*
|
||||
* PTmap is recursive pagemap at top of virtual address space.
|
||||
* Within PTmap, the page directory can be found (third indirection).
|
||||
*/
|
||||
.globl PTmap,PTD,PTDpde
|
||||
.set PTmap,(PTDPTDI << PDRSHIFT)
|
||||
.set PTD,PTmap + (PTDPTDI * PAGE_SIZE)
|
||||
.set PTDpde,PTD + (PTDPTDI * PDESIZE)
|
||||
|
||||
/*
|
||||
* Compiled KERNBASE location
|
||||
*/
|
||||
.globl kernbase
|
||||
.set kernbase,KERNBASE
|
||||
|
||||
.text
|
||||
/**********************************************************************
|
||||
*
|
||||
* This is where the loader trampoline start us, set the ball rolling...
|
||||
*
|
||||
* We are called with the stack looking like this:
|
||||
* 0(%rsp) = 32 bit return address (cannot be used)
|
||||
* 4(%rsp) = 32 bit modulep
|
||||
* 8(%rsp) = 32 bit kernend
|
||||
*
|
||||
* We are already in long mode, on a 64 bit %cs and running at KERNBASE.
|
||||
*/
|
||||
NON_GPROF_ENTRY(btext)
|
||||
|
||||
/* Tell the bios to warmboot next time */
|
||||
movw $0x1234,0x472
|
||||
|
||||
/* Don't trust what the loader gives for rflags. */
|
||||
pushq $PSL_KERNEL
|
||||
popfq
|
||||
|
||||
/* Find the metadata pointers before we lose them */
|
||||
movq %rsp, %rbp
|
||||
xorq %rax, %rax
|
||||
movl 4(%rbp),%eax /* modulep */
|
||||
movq %rax,modulep
|
||||
movl 8(%rbp),%eax /* kernend */
|
||||
movq %rax,physfree
|
||||
|
||||
/* Get onto a stack that we can trust - there is no going back now. */
|
||||
movq $bootstack,%rsp
|
||||
xorq %rbp, %rbp
|
||||
|
||||
call hammer_time /* set up cpu for unix operation */
|
||||
call mi_startup /* autoconfiguration, mountroot etc */
|
||||
0: hlt
|
||||
jmp 0b
|
||||
|
||||
.bss
|
||||
ALIGN_DATA /* just to be sure */
|
||||
.space 0x1000 /* space for bootstack - temporary stack */
|
||||
bootstack:
|
||||
@ -1,56 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2003 Peter Wemm <peter@freeBSD.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <sys/syscall.h>
|
||||
|
||||
#include <machine/asmacros.h>
|
||||
|
||||
#include "assym.s"
|
||||
|
||||
.text
|
||||
/**********************************************************************
|
||||
*
|
||||
* Signal trampoline, copied to top of user stack
|
||||
*
|
||||
*/
|
||||
NON_GPROF_ENTRY(sigcode)
|
||||
call *SIGF_HANDLER(%rsp) /* call signal handler */
|
||||
lea SIGF_UC(%rsp),%rdi /* get ucontext_t */
|
||||
pushq $0 /* junk to fake return addr. */
|
||||
movq $SYS_sigreturn,%rax
|
||||
syscall /* enter kernel with args */
|
||||
0: hlt /* trap priviliged instruction */
|
||||
jmp 0b
|
||||
|
||||
ALIGN_TEXT
|
||||
esigcode:
|
||||
|
||||
.data
|
||||
.globl szsigcode
|
||||
szsigcode:
|
||||
.long esigcode-sigcode
|
||||
@ -1,494 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 1993 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the University of
|
||||
* California, Berkeley and its contributors.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <machine/asmacros.h>
|
||||
#include <machine/cputypes.h>
|
||||
#include <machine/pmap.h>
|
||||
#include <machine/specialreg.h>
|
||||
|
||||
#include "assym.s"
|
||||
|
||||
|
||||
.text
|
||||
|
||||
/* fillw(pat, base, cnt) */
|
||||
/* %rdi,%rsi, %rdx */
|
||||
ENTRY(fillw)
|
||||
movq %rdi,%rax
|
||||
movq %rsi,%rdi
|
||||
movq %rdx,%rcx
|
||||
cld
|
||||
rep
|
||||
stosw
|
||||
ret
|
||||
|
||||
/*****************************************************************************/
|
||||
/* copyout and fubyte family */
|
||||
/*****************************************************************************/
|
||||
/*
|
||||
* Access user memory from inside the kernel. These routines and possibly
|
||||
* the math- and DOS emulators should be the only places that do this.
|
||||
*
|
||||
* We have to access the memory with user's permissions, so use a segment
|
||||
* selector with RPL 3. For writes to user space we have to additionally
|
||||
* check the PTE for write permission, because the 386 does not check
|
||||
* write permissions when we are executing with EPL 0. The 486 does check
|
||||
* this if the WP bit is set in CR0, so we can use a simpler version here.
|
||||
*
|
||||
* These routines set curpcb->onfault for the time they execute. When a
|
||||
* protection violation occurs inside the functions, the trap handler
|
||||
* returns to *curpcb->onfault instead of the function.
|
||||
*/
|
||||
|
||||
/*
|
||||
* copyout(from_kernel, to_user, len) - MP SAFE
|
||||
* %rdi, %rsi, %rdx
|
||||
*/
|
||||
ENTRY(copyout)
|
||||
movq PCPU(CURPCB),%rax
|
||||
movq $copyout_fault,PCB_ONFAULT(%rax)
|
||||
testq %rdx,%rdx /* anything to do? */
|
||||
jz done_copyout
|
||||
|
||||
/*
|
||||
* Check explicitly for non-user addresses. If 486 write protection
|
||||
* is being used, this check is essential because we are in kernel
|
||||
* mode so the h/w does not provide any protection against writing
|
||||
* kernel addresses.
|
||||
*/
|
||||
|
||||
/*
|
||||
* First, prevent address wrapping.
|
||||
*/
|
||||
movq %rsi,%rax
|
||||
addq %rdx,%rax
|
||||
jc copyout_fault
|
||||
/*
|
||||
* XXX STOP USING VM_MAXUSER_ADDRESS.
|
||||
* It is an end address, not a max, so every time it is used correctly it
|
||||
* looks like there is an off by one error, and of course it caused an off
|
||||
* by one error in several places.
|
||||
*/
|
||||
movq $VM_MAXUSER_ADDRESS,%rcx
|
||||
cmpq %rcx,%rax
|
||||
ja copyout_fault
|
||||
|
||||
xchgq %rdi, %rsi
|
||||
/* bcopy(%rsi, %rdi, %rdx) */
|
||||
movq %rdx,%rcx
|
||||
|
||||
shrq $3,%rcx
|
||||
cld
|
||||
rep
|
||||
movsq
|
||||
movb %dl,%cl
|
||||
andb $7,%cl
|
||||
rep
|
||||
movsb
|
||||
|
||||
done_copyout:
|
||||
xorq %rax,%rax
|
||||
movq PCPU(CURPCB),%rdx
|
||||
movq %rax,PCB_ONFAULT(%rdx)
|
||||
ret
|
||||
|
||||
ALIGN_TEXT
|
||||
copyout_fault:
|
||||
movq PCPU(CURPCB),%rdx
|
||||
movq $0,PCB_ONFAULT(%rdx)
|
||||
movq $EFAULT,%rax
|
||||
ret
|
||||
|
||||
/*
|
||||
* copyin(from_user, to_kernel, len) - MP SAFE
|
||||
* %rdi, %rsi, %rdx
|
||||
*/
|
||||
ENTRY(copyin)
|
||||
movq PCPU(CURPCB),%rax
|
||||
movq $copyin_fault,PCB_ONFAULT(%rax)
|
||||
testq %rdx,%rdx /* anything to do? */
|
||||
jz done_copyin
|
||||
|
||||
/*
|
||||
* make sure address is valid
|
||||
*/
|
||||
movq %rdi,%rax
|
||||
addq %rdx,%rax
|
||||
jc copyin_fault
|
||||
movq $VM_MAXUSER_ADDRESS,%rcx
|
||||
cmpq %rcx,%rax
|
||||
ja copyin_fault
|
||||
|
||||
xchgq %rdi, %rsi
|
||||
movq %rdx, %rcx
|
||||
movb %cl,%al
|
||||
shrq $3,%rcx /* copy longword-wise */
|
||||
cld
|
||||
rep
|
||||
movsq
|
||||
movb %al,%cl
|
||||
andb $7,%cl /* copy remaining bytes */
|
||||
rep
|
||||
movsb
|
||||
|
||||
done_copyin:
|
||||
xorq %rax,%rax
|
||||
movq PCPU(CURPCB),%rdx
|
||||
movq %rax,PCB_ONFAULT(%rdx)
|
||||
ret
|
||||
|
||||
ALIGN_TEXT
|
||||
copyin_fault:
|
||||
movq PCPU(CURPCB),%rdx
|
||||
movq $0,PCB_ONFAULT(%rdx)
|
||||
movq $EFAULT,%rax
|
||||
ret
|
||||
|
||||
/*
|
||||
* casuptr. Compare and set user pointer. Returns -1 or the current value.
|
||||
* dst = %rdi, old = %rsi, new = %rdx
|
||||
*/
|
||||
ENTRY(casuptr)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-4,%rax
|
||||
cmpq %rax,%rdi /* verify address is valid */
|
||||
ja fusufault
|
||||
|
||||
movq %rsi, %rax /* old */
|
||||
cmpxchgq %rdx, (%rdi) /* new = %rdx */
|
||||
|
||||
/*
|
||||
* The old value is in %eax. If the store succeeded it will be the
|
||||
* value we expected (old) from before the store, otherwise it will
|
||||
* be the current value.
|
||||
*/
|
||||
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
movq $0,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
/*
|
||||
* fu{byte,sword,word} - MP SAFE
|
||||
*
|
||||
* Fetch a byte (sword, word) from user memory
|
||||
* %rdi
|
||||
*/
|
||||
ENTRY(fuword64)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-8,%rax
|
||||
cmpq %rax,%rdi /* verify address is valid */
|
||||
ja fusufault
|
||||
|
||||
movq (%rdi),%rax
|
||||
movq $0,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
ENTRY(fuword32)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-4,%rax
|
||||
cmpq %rax,%rdi /* verify address is valid */
|
||||
ja fusufault
|
||||
|
||||
# XXX use the 64 extend
|
||||
xorq %rax, %rax
|
||||
movl (%rdi),%eax
|
||||
movq $0,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
ENTRY(fuword)
|
||||
jmp fuword32
|
||||
|
||||
/*
|
||||
* These two routines are called from the profiling code, potentially
|
||||
* at interrupt time. If they fail, that's okay, good things will
|
||||
* happen later. Fail all the time for now - until the trap code is
|
||||
* able to deal with this.
|
||||
*/
|
||||
ALTENTRY(suswintr)
|
||||
ENTRY(fuswintr)
|
||||
movq $-1,%rax
|
||||
ret
|
||||
|
||||
/*
|
||||
* fuword16 - MP SAFE
|
||||
*/
|
||||
ENTRY(fuword16)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-2,%rax
|
||||
cmpq %rax,%rdi
|
||||
ja fusufault
|
||||
|
||||
# XXX use the 64 extend
|
||||
xorq %rax, %rax
|
||||
movzwl (%rdi),%eax
|
||||
movq $0,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
/*
|
||||
* fubyte - MP SAFE
|
||||
*/
|
||||
ENTRY(fubyte)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-1,%rax
|
||||
cmpq %rax,%rdi
|
||||
ja fusufault
|
||||
|
||||
# XXX use the 64 extend
|
||||
xorq %rax, %rax
|
||||
movzbl (%rdi),%eax
|
||||
movq $0,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
ALIGN_TEXT
|
||||
fusufault:
|
||||
movq PCPU(CURPCB),%rcx
|
||||
xorq %rax,%rax
|
||||
movq %rax,PCB_ONFAULT(%rcx)
|
||||
decq %rax
|
||||
ret
|
||||
|
||||
/*
|
||||
* su{byte,sword,word} - MP SAFE
|
||||
*
|
||||
* Write a byte (word, longword) to user memory
|
||||
* addr = %rdi, value = %rsi
|
||||
*/
|
||||
ENTRY(suword64)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-8,%rax
|
||||
cmpq %rax,%rdi /* verify address validity */
|
||||
ja fusufault
|
||||
|
||||
movq %rsi,(%rdi)
|
||||
xorq %rax,%rax
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq %rax,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
ENTRY(suword32)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-4,%rax
|
||||
cmpq %rax,%rdi /* verify address validity */
|
||||
ja fusufault
|
||||
|
||||
movl %esi,(%rdi)
|
||||
xorq %rax,%rax
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq %rax,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
ENTRY(suword)
|
||||
jmp suword32
|
||||
|
||||
/*
|
||||
* suword16 - MP SAFE
|
||||
*/
|
||||
ENTRY(suword16)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-2,%rax
|
||||
cmpq %rax,%rdi /* verify address validity */
|
||||
ja fusufault
|
||||
|
||||
movw %si,(%rdi)
|
||||
xorq %rax,%rax
|
||||
movq PCPU(CURPCB),%rcx /* restore trashed register */
|
||||
movq %rax,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
/*
|
||||
* subyte - MP SAFE
|
||||
*/
|
||||
ENTRY(subyte)
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $fusufault,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS-1,%rax
|
||||
cmpq %rax,%rdi /* verify address validity */
|
||||
ja fusufault
|
||||
|
||||
movl %esi, %eax
|
||||
movb %al,(%rdi)
|
||||
xorq %rax,%rax
|
||||
movq PCPU(CURPCB),%rcx /* restore trashed register */
|
||||
movq %rax,PCB_ONFAULT(%rcx)
|
||||
ret
|
||||
|
||||
/*
|
||||
* copyinstr(from, to, maxlen, int *lencopied) - MP SAFE
|
||||
* %rdi, %rsi, %rdx, %rcx
|
||||
*
|
||||
* copy a string from from to to, stop when a 0 character is reached.
|
||||
* return ENAMETOOLONG if string is longer than maxlen, and
|
||||
* EFAULT on protection violations. If lencopied is non-zero,
|
||||
* return the actual length in *lencopied.
|
||||
*/
|
||||
ENTRY(copyinstr)
|
||||
movq %rdx, %r8 /* %r8 = maxlen */
|
||||
movq %rcx, %r9 /* %r9 = *len */
|
||||
xchgq %rdi, %rsi /* %rdi = from, %rsi = to */
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $cpystrflt,PCB_ONFAULT(%rcx)
|
||||
|
||||
movq $VM_MAXUSER_ADDRESS,%rax
|
||||
|
||||
/* make sure 'from' is within bounds */
|
||||
subq %rsi,%rax
|
||||
jbe cpystrflt
|
||||
|
||||
/* restrict maxlen to <= VM_MAXUSER_ADDRESS-from */
|
||||
cmpq %rdx,%rax
|
||||
jae 1f
|
||||
movq %rax,%rdx
|
||||
movq %rax,%r8
|
||||
1:
|
||||
incq %rdx
|
||||
cld
|
||||
|
||||
2:
|
||||
decq %rdx
|
||||
jz 3f
|
||||
|
||||
lodsb
|
||||
stosb
|
||||
orb %al,%al
|
||||
jnz 2b
|
||||
|
||||
/* Success -- 0 byte reached */
|
||||
decq %rdx
|
||||
xorq %rax,%rax
|
||||
jmp cpystrflt_x
|
||||
3:
|
||||
/* rdx is zero - return ENAMETOOLONG or EFAULT */
|
||||
movq $VM_MAXUSER_ADDRESS,%rax
|
||||
cmpq %rax,%rsi
|
||||
jae cpystrflt
|
||||
4:
|
||||
movq $ENAMETOOLONG,%rax
|
||||
jmp cpystrflt_x
|
||||
|
||||
cpystrflt:
|
||||
movq $EFAULT,%rax
|
||||
|
||||
cpystrflt_x:
|
||||
/* set *lencopied and return %eax */
|
||||
movq PCPU(CURPCB),%rcx
|
||||
movq $0,PCB_ONFAULT(%rcx)
|
||||
|
||||
testq %r9,%r9
|
||||
jz 1f
|
||||
subq %rdx,%r8
|
||||
movq %r8,(%r9)
|
||||
1:
|
||||
ret
|
||||
|
||||
|
||||
/*
|
||||
* copystr(from, to, maxlen, int *lencopied) - MP SAFE
|
||||
* %rdi, %rsi, %rdx, %rcx
|
||||
*/
|
||||
ENTRY(copystr)
|
||||
movq %rdx, %r8 /* %r8 = maxlen */
|
||||
|
||||
xchgq %rdi, %rsi
|
||||
incq %rdx
|
||||
cld
|
||||
1:
|
||||
decq %rdx
|
||||
jz 4f
|
||||
lodsb
|
||||
stosb
|
||||
orb %al,%al
|
||||
jnz 1b
|
||||
|
||||
/* Success -- 0 byte reached */
|
||||
decq %rdx
|
||||
xorq %rax,%rax
|
||||
jmp 6f
|
||||
4:
|
||||
/* rdx is zero -- return ENAMETOOLONG */
|
||||
movq $ENAMETOOLONG,%rax
|
||||
|
||||
6:
|
||||
|
||||
testq %rcx, %rcx
|
||||
jz 7f
|
||||
/* set *lencopied and return %rax */
|
||||
subq %rdx, %r8
|
||||
movq %r8, (%rcx)
|
||||
7:
|
||||
ret
|
||||
|
||||
/*
|
||||
* Handling of special 386 registers and descriptor tables etc
|
||||
* %rdi
|
||||
*/
|
||||
/* void lgdt(struct region_descriptor *rdp); */
|
||||
ENTRY(lgdt)
|
||||
/* reload the descriptor table */
|
||||
lgdt (%rdi)
|
||||
|
||||
/* flush the prefetch q */
|
||||
jmp 1f
|
||||
nop
|
||||
1:
|
||||
movl $KDSEL, %eax
|
||||
mov %ax,%ds
|
||||
mov %ax,%es
|
||||
mov %ax,%fs /* Beware, use wrmsr to set 64 bit base */
|
||||
mov %ax,%gs
|
||||
mov %ax,%ss
|
||||
|
||||
/* reload code selector by turning return into intersegmental return */
|
||||
popq %rax
|
||||
pushq $KCSEL
|
||||
pushq %rax
|
||||
lretq
|
||||
@ -1,295 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to Berkeley by
|
||||
* William Jolitz.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the University of
|
||||
* California, Berkeley and its contributors.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <machine/asmacros.h>
|
||||
|
||||
#include "assym.s"
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Scheduling */
|
||||
/*****************************************************************************/
|
||||
|
||||
.text
|
||||
|
||||
/*
|
||||
* cpu_throw()
|
||||
*
|
||||
* This is the second half of cpu_swtch(). It is used when the current
|
||||
* thread is either a dummy or slated to die, and we no longer care
|
||||
* about its state. This is only a slight optimization and is probably
|
||||
* not worth it anymore. Note that we need to clear the pm_active bits so
|
||||
* we do need the old proc if it still exists.
|
||||
* %rdi = oldtd
|
||||
* %rsi = newtd
|
||||
*/
|
||||
ENTRY(cpu_throw)
|
||||
xorq %rax, %rax
|
||||
movl PCPU(CPUID), %eax
|
||||
testq %rdi,%rdi /* no thread? */
|
||||
jz 1f
|
||||
/* release bit from old pm_active */
|
||||
movq TD_PROC(%rdi), %rdx /* oldtd->td_proc */
|
||||
movq P_VMSPACE(%rdx), %rdx /* proc->p_vmspace */
|
||||
btrq %rax, VM_PMAP+PM_ACTIVE(%rdx) /* clear old */
|
||||
1:
|
||||
movq TD_PCB(%rsi),%rdx /* newtd->td_proc */
|
||||
movq PCB_CR3(%rdx),%rdx
|
||||
movq %rdx,%cr3 /* new address space */
|
||||
/* set bit in new pm_active */
|
||||
movq TD_PROC(%rsi),%rdx
|
||||
movq P_VMSPACE(%rdx), %rdx
|
||||
btsq %rax, VM_PMAP+PM_ACTIVE(%rdx) /* set new */
|
||||
jmp sw1
|
||||
|
||||
/*
|
||||
* cpu_switch(old, new)
|
||||
*
|
||||
* Save the current thread state, then select the next thread to run
|
||||
* and load its state.
|
||||
* %rdi = oldtd
|
||||
* %rsi = newtd
|
||||
*/
|
||||
ENTRY(cpu_switch)
|
||||
|
||||
/* Switch to new thread. First, save context. */
|
||||
#ifdef INVARIANTS
|
||||
testq %rdi,%rdi /* no thread? */
|
||||
jz badsw2 /* no, panic */
|
||||
#endif
|
||||
|
||||
movq TD_PCB(%rdi),%rdx
|
||||
|
||||
movq (%rsp),%rax /* Hardware registers */
|
||||
movq %rax,PCB_RIP(%rdx)
|
||||
movq %rbx,PCB_RBX(%rdx)
|
||||
movq %rsp,PCB_RSP(%rdx)
|
||||
movq %rbp,PCB_RBP(%rdx)
|
||||
movq %r12,PCB_R12(%rdx)
|
||||
movq %r13,PCB_R13(%rdx)
|
||||
movq %r14,PCB_R14(%rdx)
|
||||
movq %r15,PCB_R15(%rdx)
|
||||
pushfq /* PSL */
|
||||
popq PCB_RFLAGS(%rdx)
|
||||
|
||||
/* have we used fp, and need a save? */
|
||||
cmpq %rdi,PCPU(FPCURTHREAD)
|
||||
jne 1f
|
||||
pushq %rdi
|
||||
pushq %rsi
|
||||
addq $PCB_SAVEFPU,%rdx /* h/w bugs make saving complicated */
|
||||
movq %rdx, %rdi
|
||||
call npxsave /* do it in a big C function */
|
||||
popq %rsi
|
||||
popq %rdi
|
||||
1:
|
||||
|
||||
/* Save is done. Now fire up new thread. Leave old vmspace. */
|
||||
#ifdef INVARIANTS
|
||||
testq %rsi,%rsi /* no thread? */
|
||||
jz badsw3 /* no, panic */
|
||||
#endif
|
||||
movq TD_PCB(%rsi),%rdx
|
||||
xorq %rax, %rax
|
||||
movl PCPU(CPUID), %eax
|
||||
|
||||
/* switch address space */
|
||||
movq PCB_CR3(%rdx),%rdx
|
||||
movq %rdx,%cr3 /* new address space */
|
||||
|
||||
/* Release bit from old pmap->pm_active */
|
||||
movq TD_PROC(%rdi), %rdx /* oldproc */
|
||||
movq P_VMSPACE(%rdx), %rdx
|
||||
btrq %rax, VM_PMAP+PM_ACTIVE(%rdx) /* clear old */
|
||||
|
||||
/* Set bit in new pmap->pm_active */
|
||||
movq TD_PROC(%rsi),%rdx /* newproc */
|
||||
movq P_VMSPACE(%rdx), %rdx
|
||||
btsq %rax, VM_PMAP+PM_ACTIVE(%rdx) /* set new */
|
||||
|
||||
sw1:
|
||||
/*
|
||||
* At this point, we've switched address spaces and are ready
|
||||
* to load up the rest of the next context.
|
||||
*/
|
||||
movq TD_PCB(%rsi),%rdx
|
||||
|
||||
/* Update the TSS_RSP0 pointer for the next interrupt */
|
||||
leaq -16(%rdx), %rbx
|
||||
movq %rbx, common_tss + COMMON_TSS_RSP0
|
||||
|
||||
/* Restore context. */
|
||||
movq PCB_RBX(%rdx),%rbx
|
||||
movq PCB_RSP(%rdx),%rsp
|
||||
movq PCB_RBP(%rdx),%rbp
|
||||
movq PCB_R12(%rdx),%r12
|
||||
movq PCB_R13(%rdx),%r13
|
||||
movq PCB_R14(%rdx),%r14
|
||||
movq PCB_R15(%rdx),%r15
|
||||
movq PCB_RIP(%rdx),%rax
|
||||
movq %rax,(%rsp)
|
||||
pushq PCB_RFLAGS(%rdx)
|
||||
popfq
|
||||
|
||||
movq %rdx, PCPU(CURPCB)
|
||||
movq %rsi, PCPU(CURTHREAD) /* into next thread */
|
||||
|
||||
ret
|
||||
|
||||
#ifdef INVARIANTS
|
||||
badsw1:
|
||||
pushq %rax
|
||||
pushq %rcx
|
||||
pushq %rdx
|
||||
pushq %rbx
|
||||
pushq %rbp
|
||||
pushq %rsi
|
||||
pushq %rdi
|
||||
pushq %r8
|
||||
pushq %r9
|
||||
pushq %r10
|
||||
pushq %r11
|
||||
pushq %r12
|
||||
pushq %r13
|
||||
pushq %r14
|
||||
pushq %r15
|
||||
pushq $sw0_1
|
||||
call panic
|
||||
sw0_1: .asciz "cpu_throw: no newthread supplied"
|
||||
|
||||
badsw2:
|
||||
pushq %rax
|
||||
pushq %rcx
|
||||
pushq %rdx
|
||||
pushq %rbx
|
||||
pushq %rbp
|
||||
pushq %rsi
|
||||
pushq %rdi
|
||||
pushq %r8
|
||||
pushq %r9
|
||||
pushq %r10
|
||||
pushq %r11
|
||||
pushq %r12
|
||||
pushq %r13
|
||||
pushq %r14
|
||||
pushq %r15
|
||||
pushq $sw0_2
|
||||
call panic
|
||||
sw0_2: .asciz "cpu_switch: no curthread supplied"
|
||||
|
||||
badsw3:
|
||||
pushq %rax
|
||||
pushq %rcx
|
||||
pushq %rdx
|
||||
pushq %rbx
|
||||
pushq %rbp
|
||||
pushq %rsi
|
||||
pushq %rdi
|
||||
pushq %r8
|
||||
pushq %r9
|
||||
pushq %r10
|
||||
pushq %r11
|
||||
pushq %r12
|
||||
pushq %r13
|
||||
pushq %r14
|
||||
pushq %r15
|
||||
pushq $sw0_3
|
||||
call panic
|
||||
sw0_3: .asciz "cpu_switch: no newthread supplied"
|
||||
#endif
|
||||
|
||||
noswitch: .asciz "cpu_switch: called!"
|
||||
nothrow: .asciz "cpu_throw: called!"
|
||||
/*
|
||||
* savectx(pcb)
|
||||
* Update pcb, saving current processor state.
|
||||
*/
|
||||
ENTRY(savectx)
|
||||
/* Fetch PCB. */
|
||||
movq %rdi,%rcx
|
||||
|
||||
/* Save caller's return address. */
|
||||
movq (%rsp),%rax
|
||||
movq %rax,PCB_RIP(%rcx)
|
||||
|
||||
movq %cr3,%rax
|
||||
movq %rax,PCB_CR3(%rcx)
|
||||
|
||||
movq %rbx,PCB_RBX(%rcx)
|
||||
movq %rsp,PCB_RSP(%rcx)
|
||||
movq %rbp,PCB_RBP(%rcx)
|
||||
movq %r12,PCB_R12(%rcx)
|
||||
movq %r13,PCB_R13(%rcx)
|
||||
movq %r14,PCB_R14(%rcx)
|
||||
movq %r15,PCB_R15(%rcx)
|
||||
pushfq
|
||||
popq PCB_RFLAGS(%rcx)
|
||||
|
||||
/*
|
||||
* If fpcurthread == NULL, then the npx h/w state is irrelevant and the
|
||||
* state had better already be in the pcb. This is true for forks
|
||||
* but not for dumps (the old book-keeping with FP flags in the pcb
|
||||
* always lost for dumps because the dump pcb has 0 flags).
|
||||
*
|
||||
* If fpcurthread != NULL, then we have to save the npx h/w state to
|
||||
* fpcurthread's pcb and copy it to the requested pcb, or save to the
|
||||
* requested pcb and reload. Copying is easier because we would
|
||||
* have to handle h/w bugs for reloading. We used to lose the
|
||||
* parent's npx state for forks by forgetting to reload.
|
||||
*/
|
||||
pushfq
|
||||
cli
|
||||
movq PCPU(FPCURTHREAD),%rax
|
||||
testq %rax,%rax
|
||||
je 1f
|
||||
|
||||
pushq %rcx
|
||||
pushq %rax
|
||||
movq TD_PCB(%rax),%rdi
|
||||
leaq PCB_SAVEFPU(%rdi),%rdi
|
||||
call npxsave
|
||||
popq %rax
|
||||
popq %rcx
|
||||
|
||||
movq $PCB_SAVEFPU_SIZE,%rdx /* arg 3 */
|
||||
leaq PCB_SAVEFPU(%rcx),%rsi /* arg 2 */
|
||||
movq %rax,%rdi /* arg 1 */
|
||||
call bcopy
|
||||
1:
|
||||
popfq
|
||||
|
||||
ret
|
||||
@ -1,81 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 1989, 1990 William F. Jolitz.
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to Berkeley by
|
||||
* William Jolitz.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the University of
|
||||
* California, Berkeley and its contributors.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
.data
|
||||
ALIGN_DATA
|
||||
|
||||
/* interrupt mask enable (all h/w off) */
|
||||
.globl imen
|
||||
imen: .long HWI_MASK
|
||||
|
||||
.text
|
||||
SUPERALIGN_TEXT
|
||||
|
||||
ENTRY(INTREN)
|
||||
movq %rdi, %rax
|
||||
movl %eax, %ecx
|
||||
notl %eax
|
||||
andl %eax, imen
|
||||
movl imen, %eax
|
||||
testb %cl, %cl
|
||||
je 1f
|
||||
outb %al, $(IO_ICU1 + ICU_IMR_OFFSET)
|
||||
1:
|
||||
testb %ch, %ch
|
||||
je 2f
|
||||
shrl $8, %eax
|
||||
outb %al, $(IO_ICU2 + ICU_IMR_OFFSET)
|
||||
2:
|
||||
ret
|
||||
|
||||
ENTRY(INTRDIS)
|
||||
movq %rdi, %rax
|
||||
movl %eax, %ecx
|
||||
orl %eax, imen
|
||||
movl imen, %eax
|
||||
testb %cl, %cl
|
||||
je 1f
|
||||
outb %al, $(IO_ICU1 + ICU_IMR_OFFSET)
|
||||
1:
|
||||
testb %ch, %ch
|
||||
je 2f
|
||||
shrl $8, %eax
|
||||
outb %al, $(IO_ICU2 + ICU_IMR_OFFSET)
|
||||
2:
|
||||
ret
|
||||
@ -1,142 +0,0 @@
|
||||
/*
|
||||
* from: vector.s, 386BSD 0.1 unknown origin
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8))
|
||||
#define IRQ_BYTE(irq_num) ((irq_num) >> 3)
|
||||
|
||||
#define ENABLE_ICU1 \
|
||||
movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \
|
||||
outb %al,$IO_ICU1 /* ... to clear in service bit */
|
||||
|
||||
#define ENABLE_ICU1_AND_2 \
|
||||
movb $ICU_EOI,%al ; /* as above */ \
|
||||
outb %al,$IO_ICU2 ; /* but do second icu first ... */ \
|
||||
outb %al,$IO_ICU1 /* ... then first icu */
|
||||
|
||||
|
||||
/*
|
||||
* Macros for interrupt interrupt entry, call to handler, and exit.
|
||||
*/
|
||||
|
||||
#define FAST_INTR(irq_num, vec_name, enable_icus) \
|
||||
.text ; \
|
||||
SUPERALIGN_TEXT ; \
|
||||
IDTVEC(vec_name) ; \
|
||||
subq $TF_RIP,%rsp ; /* skip dummy tf_err and tf_trapno */ \
|
||||
movq %rdi,TF_RDI(%rsp) ; \
|
||||
movq %rsi,TF_RSI(%rsp) ; \
|
||||
movq %rdx,TF_RDX(%rsp) ; \
|
||||
movq %rcx,TF_RCX(%rsp) ; \
|
||||
movq %r8,TF_R8(%rsp) ; \
|
||||
movq %r9,TF_R9(%rsp) ; \
|
||||
movq %rax,TF_RAX(%rsp) ; \
|
||||
movq %rbx,TF_RBX(%rsp) ; \
|
||||
movq %rbp,TF_RBP(%rsp) ; \
|
||||
movq %r10,TF_R10(%rsp) ; \
|
||||
movq %r11,TF_R11(%rsp) ; \
|
||||
movq %r12,TF_R12(%rsp) ; \
|
||||
movq %r13,TF_R13(%rsp) ; \
|
||||
movq %r14,TF_R14(%rsp) ; \
|
||||
movq %r15,TF_R15(%rsp) ; \
|
||||
FAKE_MCOUNT((12)*4(%rsp)) ; \
|
||||
call critical_enter ; \
|
||||
movq PCPU(CURTHREAD),%rbx ; \
|
||||
incl TD_INTR_NESTING_LEVEL(%rbx) ; \
|
||||
movq intr_unit + (irq_num) * 8, %rdi ; \
|
||||
call *intr_handler + (irq_num) * 8 ; /* do the work ASAP */ \
|
||||
enable_icus ; /* (re)enable ASAP (helps edge trigger?) */ \
|
||||
incl cnt+V_INTR ; /* book-keeping can wait */ \
|
||||
movq intr_countp + (irq_num) * 8,%rax ; \
|
||||
incq (%rax) ; \
|
||||
decl TD_INTR_NESTING_LEVEL(%rbx) ; \
|
||||
call critical_exit ; \
|
||||
MEXITCOUNT ; \
|
||||
jmp doreti
|
||||
|
||||
/*
|
||||
* Slow, threaded interrupts.
|
||||
*
|
||||
* XXX Most of the parameters here are obsolete. Fix this when we're
|
||||
* done.
|
||||
* XXX we really shouldn't return via doreti if we just schedule the
|
||||
* interrupt handler and don't run anything. We could just do an
|
||||
* iret. FIXME.
|
||||
*/
|
||||
#define INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \
|
||||
.text ; \
|
||||
SUPERALIGN_TEXT ; \
|
||||
IDTVEC(vec_name) ; \
|
||||
subq $TF_RIP,%rsp ; /* skip dummy tf_err and tf_trapno */ \
|
||||
movq %rdi,TF_RDI(%rsp) ; \
|
||||
movq %rsi,TF_RSI(%rsp) ; \
|
||||
movq %rdx,TF_RDX(%rsp) ; \
|
||||
movq %rcx,TF_RCX(%rsp) ; \
|
||||
movq %r8,TF_R8(%rsp) ; \
|
||||
movq %r9,TF_R9(%rsp) ; \
|
||||
movq %rax,TF_RAX(%rsp) ; \
|
||||
movq %rbx,TF_RBX(%rsp) ; \
|
||||
movq %rbp,TF_RBP(%rsp) ; \
|
||||
movq %r10,TF_R10(%rsp) ; \
|
||||
movq %r11,TF_R11(%rsp) ; \
|
||||
movq %r12,TF_R12(%rsp) ; \
|
||||
movq %r13,TF_R13(%rsp) ; \
|
||||
movq %r14,TF_R14(%rsp) ; \
|
||||
movq %r15,TF_R15(%rsp) ; \
|
||||
maybe_extra_ipending ; \
|
||||
movb imen + IRQ_BYTE(irq_num),%al ; \
|
||||
orb $IRQ_BIT(irq_num),%al ; \
|
||||
movb %al,imen + IRQ_BYTE(irq_num) ; \
|
||||
outb %al,$icu+ICU_IMR_OFFSET ; \
|
||||
enable_icus ; \
|
||||
movq PCPU(CURTHREAD),%rbx ; \
|
||||
incl TD_INTR_NESTING_LEVEL(%rbx) ; \
|
||||
FAKE_MCOUNT(13*4(%rsp)) ; /* XXX late to avoid double count */ \
|
||||
movq $irq_num, %rdi; /* pass the IRQ */ \
|
||||
call sched_ithd ; \
|
||||
decl TD_INTR_NESTING_LEVEL(%rbx) ; \
|
||||
MEXITCOUNT ; \
|
||||
/* We could usually avoid the following jmp by inlining some of */ \
|
||||
/* doreti, but it's probably better to use less cache. */ \
|
||||
jmp doreti
|
||||
|
||||
MCOUNT_LABEL(bintr)
|
||||
FAST_INTR(0,fastintr0, ENABLE_ICU1)
|
||||
FAST_INTR(1,fastintr1, ENABLE_ICU1)
|
||||
FAST_INTR(2,fastintr2, ENABLE_ICU1)
|
||||
FAST_INTR(3,fastintr3, ENABLE_ICU1)
|
||||
FAST_INTR(4,fastintr4, ENABLE_ICU1)
|
||||
FAST_INTR(5,fastintr5, ENABLE_ICU1)
|
||||
FAST_INTR(6,fastintr6, ENABLE_ICU1)
|
||||
FAST_INTR(7,fastintr7, ENABLE_ICU1)
|
||||
FAST_INTR(8,fastintr8, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(9,fastintr9, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(10,fastintr10, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(11,fastintr11, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(12,fastintr12, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(13,fastintr13, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(14,fastintr14, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(15,fastintr15, ENABLE_ICU1_AND_2)
|
||||
|
||||
#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending)
|
||||
/* Threaded interrupts */
|
||||
INTR(0,intr0, IO_ICU1, ENABLE_ICU1, CLKINTR_PENDING)
|
||||
INTR(1,intr1, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(2,intr2, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(3,intr3, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(4,intr4, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(5,intr5, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(6,intr6, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(7,intr7, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(8,intr8, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(9,intr9, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(10,intr10, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(11,intr11, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(12,intr12, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(13,intr13, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(14,intr14, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(15,intr15, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
|
||||
MCOUNT_LABEL(eintr)
|
||||
|
||||
@ -73,4 +73,4 @@ eintrnames:
|
||||
* loading segregs.
|
||||
*/
|
||||
|
||||
#include "amd64/isa/icu_vector.s"
|
||||
#include "amd64/isa/icu_vector.S"
|
||||
|
||||
@ -1,76 +0,0 @@
|
||||
/*
|
||||
* from: vector.s, 386BSD 0.1 unknown origin
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <amd64/isa/icu.h>
|
||||
#include <amd64/isa/isa.h>
|
||||
#include <amd64/isa/intr_machdep.h>
|
||||
|
||||
.data
|
||||
ALIGN_DATA
|
||||
|
||||
/*
|
||||
* Interrupt counters and names for export to vmstat(8) and friends.
|
||||
*
|
||||
* XXX this doesn't really belong here; everything except the labels
|
||||
* for the endpointers is almost machine-independent.
|
||||
*/
|
||||
|
||||
.globl intrcnt, eintrcnt
|
||||
intrcnt:
|
||||
.space INTRCNT_COUNT * 8
|
||||
eintrcnt:
|
||||
|
||||
.globl intrnames, eintrnames
|
||||
intrnames:
|
||||
.space INTRCNT_COUNT * 32
|
||||
eintrnames:
|
||||
.text
|
||||
|
||||
/*
|
||||
* Macros for interrupt interrupt entry, call to handler, and exit.
|
||||
*
|
||||
* XXX - the interrupt frame is set up to look like a trap frame. This is
|
||||
* usually a waste of time. The only interrupt handlers that want a frame
|
||||
* are the clock handler (it wants a clock frame), the npx handler (it's
|
||||
* easier to do right all in assembler). The interrupt return routine
|
||||
* needs a trap frame for rare AST's (it could easily convert the frame).
|
||||
* The direct costs of setting up a trap frame are two pushl's (error
|
||||
* code and trap number), an addl to get rid of these, and pushing and
|
||||
* popping the call-saved regs %esi, %edi and %ebp twice, The indirect
|
||||
* costs are making the driver interface nonuniform so unpending of
|
||||
* interrupts is more complicated and slower (call_driver(unit) would
|
||||
* be easier than ensuring an interrupt frame for all handlers. Finally,
|
||||
* there are some struct copies in the npx handler and maybe in the clock
|
||||
* handler that could be avoided by working more with pointers to frames
|
||||
* instead of frames.
|
||||
*
|
||||
* XXX - should we do a cld on every system entry to avoid the requirement
|
||||
* for scattered cld's?
|
||||
*
|
||||
* Coding notes for *.s:
|
||||
*
|
||||
* If possible, avoid operations that involve an operand size override.
|
||||
* Word-sized operations might be smaller, but the operand size override
|
||||
* makes them slower on on 486's and no faster on 386's unless perhaps
|
||||
* the instruction pipeline is depleted. E.g.,
|
||||
*
|
||||
* Use movl to seg regs instead of the equivalent but more descriptive
|
||||
* movw - gas generates an irelevant (slower) operand size override.
|
||||
*
|
||||
* Use movl to ordinary regs in preference to movw and especially
|
||||
* in preference to movz[bw]l. Use unsigned (long) variables with the
|
||||
* top bits clear instead of unsigned short variables to provide more
|
||||
* opportunities for movl.
|
||||
*
|
||||
* If possible, use byte-sized operations. They are smaller and no slower.
|
||||
*
|
||||
* Use (%reg) instead of 0(%reg) - gas generates larger code for the latter.
|
||||
*
|
||||
* If the interrupt frame is made more flexible, INTR can push %eax first
|
||||
* and decide the ipending case with less overhead, e.g., by avoiding
|
||||
* loading segregs.
|
||||
*/
|
||||
|
||||
#include "amd64/isa/icu_vector.s"
|
||||
Loading…
Reference in New Issue
Block a user