MFp4: various style fixes, including
o s/u_int/uint/g o s/#define<sp>/#define<tab>/g o indent macro definitions o Improve vertical spacing o Globally align line continuation character
This commit is contained in:
Marcel Moolenaar
parent
f44831e61c
commit
5c48823c36
@ -48,101 +48,88 @@
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/*
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* Some common forms of cmpxch.
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*/
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static __inline u_int32_t
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ia64_cmpxchg_acq_32(volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval)
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static __inline uint32_t
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ia64_cmpxchg_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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u_int32_t ret;
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uint32_t ret;
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IA64_CMPXCHG(4, acq, p, cmpval, newval, ret);
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return (ret);
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}
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static __inline u_int32_t
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ia64_cmpxchg_rel_32(volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval)
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static __inline uint32_t
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ia64_cmpxchg_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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u_int32_t ret;
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uint32_t ret;
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IA64_CMPXCHG(4, rel, p, cmpval, newval, ret);
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return (ret);
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}
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static __inline u_int64_t
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ia64_cmpxchg_acq_64(volatile u_int64_t* p, u_int64_t cmpval, u_int64_t newval)
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static __inline uint64_t
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ia64_cmpxchg_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
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{
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u_int64_t ret;
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uint64_t ret;
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IA64_CMPXCHG(8, acq, p, cmpval, newval, ret);
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return (ret);
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}
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static __inline u_int64_t
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ia64_cmpxchg_rel_64(volatile u_int64_t* p, u_int64_t cmpval, u_int64_t newval)
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static __inline uint64_t
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ia64_cmpxchg_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
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{
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u_int64_t ret;
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uint64_t ret;
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IA64_CMPXCHG(8, rel, p, cmpval, newval, ret);
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return (ret);
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}
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#define ATOMIC_STORE_LOAD(type, width, size) \
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static __inline u_int##width##_t \
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ia64_ld_acq_##width(volatile u_int##width##_t* p) \
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{ \
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u_int##width##_t v; \
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\
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__asm __volatile ("ld" size ".acq %0=%1" \
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: "=r" (v) \
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: "m" (*p) \
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: "memory"); \
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static __inline uint##width##_t \
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ia64_ld_acq_##width(volatile uint##width##_t* p) \
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{ \
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uint##width##_t v; \
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__asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
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: "m" (*p) : "memory"); \
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return (v); \
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} \
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} \
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\
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static __inline u_int##width##_t \
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atomic_load_acq_##width(volatile u_int##width##_t* p) \
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{ \
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u_int##width##_t v; \
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\
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__asm __volatile ("ld" size ".acq %0=%1" \
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: "=r" (v) \
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: "m" (*p) \
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: "memory"); \
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static __inline uint##width##_t \
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atomic_load_acq_##width(volatile uint##width##_t* p) \
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{ \
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uint##width##_t v; \
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__asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
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: "m" (*p) : "memory"); \
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return (v); \
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} \
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} \
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\
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static __inline u_int##width##_t \
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atomic_load_acq_##type(volatile u_int##width##_t* p) \
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{ \
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u_int##width##_t v; \
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\
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__asm __volatile ("ld" size ".acq %0=%1" \
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: "=r" (v) \
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: "m" (*p) \
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: "memory"); \
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static __inline uint##width##_t \
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atomic_load_acq_##type(volatile uint##width##_t* p) \
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{ \
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uint##width##_t v; \
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__asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
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: "m" (*p) : "memory"); \
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return (v); \
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} \
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} \
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\
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static __inline void \
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ia64_st_rel_##width(volatile u_int##width##_t* p, u_int##width##_t v)\
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{ \
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__asm __volatile ("st" size ".rel %0=%1" \
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: "=m" (*p) \
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: "r" (v) \
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: "memory"); \
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} \
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static __inline void \
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ia64_st_rel_##width(volatile uint##width##_t* p, uint##width##_t v) \
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{ \
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__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
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: "r" (v) : "memory"); \
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} \
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\
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static __inline void \
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atomic_store_rel_##width(volatile u_int##width##_t* p, u_int##width##_t v)\
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{ \
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__asm __volatile ("st" size ".rel %0=%1" \
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: "=m" (*p) \
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: "r" (v) \
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: "memory"); \
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} \
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static __inline void \
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atomic_store_rel_##width(volatile uint##width##_t* p, \
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uint##width##_t v) \
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{ \
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__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
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: "r" (v) : "memory"); \
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} \
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\
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static __inline void \
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atomic_store_rel_##type(volatile u_int##width##_t* p, u_int##width##_t v)\
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{ \
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__asm __volatile ("st" size ".rel %0=%1" \
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: "=m" (*p) \
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: "r" (v) \
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: "memory"); \
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}
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static __inline void \
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atomic_store_rel_##type(volatile uint##width##_t* p, \
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uint##width##_t v) \
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{ \
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__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
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: "r" (v) : "memory"); \
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}
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ATOMIC_STORE_LOAD(char, 8, "1")
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ATOMIC_STORE_LOAD(short, 16, "2")
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@ -152,49 +139,47 @@ ATOMIC_STORE_LOAD(long, 64, "8")
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#undef ATOMIC_STORE_LOAD
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#define IA64_ATOMIC(sz, type, name, width, op) \
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\
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static __inline void \
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atomic_##name##_acq_##width(volatile type *p, type v) \
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{ \
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static __inline void \
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atomic_##name##_acq_##width(volatile type *p, type v) \
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{ \
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type old, ret; \
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do { \
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old = *p; \
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IA64_CMPXCHG(sz, acq, p, old, old op v, ret); \
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} while (ret != old); \
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} \
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} \
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\
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static __inline void \
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atomic_##name##_rel_##width(volatile type *p, type v) \
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{ \
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static __inline void \
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atomic_##name##_rel_##width(volatile type *p, type v) \
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{ \
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type old, ret; \
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do { \
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old = *p; \
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IA64_CMPXCHG(sz, rel, p, old, old op v, ret); \
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} while (ret != old); \
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}
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}
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IA64_ATOMIC(1, u_int8_t, set, 8, |)
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IA64_ATOMIC(2, u_int16_t, set, 16, |)
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IA64_ATOMIC(4, u_int32_t, set, 32, |)
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IA64_ATOMIC(8, u_int64_t, set, 64, |)
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IA64_ATOMIC(1, uint8_t, set, 8, |)
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IA64_ATOMIC(2, uint16_t, set, 16, |)
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IA64_ATOMIC(4, uint32_t, set, 32, |)
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IA64_ATOMIC(8, uint64_t, set, 64, |)
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IA64_ATOMIC(1, u_int8_t, clear, 8, &~)
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IA64_ATOMIC(2, u_int16_t, clear, 16, &~)
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IA64_ATOMIC(4, u_int32_t, clear, 32, &~)
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IA64_ATOMIC(8, u_int64_t, clear, 64, &~)
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IA64_ATOMIC(1, uint8_t, clear, 8, &~)
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IA64_ATOMIC(2, uint16_t, clear, 16, &~)
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IA64_ATOMIC(4, uint32_t, clear, 32, &~)
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IA64_ATOMIC(8, uint64_t, clear, 64, &~)
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IA64_ATOMIC(1, u_int8_t, add, 8, +)
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IA64_ATOMIC(2, u_int16_t, add, 16, +)
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IA64_ATOMIC(4, u_int32_t, add, 32, +)
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IA64_ATOMIC(8, u_int64_t, add, 64, +)
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IA64_ATOMIC(1, uint8_t, add, 8, +)
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IA64_ATOMIC(2, uint16_t, add, 16, +)
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IA64_ATOMIC(4, uint32_t, add, 32, +)
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IA64_ATOMIC(8, uint64_t, add, 64, +)
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IA64_ATOMIC(1, u_int8_t, subtract, 8, -)
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IA64_ATOMIC(2, u_int16_t, subtract, 16, -)
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IA64_ATOMIC(4, u_int32_t, subtract, 32, -)
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IA64_ATOMIC(8, u_int64_t, subtract, 64, -)
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IA64_ATOMIC(1, uint8_t, subtract, 8, -)
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IA64_ATOMIC(2, uint16_t, subtract, 16, -)
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IA64_ATOMIC(4, uint32_t, subtract, 32, -)
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IA64_ATOMIC(8, uint64_t, subtract, 64, -)
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#undef IA64_ATOMIC
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#undef IA64_CMPXCHG
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#define atomic_set_8 atomic_set_acq_8
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#define atomic_clear_8 atomic_clear_acq_8
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@ -268,21 +253,23 @@ IA64_ATOMIC(8, u_int64_t, subtract, 64, -)
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#define atomic_add_rel_long atomic_add_rel_64
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#define atomic_subtract_rel_long atomic_subtract_rel_64
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#undef IA64_CMPXCHG
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/*
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* Atomically compare the value stored at *p with cmpval and if the
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* two values are equal, update the value of *p with newval. Returns
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* zero if the compare failed, nonzero otherwise.
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*/
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static __inline int
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atomic_cmpset_acq_32(volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval)
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atomic_cmpset_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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return ia64_cmpxchg_acq_32(p, cmpval, newval) == cmpval;
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return (ia64_cmpxchg_acq_32(p, cmpval, newval) == cmpval);
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}
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static __inline int
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atomic_cmpset_rel_32(volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval)
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atomic_cmpset_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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return ia64_cmpxchg_rel_32(p, cmpval, newval) == cmpval;
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return (ia64_cmpxchg_rel_32(p, cmpval, newval) == cmpval);
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}
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/*
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@ -291,15 +278,15 @@ atomic_cmpset_rel_32(volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval)
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* zero if the compare failed, nonzero otherwise.
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*/
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static __inline int
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atomic_cmpset_acq_64(volatile u_int64_t* p, u_int64_t cmpval, u_int64_t newval)
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atomic_cmpset_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
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{
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return ia64_cmpxchg_acq_64(p, cmpval, newval) == cmpval;
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return (ia64_cmpxchg_acq_64(p, cmpval, newval) == cmpval);
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}
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static __inline int
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atomic_cmpset_rel_64(volatile u_int64_t* p, u_int64_t cmpval, u_int64_t newval)
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atomic_cmpset_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
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{
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return ia64_cmpxchg_rel_64(p, cmpval, newval) == cmpval;
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return (ia64_cmpxchg_rel_64(p, cmpval, newval) == cmpval);
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}
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#define atomic_cmpset_32 atomic_cmpset_acq_32
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@ -314,15 +301,19 @@ atomic_cmpset_rel_64(volatile u_int64_t* p, u_int64_t cmpval, u_int64_t newval)
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static __inline int
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atomic_cmpset_acq_ptr(volatile void *dst, void *exp, void *src)
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{
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return atomic_cmpset_acq_long((volatile u_long *)dst,
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(u_long)exp, (u_long)src);
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int ret;
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ret = atomic_cmpset_acq_long((volatile u_long *)dst, (u_long)exp,
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(u_long)src);
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return (ret);
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}
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static __inline int
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atomic_cmpset_rel_ptr(volatile void *dst, void *exp, void *src)
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{
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return atomic_cmpset_rel_long((volatile u_long *)dst,
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(u_long)exp, (u_long)src);
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int ret;
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ret = atomic_cmpset_rel_long((volatile u_long *)dst, (u_long)exp,
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(u_long)src);
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return (ret);
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}
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#define atomic_cmpset_ptr atomic_cmpset_acq_ptr
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@ -330,7 +321,7 @@ atomic_cmpset_rel_ptr(volatile void *dst, void *exp, void *src)
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static __inline void *
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atomic_load_acq_ptr(volatile void *p)
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{
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return (void *)atomic_load_acq_long((volatile u_long *)p);
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return ((void *)atomic_load_acq_long((volatile u_long *)p));
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}
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static __inline void
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@ -340,23 +331,23 @@ atomic_store_rel_ptr(volatile void *p, void *v)
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}
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#define ATOMIC_PTR(NAME) \
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static __inline void \
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atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \
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{ \
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static __inline void \
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atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_long((volatile u_long *)p, v); \
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} \
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} \
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\
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static __inline void \
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atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_acq_long((volatile u_long *)p, v);\
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} \
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static __inline void \
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atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_acq_long((volatile u_long *)p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_rel_long((volatile u_long *)p, v);\
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}
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static __inline void \
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atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_rel_long((volatile u_long *)p, v); \
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}
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ATOMIC_PTR(set)
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ATOMIC_PTR(clear)
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@ -365,24 +356,24 @@ ATOMIC_PTR(subtract)
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#undef ATOMIC_PTR
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static __inline u_int32_t
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atomic_readandclear_32(volatile u_int32_t* p)
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static __inline uint32_t
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atomic_readandclear_32(volatile uint32_t* p)
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{
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u_int32_t val;
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uint32_t val;
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do {
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val = *p;
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} while (!atomic_cmpset_32(p, val, 0));
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return val;
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return (val);
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}
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static __inline u_int64_t
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atomic_readandclear_64(volatile u_int64_t* p)
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static __inline uint64_t
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atomic_readandclear_64(volatile uint64_t* p)
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{
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u_int64_t val;
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uint64_t val;
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do {
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val = *p;
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} while (!atomic_cmpset_64(p, val, 0));
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return val;
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return (val);
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}
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#define atomic_readandclear_int atomic_readandclear_32
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